JPS5941193B2 - character pattern generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for generating a character pattern expressed in a matrix, and particularly to a character pattern generating device that enables the use of a memory device having a large storage capacity.

In this type of character pattern generation device, especially in a kanji pattern generation device, storing character patterns expressed in a matrix as they are requires a significantly large storage capacity and is expensive.

From this point of view, methods for compressing and storing kanji patterns have been proposed in the past. This method converts the kanji pattern expressed on the mXn matrix to m'×n' (m x m
, , dividing the matrix into subpatterns with n'<n),
A method of assigning a variable length code, such as a 1-Raman code, to the sub-pattern in consideration of the frequency of occurrence, in other words, assigning a code with a shorter code length to a sub-pattern with a higher frequency of occurrence, and storing the encoded data. There has been a method in which encoding similar to the above is performed in consideration of the appearance frequency of sub-patterns in the row direction of the matrix, and the encoded data is stored. These methods have a large matrix size, for example, 24×
For 24, 32 x 32 kanji patterns, the compression ratio is 1.
It will be about /2.

However, in the case of a small matrix size of about 18 x 16, which is used as a Kanji pattern for general cathode ray tube display devices, the compression ratio is only about 2/3. The purpose of this invention is to
It is an object of the present invention to provide a character pattern generating device which can use a storage device which has a relatively higher compression rate than the conventional one and has a relatively small storage capacity.

According to this invention, a character pattern expressed on a matrix is divided into sub-patterns, a predetermined bit pattern is assigned to each sub-pattern in consideration of the frequency of occurrence, and the bit pattern string is run-length encoded. According to the character pattern to be obtained, the corresponding code is read from the memory, the code is converted into a run code, and each of the allocated sub-patterns is converted, This subpattern is converted into an original subpattern to obtain the desired character pattern.

Before describing embodiments of the present invention, an outline of the processing will be described.

As shown in FIG. 1, the run length of a kanji pattern expressed on a matrix, that is, the length of consecutive identical symbols, tends to be shorter as it appears more frequently. Therefore, even if this short run length is converted into a short code, the compression ratio cannot be increased. FIG. 2A shows sub-patterns of kanji characters expressed on an 18×16 matrix, for example, patterns numbered 1 to 10 in which the line direction dot pattern appears frequently.

As can be understood from the first, third, fifth to ninth sub-patterns in this figure, many black runs with a run length of 1 appear. Therefore, new patterns with the same code length are allocated so that the run lengths of subpatterns with higher frequency of appearance tend to be longer.

An example of the layout pattern is shown in FIG. 2B. No. 1 in B of the same figure
~Fourth, the black run length is half the code length, and its position is shifted. The bit pattern thus allocated is run-length encoded.

In this case, a code with a long run length becomes a short code, and moreover, that code occurs more frequently. Therefore, the compression ratio is improved. In this invention, the code encoded in this manner is stored in a storage device, read out, and a character pattern is created from the code. FIG. 3 shows an embodiment of the device according to the invention, in which a character code corresponding to a character pattern to be generated from outside the device is input to the terminal 11.

The input character code is temporarily stored in the character code register 12. According to the contents of the character code register 12, the address creation section 13 creates the storage start address of the corresponding character pattern data stored in the character pattern storage section 14. The read control section 15 inputs the created storage start address into the character pattern storage section 14 and reads it out. As explained earlier, this storage unit 14 stores data stored in FIG.
A code obtained by run-length encoding of the layout sub-pattern is stored. Data of a unit storage length, that is, one word, is read out from the character pattern storage section 14 to the code separation section 16 .

If the read variable length code is not accommodated in one unit storage length data, the code separator 16 detects this and controls the read controller 15 again to store the next address as a character pattern. 14. As a result, the next unit storage length data is read out. The read variable-length code string is separated into code units by the code separator 16. The separated codes are converted into a run pattern by a run pattern creation section 17.

This run pattern is edited by the bit pattern editing section 18 as a bit pattern of a predetermined bit length, that is, edited into an assigned subpattern of a fixed length as shown in FIG. 2B. If a bit pattern of a predetermined bit length is not completed in one run pattern, the editing section 18 detects this and uses its output to control the readout leg section 15 again to read out the next code.

By reading the variable length code one or more times in this way, one or more run patterns are edited as a bit pattern with a predetermined bit length.

This bit pattern is converted by a subpattern conversion section 19 into a predetermined original subpattern, that is, the subpattern shown in FIG. 2A. This conversion can be performed, for example, by a read-only memory. The converted sub-pattern is sent to the outside of the device via the pattern output TOl section 21 at the terminal 2.
It is output through 2. After that, when the output sub-pattern is read outside the device, a reading end signal is output, and when that signal is received at the terminal 23, the pattern output control unit 21 counts the number of sub-pattern outputs until all sub-patterns are read out. The read control unit 15 is prompted to read the next encoded pattern, and the same operation as described above is performed again. In this way, the desired character pattern is output. Figure 4 is the third
A line number register 24 is added to the embodiment shown in the figure for temporarily storing a line number input from outside the device, that is, a number specifying which line of a subpattern in a character pattern expressed in a matrix. This is an example.

The operation of this embodiment is similar to that of the embodiment shown in FIG.
The sub-pattern converter 19 converts the bit pattern corresponding to the row-direction sub-pattern specified by the contents into a sub-pattern, and outputs it to the outside of the apparatus via the pattern output pedestal 21. Although the above description has been made assuming that row-direction sub-patterns are output, a similar configuration can be applied to output column-direction sub-patterns.

Further, although the matrix size of the character pattern has been set to 18x16, the same processing can be performed even if the size is changed to 24x24 or 32x32. As explained above, according to the device of the present invention, after allocating pit patterns with the same run length and longer run lengths to sub-patterns that frequently appear in character pattern data having a short run length, Since the encoded variable-length code is stored in the character pattern storage unit 14, the compression ratio can be increased even for character patterns with small matrix sizes, for which the compression ratio was not very high in the past. Part 14
storage capacity can be reduced.

[Brief explanation of drawings]

Figure 1 is a diagram showing the appearance rate of the run length of a character pattern with a matrix size of 18 x 16, Figure 2 is a diagram showing an example of the relationship between subpatterns and layout patterns that make up the character pattern, and Figure 3 is a diagram showing the present invention. FIG. 4 is a block diagram showing another embodiment of the character pattern generator according to the present invention. 12: Character code register, 13: Address creation section, 1
4: Character pattern storage section, 15: Continuation control section, 16: Code separation section, 17: Run pattern creation section, 18: Bit frame editing section, 19: Sub pattern conversion section, 21: Pattern output control section, 24: Line number register.

Claims (1)

[Claims] 1 Convert the sub-patterns that make up the character pattern expressed in a matrix into a predetermined bit pattern,
A character pattern storage unit that stores a code string obtained by run-length encoding the bit pattern string for each character, a character code register that temporarily stores character codes input from outside the device, and characters temporarily stored in the register. an address generation section that converts a code into a storage start address of a run-length encoded character code string for a corresponding character in the storage section; and the read run length code is 1
If the data is not stored in the unit memory length data, a read control unit controls the read control unit to read the memory for the next address, and separates the run-length code string read from the memory unit into code units. a code separator that converts the code separated by the code separator into a run pattern; a run pattern generator that edits the converted run pattern from the run pattern generator into the bit pattern; If the bit pattern of the predetermined bit length is not completed, the bit pattern editing section controls the readout control section to read out the next code, and the bit edited by the editing section. A character pattern generation device comprising: a subpattern conversion section that converts a pattern into the subpattern; and a pattern output control section that performs control to output the subpattern converted by the conversion section to the outside of the device.