JPS5940684A - Display panel - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display panel for an image display in which a liquid crystal is sealed between a semiconductor circuit board in which switching transistors are arranged in a matrix using integrated circuit technology and, for example, a transparent glass substrate.

For example, in a display panel such as a portable LCD television, as shown in FIG.
A liquid crystal 4 is sealed between transparent glass plates 3 which are sandwiched between them, and this is fixed to a printed circuit board 5 or the like, and connected to an external synchronization circuit, power supply, etc. 6 is a polarizing plate, 7 is wire bonding, 8 is printed circuit board wiring, 9 is a display η electrode, and 1
0 is a common transparent electrode.

Figure 2 shows an equivalent circuit for one purple stroke. When the MOS transistor 11 selected at the source and drain is turned on and a voltage is applied to the pixel capacitor 12, the molecular arrangement of the liquid crystal 13 sealed on the substrate is changed. Display is performed by changing the color. The semiconductor circuit board used at this time is, for example, as shown in FIG. After forming a field oxide film 17 by the method, a gate oxide film 18 is grown, and further Poly-Si 19 is vapor-phase grown and photoetched.Next, diffusion layers 20 such as sources and drains are formed, and high concentration PSG is formed. The film 21 is grown in a vapor phase, and after contact etching, it is reflowed at 1000 to 1100° C. to make the step shape gentler, and a first wiring 68 made of At or At alloy is formed.Subsequently, a vapor phase 5102 film is formed as an interlayer insulating film 36. After growth and through-pole etching, a second wiring 22 made of At or At alloy that also serves as a reflector is formed at the light speed of the active region.Finally, vapor phase growth 5102 is performed.
A hole in the pad is made using the passivation film 23.

However, the conventional semiconductor circuit board made in this way is
The fact that vapor phase growth films and Snoknopa films are grown only on the front side of the wafer, and also for thermal oxide films, low pressure vapor growth films, etc., in the photo etching process, only the front surface is used as a mask and a resist pattern is formed, so that growth on the back side is prevented. Because the film is etched, the final result is a structure in which a thick grown film remains on the surface and Sl is exposed on the back surface. Therefore, due to the stress of the surface grown film, a conventional semiconductor circuit board has a diameter of, for example, 100%.
In the case of 81 wafers, 40 to 6
The 0μ warp increases and eventually becomes a convex curved warp of about 40 to 80μ, making it impossible to form vacuum chunks in aligners, resist coaters, etc. during the manufacturing process.
There are many defects in dimensional accuracy, which causes a decrease in yield. Also, when cut out as a panel chip from the S1 wafer,
For example, a 2 x 3 Ca square panel has a warp of about 5 to 10 μm, and when actually mounted as a display panel,
The size of the gap between the semiconductor circuit board and the transparent glass, into which the liquid crystal enters, becomes uneven due to warping, and the color of the emitted light becomes uneven due to light absorption by the liquid crystal, resulting in poor display image quality. Furthermore, there is a relative difference in the Taber angle of the scattering/reflecting surface due to the warpage, which narrows the viewing angle of the screen, weakens the reflection intensity, and adversely affects the display effect.

However, the present invention improves the display effect of the display panel and the manufacturing yield by finally leaving a field oxide film or Po1y-3i film on the back surface of the semiconductor circuit board.

The present invention will be described in detail below based on Examples.

In FIG. 3, P<100> 5-10Ωa81 substrate 25 excluding active areas such as MOS transistor 24
A scattering/reflection surface 26 in which an elliptical or rectangular pattern of about 3 to 10 μm is irregularly arranged is formed on the surface of the substrate 2 by the LOCO8 method, and Si, N, and films are deposited on the substrate 2 by vacuum vapor deposition.
1,200 to 1,600 particles were grown on the front and back sides of the substrate, and in the photo process, Si, N4 was grown over the selected pattern on the front surface and the entire back surface
Etch the film with a cylindrical plasma etcher and
A field oxide film 27 with a thickness of 1.3 to 15 .mu.m is grown on the front and back surfaces of the substrate 25 by high pressure oxidation at 000 to 1100 DEG C., and Si3N4 is removed with hot phosphoric acid.

Next, a gate oxide film 28 is grown, and a B
' After ion implantation, 3000~4000X Po
The 1y-3i film 29 is grown by vapor phase growth under reduced pressure, and a selective pattern is formed by a photo process. At this time, the Po1y-3i film was etched using a facing electrode type plasma etcher.
A Poly-Sill LA 29 is left on the back surface of the substrate so as to cover the field oxide film 27. Next, after drilling a diffusion region, a high-concentration PSG film 61 of 3 to 6 mo1% was grown in vapor phase, annealed at 900°CN2, and contact photo was performed by Wθt etching.
By reflowing the PSG film 31 at ℃N2 and creating N+ diffusion %30, the first wiring 32 consisting of A2-81 is formed.
form. Next, an interlayer insulating film 6 made of vapor-phase grown NSG
3, wet-etch the through hole, and
After forming the second wiring 34 by sputtering T-51, a passivation film 5 is formed by vapor phase growth NSG [
Grow 15% at about 200°C and drill holes in the pad.

The warpage of the semiconductor circuit board produced in this way is approximately ±5 μ compared to the time of insertion, which is extremely small compared to conventional products, and it is not subject to vacuum chucks such as aligners during the manufacturing process. The pattern accuracy was improved. Also, even when chipped as a panel, the warpage can now be suppressed to about 2μ, and color unevenness on the liquid crystal when mounted is eliminated. We also checked the reflection characteristics of the reflector in the pixel area using a variable angle optical selector, and found that the reflection intensity was improved compared to the conventional model, and the variation in viewing angle was greatly reduced.

In the example, a field oxide film and a Po 1y-
The 8i film was left as it was, but after sputtering At for the second wiring, using this as a mask, etching the Poly-siM on the back side with a cylindrical malasma etchant also flowed, but the field on the back side Although the oxide film was etched by 1500 to 2000 A in the pad photo process, the final warpage could be suppressed to about 0 to +5 μ compared to when it was introduced.

Therefore, by selecting the process of etching the Po1ySiy on the back surface, it becomes possible to adjust the W11 in order to reduce the variation in final warpage due to the variation in warpage of the input 81 substrate.

As described above, the present invention provides a display panel using a semiconductor circuit board,
It has become possible to stably supply high quality and high yield. Note that the present invention is not limited to a display panel having a substrate having a NchMOS (MOS) run sister, but may also be a display panel having a Pch and complementary transistor, and the substrate may not be placed in Sl.
Quartz, glass, Al2O.

Applications are also possible with devices having semiconductor circuits on insulating substrates such as .

[Brief explanation of the drawing]

1 is a schematic cross-sectional view of an assembled display panel, FIG. 2 is a schematic cross-sectional view of both pixel circuits, 31 is a schematic cross-sectional view of a semiconductor circuit board according to the present invention, and FIG. 4 is a schematic cross-sectional view of a conventional semiconductor circuit board. FIG. 1...Semiconductor circuit board 2...Spacer 3...Glass plate 4
．． 16...Liquid crystal 5...Printed circuit board 6...Polarizing plate 11.24.37...M'OS transistor 12...Pixel capacitor 14 ...Wiring capacitance 15.25...Si substrate 17.27...Field oxide film 18.28...
...Gate oxide film j 9 , 29-=Poly-S i film 20 , 3
0...N layer 21.31...=PSG film 22, 34...Second wiring 23.35...Panben Yong film 32.38...First wiring 33. 36... Interlayer insulation film equipment Upper tIS Kandai Suwa Seikosha Co., Ltd. Agent Patent attorney Tsutomu Mogami

Claims (1)

[Claims] 1. A display panel characterized in that, in an image display formed by driving a liquid crystal sealed on a substrate having a semiconductor circuit, at least one layer of 8102 film or Po1y-81 film is left on the back side of the semiconductor substrate.