JPS5935243A - Information processor - Google Patents

Abstract

PURPOSE:To reduce the quantity of hardware and to improve the efficiency of a fault diagnosis, by stopping a clock signal on falt occurrence and holding the significant state value of a control signal for a predetermined period. CONSTITUTION:Data from a register 223 is set in registers 222 and 224 of a central processing part 100' synchronously with a clock signal 80 by indications of control signals 22-24 from a control circuit 110. A control signal 21 and signals 22 and 23 in the circuit 110 have important meanings to a diagnosis and an analysis of fault processing and are generated successively to hold significant state values in holding circuits 121-123 for the predetermined time. If a fault occurs to the processing part 100', a diagnostic processing part 300 senses the fault by a falut report signal 95 and stops the signal 90 by a clock stop indication signal 90, and a selecting circuit 130 reads a significant signal from circuits 121-123 selectively. The states of the control signals in a short period before and after the generation of factors of the diagonosis and analysis such as a clock stop, etc. are held and read, so the diagnostic processing is performed effectively.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing apparatus, and particularly to an information processing apparatus having a diagnostic processing function.

In the case of a conventional information processing device, if it is a low-priced one, if the clock signal is stopped due to the occurrence of a failure etc. as a factor for diagnostic analysis, it will be used as information for determining the location of the failure or analyzing the cause of the failure. Since the entire history of internal control signals was not memorized, the cause could only be fully investigated from the state of each part when the clock stopped.

In particular, if there is a time lag between when a fault occurs and when the clock signal actually stops, the internal state at the time the clock stops does not match the internal state at the time the fault occurs, making diagnostic analysis difficult. there were.

Does the conventional information processing device that completely corrects these shortcomings use the state history method (trace method)? The information processing equipment used traces the entire detailed history of control signals, etc. prior to the occurrence of the cause of 1 diagnostic analysis.

FIG. 1 is a block diagram showing an example of an information processing apparatus that completely adopts the state history method.

In the information processing apparatus shown in FIG.
During the trace operation, the trace circuit 102 updates the address register 104 under the control of the control circuit 103 and receives the observed signal 1 sequentially supplied from the processing unit 101.
05 is written to the address of the storage circuit 106 specified by the address signal stored in the address register 104.

When the stop condition is satisfied, the trace operation is completely stopped in response to a stop signal 107.

Thereafter, the diagnostic processing device 300 reads out the observed signal lO5'ftO5-sence information stored in the storage circuit 106 and performs a first diagnostic process.

In an information processing device using such a state history method, detailed trace information is stored, so one-diagnosis analysis is easy;
Writing data to 6.

The trace circuit requires a large amount of hardware to control reading and updating of address registers.

Furthermore, during one diagnostic process, it is necessary to sequentially read the trace information and search all points at which a failure occurred.

It takes a lot of diagnosis time.

That is, the conventional information processing apparatus has the drawbacks of a large amount of hardware and poor diagnostic processing efficiency.

An object of the present invention is to provide an information processing device that can reduce the amount of hardware and improve diagnostic efficiency.

In other words, it is an object of the present invention to note that, for diagnostic processing of an information processing device whose clock signal has stopped due to the occurrence of a failure, the internal state of the device within a short period before and after the cause of the diagnostic analysis occurs is particularly useful. Is there a significant state value of the control signal inside the device, that is, a state value that is particularly meaningful for diagnostic analysis? Is it possible to know all the states of control signals in the vicinity where the cause of diagnosis analysis occurred by storing them in a holding circuit for a predetermined period of time? It is an object of the present invention to provide an information processing apparatus that can easily and inexpensively carry out diagnostic processing on a part to be diagnosed.

The information processing device of the present invention sequentially generates control signals? The control signals that are each held for a certain period of time during normal operation and held during diagnostic operation? a holding circuit that continuously maintains the control signals and generates a significant signal when at least one of the held control signals has a significant state value; and a reading means that reads and outputs the seven significant signals during the diagnostic operation. ? It consists of:

That is, 1. the information processing device of the present invention is an information processing device having a diagnostic processing function; 1. during normal operation, significant state values of control signals within the device are stored and retained for a certain period of time, and the state of the control signal changes within the period; Even said retention value? a holding circuit that holds the held value and loses the held value if the control signal is not a significant state value after the elapse of the period, while holding the last memory content during the normal operation during the diagnostic operation; and the holding circuit during the diagnostic operation. It is comprised of a readout means for reading out the control signal sounds stored in the memory.

Next, what about the drawings regarding the embodiments of the present invention? Refer to and explain.

FIG. 2 is a block diagram showing an entire embodiment of the present invention.

The information processing apparatus shown in FIG. 2 is composed of a central processing section 100' and a diagnostic processing section 300.

The registers 222 and 224 in the central processing unit 100 are synchronized with the clock signal 80 and receive instructions from the control signals 22 and 24 that respectively instruct all data sets output from the control circuit 110.F) Data bus 60, the value of the register 223 is set. Similarly, the register 223 is set with data from other parts within the central processing unit 100' via the data bus 50 in accordance with the control signal 23 which instructs all data sets.

Among these control signals 22 to 24 and the control signal 21 in the control circuit 110, the control signals 21 to 23, which have an important meaning in diagnostic analysis such as failure processing, are generated sequentially and applied only for a predetermined time. The control signals 21 to 23 are supplied to and held in holding circuits 121 to 123 that store and hold significant state values (logic "1" in this embodiment).

The significant signal 30 output from the holding circuits 121 to 123 is supplied to the 1 selection circuit 130.

The selection circuit 130 selects either the data 70 or the significant signal 30 according to the selection signal 32 and outputs it as an output signal 31. However, during normal operation of the central processing unit 100', the data 7
0? Selected. On the other hand, if a failure or the like occurs in the central processing unit ioo', it is reported to the diagnostic processing unit 300 using a failure report signal 95.
00 causes the clock signal 80 in the central processing unit 100' to stop in response to the clock stop instruction signal 90 and enters a diagnostic operation. That is, when the diagnostic processing unit 300 reads the significant signal 20.3 (l) generated in the holding circuits 121 to 123 as information for the diagnostic processing, the clock signal 80? The significant signal 30 outputted from the holding circuits 121-123 is selected and read out by the selection circuit 130 in response to the 1 selection signal 32.

The holding circuits 121 to 123 all have the same configuration, and an example of a detailed block diagram of the holding circuit 121 is shown in FIG. 2.

In the holding circuit shown in FIG.
n are connected in series to form an n-stage shift register. Further, the OR gate 10 has flip-flops 1 to n.
At least one of the control signals 11 to In output from
Is the state value significant? If so, a significant signal 30 is output.

Therefore, the control signal 2 supplied from the control circuit 110
When 1 becomes logic "l", a control signal of logic "l" is output from at least one of the flip-flops 1 to n for a period of nT (T is a clock signal) thereafter, so that the holding circuit The significant signal 20 output from 121 is also logic “
l″′.

That is, the holding circuit 121 holds the clock signal 80 only for the logic "l" p n T period generated as the control signal 21 during one normal operation, while being supplied with the clock signal 80 .

After the central processing section 100' stops the clock signal 80 in response to the clock stop instruction signal 90 from the diagnostic processing section 300, that is, after the one diagnostic processing section 300 enters the diagnostic operation, each of the seven lip cycles in the holding circuit 121 ~n
Since it is a clock synchronous type, its set (clear) operation is inhibited, and the last value of the control signal 21 during normal operation. Hold.

By providing a holding circuit instead of a storage circuit, the information processing device of the present invention keeps the amount of stored control signals at a small constant value, and also keeps the significant signal constant when the control signal has a significant state value. Since it can be output continuously over a period of time, it has the effect of reducing the amount of hardware and improving diagnostic processing efficiency.

In other words, the information processing device of the present invention is configured to retain and read the entire state of the control signal for a short period before and after the occurrence of a diagnostic analysis factor such as a clock stoppage with a relatively small amount of hardware, thereby making it possible to perform diagnostic processing. This has the effect of being able to be executed efficiently.

[Brief explanation of drawings]

Is Figure 1 an example of a conventional information processing device? Block diagram shown,
FIG. 2 is a block diagram showing one embodiment of the present invention, and FIG. 3 is a detailed block diagram of the holding circuit shown in FIG. 2. 100.10σ...Central processing unit, 101...
. . . Processing unit, 102 . . . Trace circuit, 10
3...Control circuit, 104...Address register, 105...Observed signal, 106...
...Memory circuit, 107...Stop 9- Positive signal, 300...Diagnostic processing section% 110...
...Control circuit, 121-123...Holding circuit, 222-224...Register, 21-24
．． 11~ln...control signal, 20.30...
...Significant signal, 130...Selection port v6, 31
...Output signal, 32...Selection signal, 5
0.60...Data bus, 70...Data. 80...Clock signal, 90...Clock stop instruction signal, 1-n...Flissive flop, 10...OR gate. D...Input terminal, K...Output terminal, C
K...Clock terminal. 10-

Claims (1)

[Claims] During normal operation, the sequentially generated control signals are held for a certain period of time, and during diagnostic operation, the held control signals are continuously maintained as they are, and at least one of the held control signals has a significant state value. An information processing device comprising: a holding circuit that sometimes generates a significant signal; and a reading unit that reads and outputs the significant signal sound during the diagnostic operation.