JPS5933318U - automatic gain control circuit - Google Patents
automatic gain control circuitInfo
- Publication number
- JPS5933318U JPS5933318U JP12804682U JP12804682U JPS5933318U JP S5933318 U JPS5933318 U JP S5933318U JP 12804682 U JP12804682 U JP 12804682U JP 12804682 U JP12804682 U JP 12804682U JP S5933318 U JPS5933318 U JP S5933318U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input terminal
- signal
- level
- automatic gain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は先行技術の電気回路図、第２図は本考案の電気
回路図である。
４・・・制御端子、５，６・・・端子、７・・・自動利
得制御回路、８・・・レベル制御回路、９・・・伝達回
路、１０・・・減衰回路、１１・・・増幅回路、１２・
・・レベル検出回路、１３． １８． １９． ２２．
２３・・・コン −デンサ、１４． １５． ２６．
２９・・・抵抗、１６゜１７・・・トランジスタ、２
４．２５・・・ダイオード。FIG. 1 is an electrical circuit diagram of the prior art, and FIG. 2 is an electrical circuit diagram of the present invention. 4... Control terminal, 5, 6... Terminal, 7... Automatic gain control circuit, 8... Level control circuit, 9... Transfer circuit, 10... Attenuation circuit, 11... Amplification circuit, 12.
...Level detection circuit, 13. 18. 19. 22.
23... Capacitor, 14. 15. 26.
29...Resistor, 16°17...Transistor, 2
4.25...Diode.
Claims (1)
号のレベルを一定レベルに変換して出力するとともに、
その出力動作が制御可能な自動利得ル制御回路において
、 一対の入力端子を有し、一方の入力端子に与えられる直
流電圧に応じてインピーダンスを変化させることによっ
て他方の入力端子から与えられる信号のレベルを変えて
出力する減衰回路と、前記減衰回路からの出力信号を増
幅する増幅回路と、 前記増幅回路からの出力信号を整流平滑して前記一方の
入力端子に与え、それによって前記増幅回路からの出力
信号を一定レベルになるようにするレベル検出回路と、 前記制御入力端子および前記一方の入力端子の間に介在
され、前記２値信号の一方のみを前記一方の入力端子に
伝達し、一方の２値信号が前記制御入力端子に与えられ
たときには前記レベル検出回路からの信号に優先して前
記インピーダンスを変化させ、それによって前記増幅回
路からの出力動作を抑制する伝達回路とを備えることを
特徴とする自動利得制御回路。[Claims for Utility Model Registration] According to the binary signal applied to the control terminal, the level of the input signal is converted to a constant level and outputted,
An automatic gain control circuit whose output operation can be controlled has a pair of input terminals, and the level of the signal applied from the other input terminal is changed by changing the impedance according to the DC voltage applied to one input terminal. an attenuation circuit that outputs a signal with a different value; an amplifier circuit that amplifies the output signal from the attenuation circuit; and an amplifier circuit that rectifies and smoothes the output signal from the amplification circuit and applies it to the one input terminal, thereby increasing the output signal from the amplification circuit. a level detection circuit that maintains an output signal at a constant level; and a level detection circuit that is interposed between the control input terminal and the one input terminal, transmits only one of the binary signals to the one input terminal, and transmits only one of the binary signals to the one input terminal; A transmission circuit that changes the impedance with priority over a signal from the level detection circuit when a binary signal is applied to the control input terminal, thereby suppressing output operation from the amplifier circuit. automatic gain control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12804682U JPS5933318U (en) | 1982-08-24 | 1982-08-24 | automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12804682U JPS5933318U (en) | 1982-08-24 | 1982-08-24 | automatic gain control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5933318U true JPS5933318U (en) | 1984-03-01 |
Family
ID=30290608
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12804682U Pending JPS5933318U (en) | 1982-08-24 | 1982-08-24 | automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5933318U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5310822U (en) * | 1976-07-09 | 1978-01-30 |
-
1982
- 1982-08-24 JP JP12804682U patent/JPS5933318U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5310822U (en) * | 1976-07-09 | 1978-01-30 |
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