JPS5931061U

JPS5931061U - full wave rectifier circuit

Info

Publication number: JPS5931061U
Application number: JP12579082U
Authority: JP
Inventors: 崇志賀
Original assignee: 日本ビクター株式会社
Priority date: 1982-08-20
Filing date: 1982-08-20
Publication date: 1984-02-27

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は、従来の全波整流回路の回路図、第２図は、従
来の全波整流回路の入力電圧−出力電圧特性を示す図、
第３図は、本考案の一実施例を示す回路図、第４図は、
第３図に示した本考案の一実施例の入力電圧−出力電圧
特性を示す図である。１・・・・・・入力端子、２．　３．　４．　５・・・
・・・電源端子、６・・・・・・出力端子、？、　　８
．９・・・・・・演算ｉ幅器、１０・・・・・・カレン
トミラー回路、Ｒ１，Ｒ２，Ｒ３，Ｒ，。Ｒ５，Ｒ５，Ｒ６，Ｒ７，Ｒ８，Ｒ９・曲・抵抗器、Ｄ
□、Ｄ２゜Ｄ３・・・・・・ダイオード、Ｔｏ、Ｔ２．
Ｔ３・・・・・・トランジスタ。補正　昭５７．１（１２２実用新案登録請求の範囲を次のように補正する。Ｏ実用新案登録請求の範囲反転入力に抵抗を介して入力端子を接続し、非反転入力
にバイアス電圧を供給しである演算増幅器と、この演算
増幅器の出力にそれぞれのベースを接続し、前記演算増
幅器の反転入力にそれぞれのエミッタを接続しである極
性の異なるトランジスタと、前記トランジスタの一方の
コレクタに入力接続し、他方め一コレクタと出力端子と
の接続部に出力を接続しであるカレントミラー回路とか
らなる全波整流回路。。FIG. 1 is a circuit diagram of a conventional full-wave rectifier circuit, and FIG. 2 is a diagram showing input voltage-output voltage characteristics of a conventional full-wave rectifier circuit.
FIG. 3 is a circuit diagram showing an embodiment of the present invention, and FIG. 4 is a circuit diagram showing an embodiment of the present invention.
FIG. 4 is a diagram showing input voltage-output voltage characteristics of the embodiment of the present invention shown in FIG. 3; 1... Input terminal, 2. 3. 4. 5...
...Power terminal, 6...Output terminal, ? , 8
．． 9... Arithmetic i width unit, 10... Current mirror circuit, R1, R2, R3, R,. R5, R5, R6, R7, R8, R9・Bend・Resistor, D
□, D2゜D3...Diode, To, T2.
T3...Transistor. Amendment 1982 (122) The scope of claims for utility model registration is amended as follows. an operational amplifier, the bases of which are connected to the output of the operational amplifier, the emitters of each of which are connected to the inverting input of the operational amplifier, transistors with different polarities, and the input connected to the collector of one of the transistors. , and a current mirror circuit whose output is connected to the connection between the second collector and the output terminal.

Claims

[Scope of utility model registration request]

The inverting input is an operational amplifier whose input terminal is connected through a resistor, and the transistors of different polarity are connected with their respective bases connected to the output of this operational amplifier and their respective emitters connected to the inverting input of said operational amplifier. and a current mirror circuit having an input connected to one collector of the transistor and an output connected to the other collector of the transistor and an output terminal.