JPS59275A - Smear correcting circuit of solid state image pickup element - Google Patents

Abstract

PURPOSE:To prevent color balance from being varied, by supplying an output signal of a solid state image pickup element to a level comparator, and reducing a correcting quantity of a smear correction or stopping its correction, in a non- linear area, by its output. CONSTITUTION:An output signal from a solid state image pickup element is digitized and supplied to a comparator 18. As for a switching circuit 20, its state is controlled by an output of the comparator 18. The comparator 18 compares an image pickup output from an A/D converter 15 with a reference level from a terminal 22, and when the image pickup output does not exceed the reference level, the circuit 20 becomes a state for selecting an input terminal 21A, and when it exceeds, said circuit becomes a state for selecting an input terminal 21B. Accordingly, in the range where the image pickup output is smaller than the reference level, a smear signal is subtracted from the image pickup output and the smear correction is executed. Also, when said output becomes larger, a signal to a subtracting circuit 12 becomes ''0'', and the smear correction is not executed.

Description

[Detailed Description of the Invention] This invention provides C0D-? The present invention relates to a smear correction circuit for a solid-state image sensor such as MO3.

A CCD, which is one type of solid-state image sensor, is composed of a photosensitive section 1, a storage section 2, and an output register 3 in FIG. The storage section 2 and the output register 3 are masked as shown by diagonal lines, and imaging light is incident on the photosensitive section 1 through a lens or the like.

The photosensitive section 1 and the storage section 2 each have a COD in the vertical direction.
It has two channels and is driven by a three-phase (two-phase or negative-phase) clock, and transfers signal charges in the vertical direction.

In the configuration shown in FIG. 1, as is well known as a frame transfer method, the photosensitive area is
During a short period of time during the vertical blanking period, the signal charge is accumulated in the accumulation section 2 in parallel in the vertical direction.
will be forwarded to. - Charges stored in the storage unit 2 are transferred to the output register 3 in an amount corresponding to /horizontal interval (/H) during the horizontal blanking period, and are sequentially read out from the output register 3 and output. From storage section 2 to output register 3
1 while the signal charge for /field r is transferred for
The photosensitive section 1 stores signal charges for the next field.

During the transfer of the charges corresponding to l fields and r from the photosensitive section 1 to the storage section 2, smear occurs due to the bright imaging light being incident on the photosensitive section 1. The occurrence of this smear will be explained with reference to FIG.

FIG. λA shows that certain images (not shown) are incident on the photosensitive section 1, and among them there is a bright image indicated by a hatched area 4A. - The CCD of the photosensitive section 1 illuminated by this bright image accumulates a corresponding charge. Next, charges are transferred from the photosensitive section 1 to the storage section 2 at high speed within one vertical blanking period. At this time,
Since the bright image remains projected, the potential well formed in the region 5A in Figure A passes under the bright image.

Although the transfer speed from the photosensitive section 1 to the storage section 2 is quite high, a certain amount of charge is generated by the bright image and accumulated in the potential well. As a result, when this transfer period ends, as shown in FIG.
The charges transferred from A are stored in the region 48, and smear charges exist in the region 58 of the storage section 2, corresponding to the region 5A. Further, smear charges also exist in the region 5C of the photosensitive section 1. This region 5C is a potential well that has moved under the bright image but has not yet reached the storage section 2.

Furthermore, in the next field, charges are similarly accumulated in the photosensitive section 1, and the charges are transferred from the accumulation section 2 to the output register 3, where they are sequentially output. At the end of the next field, smear charges are also generated in region 5D of storage section 2, as shown in FIG. 2C.

Because of the presence of such smear charge, when the output of the output register 3 is color encoded and applied to a monitor receiver, smear occurs, shown as the dotted line area in FIG.

The reproduced image after the first transfer is as shown in FIG. 3A.

That is, a dark spot 77B (dotted line area) corresponding to the area 5B is generated below the bright image 6 corresponding to the incident light on the area 4A. After the next transfer, as shown in FIG. 3B, corners 77B and 7D corresponding to areas 5B and 5D appear.

In the display in Figure 3A, only the / field appears, and normally,
The reconstructed image shown in FIG. 3B is visible.

In order to correct such smear, a structure shown in FIG. 1 has already been proposed. As shown in FIG. 17, the first to several lines of the photosensitive section 1 that are read out are masked. Further, the output of the output register 3 is supplied to a register 10 via a preamplifier 8 and a switch 9. Jin's register 10 is provided with a switch 11 for forming a circulation loop, and after information for one life is written in the register 10, Jin's information is transferred to switch 1.
It is held by jin which circulates through 1.

Only the smear signal is stored in the masked area of the photosensitive section 1, and this smear signal is taken into the register 10. Next, the switches 9 and 11 are switched from the state shown in FIG.
By supplying the smear signal from 0 to 0, an imaging signal from which the smear signal has been removed is obtained at the output terminal 13.

Incidentally, the COD cannot generate an imaging output of a predetermined level (2) or higher depending on the amount of charge handled. In FIG. S, s S1+ S2+ S'3 indicates a smear signal, and S4 indicates a video signal corresponding to a bright image, and this video signal S4 is superimposed on the smear signal S3. The video signal S4 originally has an amplitude of A, but cannot exceed a predetermined level vR corresponding to the amount of charge to be handled. Therefore, subtracting the smear signal −
Then, the amplitude of this video signal S4 will be reduced to A2. The predetermined level (■) indicates a range in which the amount of incident light and the output signal have a linear relationship, and when this predetermined level VR is exceeded, the output signal becomes a nonlinear region where the output signal is approximately saturated with respect to the amount of incident light. . Furthermore, the characteristics of the preamplifier to which the COD output signal is supplied are such that the video signal is saturated at a predetermined level or higher.

The present invention is intended to solve the problem that smear correction reduces the amplitude of the video signal and reduces the brightness, as described above.

An embodiment of the present invention will be described below with reference to FIG. In FIG. 6, 14 indicates an input terminal to which the imaging output from COD is supplied, and the imaging output from A7.
The signal is digitized by the converter 15 and supplied to one terminal 17A of the switch circuit 16, the level comparator 18, and the subtraction circuit 12.

7247 minutes of the digitized smear signal are written into the memory 19 via the terminal 17A of the switch circuit 16. As this memory 19, a register having a circular loop as described above, a RAM, or the like can be used. The smear signal read from the memory 19 is taken out to the other terminal 178 of the switch circuit 16 and further supplied to one input terminal 21A of the switch circuit 20. The other input terminal 21B of this switch circuit 20 is grounded. The output of this switch circuit 20 is
supplied to

The state of the switch circuit 20 is controlled by the output of the level comparator 18. This level comparator 18 compares the imaging output from the converter 15 and the reference level from the terminal 22, and when the imaging output does not exceed the reference level, the switch circuit 20 selects the input terminal 21A. Conversely, when the imaging output exceeds the reference level, the switch circuit 20 is in a state of selecting the input terminal 21B.

Therefore, in a range where the level of the imaging output is smaller than the reference level, the smear signal is subtracted from the imaging output in the subtraction circuit 12, similar to the smear correction circuit shown in FIG. 7, and smear correction can be performed. When the imaging output still exceeds the reference level, the signal to the subtraction circuit 12 becomes θ, and smear correction is not performed.

FIG. 7 shows another embodiment of the invention. In this example, smear correction is always performed by the subtraction circuit 12, and one input terminal 24BVCA/
In addition to supplying the output of the D converter 15, the other input terminal 24 also supplies the output of the AK subtraction circuit 12, and the state of this switch circuit 23 is controlled by the output of the level comparison circuit 18. b converter 15
When the imaging output from the input terminal is smaller than the reference level, input terminal 24A is selected; otherwise, input terminal 24A is selected.
4B is selected.

Further, FIG. 5 shows an embodiment in which the memory 19 is configured as a digital memory in the same manner as described above, and one readout output of the memory 19 is supplied to the converter 25 so as to be converted into an analog signal.

Therefore, in FIG. 5, the level comparison circuit 18, the subtraction circuit 12, and the switch circuit 23 are configured to handle analog signals.

In the embodiment shown in FIG. 5, since the ~t converter 15 only needs to digitize the smear signal, the number of pits can be reduced compared to digitizing the imaging signal, and the number of pits can be reduced. By using the number of bits, the quantization step can be made finer and precision can be increased.

FIG. 9 shows the het converter 15 and D7 as described above.
．． A converter 25 is provided to digitize only the smear signal. This A7. Converter 15 and D7. The peak level of the smear signal is used as the converter 250 reference. Therefore, the input signal is supplied to the peak hold circuit 26, and its output is
．． It is supplied to converter 15, D/, and converter 25 as a reference signal.

In the configuration shown in FIG. 2, a case will be described in which an imaging signal shown in FIG. 1A is supplied to the input terminal 14. Only the smear signal appears during the first 3H period of the imaging signal/field. This is because the area for three lines in the photosensitive section 1 is masked.

/ With the first timing of the field, Figure 1θB
A reset pulse Pr indicated by the IC is generated, and the peak hold circuit 26 is reset by this. Next, the 70th
The imaging signal is sampled and held by the Hall pulse ph shown in FIG.

This sample and hold output is supplied to the A, B converter 15 as a reference signal, and the smear signal present in the next horizontal section is digitized and written into the memory 19. Furthermore, in the next horizontal interval, the output of the memory 19 is read out and converted into an analog signal in the converter 25. The reference signal at the time of this analogization is also the same as described in A7. The same one used during conversion is used. In this way, it is possible to reduce the quantization error when the level of the smear signal is small by changing the reference signal for A conversion and ρ conversion according to the level of the actually existing smear signal. It becomes possible.

Note that, as in the above embodiment, instead of stopping the smear correction, the amount of smear correction may be reduced to several minutes/approximately. However, the present invention is not limited to the frame transfer method, but can also be applied to CCDs using the vertical interline transfer method.

As understood from the above description, according to the present invention,
Perform smear correction when the output of the solid-state image sensor is saturated.In this case, the level of the video signal becomes smaller than its original size, or the color balance (in the case of a color video signal) changes. can be prevented.

[Brief explanation of the drawing]

Figure 1 is a route map used to explain an example of a conventional CCD, Figures 2 and 3 are route maps used to explain smear generation, and Figures 7 and 5 are used to explain a conventional smear correction circuit. The block diagram and waveform diagram, FIG. 6, FIG. 7, FIG. g, and FIG. 9 are block diagrams showing each embodiment of this invention, and FIG. It is a waveform diagram used. 1...Photosensitive section, 2...Accumulation section, 3...Output register, 12...
...Subtraction circuit, 13...Output terminal, 14...Input terminal, 18...
...Level comparison circuit, 19...Memory. Agent Tadashi Sugiura Figure 1 Figure 2 Figure 4 Figure 5 To 1st - Gate

Claims (1)

[Claims] The output signal of the solid-state image sensing device is supplied to a level comparator, and the reference level corresponding to the boundary between the linear region where a dead output is obtained in proportion to the imaging light and the nonlinear region where the output is approximately saturated with respect to the imaging light and the reference level described above. A smear correction circuit for a solid-state image sensor, which compares output signals and is configured to reduce a correction amount of smear correction or stop smear correction in the nonlinear region based on the output of the level comparator.