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JPS59228770A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS59228770A
JPS59228770A JP58103797A JP10379783A JPS59228770A JP S59228770 A JPS59228770 A JP S59228770A JP 58103797 A JP58103797 A JP 58103797A JP 10379783 A JP10379783 A JP 10379783A JP S59228770 A JPS59228770 A JP S59228770A
Authority
JP
Japan
Prior art keywords
fet
semiconductor device
mesfet
compound semiconductor
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58103797A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP58103797A priority Critical patent/JPS59228770A/en
Publication of JPS59228770A publication Critical patent/JPS59228770A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes
    • H10D30/801FETs having heterojunction gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82Heterojunctions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/602Heterojunction gate electrodes for FETs

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain a semiconductor device adapted for high integration and high speed by forming the gate electrodes of MESFET, MISFET, J-FET formed on the surface of a compound semiconductor of Si. CONSTITUTION:A field oxidized film 2 is formed on the Surface of an Si substrate 1. An Si gate 6 is interposed between a source region 4 and a drain region 5 on an InP epitaxial film 3 fored on the region surrounded by the film 2. When the gate electrode or the like of an MESFET is formed of Si, since the microminiaturization of the Si is more ready than other metal, a semiconductor device adapted for high integration and high speed can be obtained. This method can be used for not only the MESFET of compound semiconductor but also MISFET and J-FET.

Description

【発明の詳細な説明】 本発明は化合物半導体による装置構造に係シ、とシわけ
電極構造に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device structure using a compound semiconductor, and more particularly to a partitioned electrode structure.

従来、化合物半導体装置におけるMES  FET、M
工S  FETおよびJ  FETのゲート電極は、金
、AC等の金属が用いられるのが通例であった。
Conventionally, MES FET, M
It has been customary to use metals such as gold and AC for the gate electrodes of S FETs and J FETs.

しかし、上記従来技術による化合物半導体装置では、ゲ
ート電極巾や電極間隔が微小化できず、高速化や高集積
化必ずしも適していないとじう欠点があった。
However, the compound semiconductor device according to the above-mentioned conventional technology has the drawback that the gate electrode width and the electrode spacing cannot be miniaturized, and the device is not necessarily suitable for high speed and high integration.

本発明は、かかる従来技術の欠点をなくシ、微小な電極
巾や電極間隔を可能とし、高速化及び高集積化に向いた
化合物半導体装置の電極構造を提供することを目的とす
る。
SUMMARY OF THE INVENTION It is an object of the present invention to provide an electrode structure for a compound semiconductor device that eliminates the drawbacks of the prior art, enables minute electrode widths and electrode spacing, and is suitable for higher speed and higher integration.

上記目的を達成するための本発明の基本的な構成は、半
導体装置において、化合物半導体表面に形成されるME
S  FET、M工S  FETあるいはJ−FETの
少なくともゲート電極がシリコンで形成されることを特
徴とすること、及び前記シリコン・ゲート電極の少なく
とも側面を含む表面が酸化膜で被覆されて成る事を特徴
とする。
The basic structure of the present invention for achieving the above object is that in a semiconductor device, ME formed on the surface of a compound semiconductor
At least the gate electrode of the S FET, M S FET, or J-FET is formed of silicon, and the surface including at least the side surfaces of the silicon gate electrode is coated with an oxide film. Features.

以下、笑施例により本発明を詳述する。Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示すMES  FETの要
部の断面図である。s7基板1の表面に形成されたフィ
ールド酸化膜2に囲まれた領域に形成された工npエピ
タキシャル膜3には、ソース領域4.ドレイン領域5に
挾まれてs7ゲート電極6が形成され、該siゲグー電
極6の表面には酸化膜7が形成され、ソース電極41.
ドレイン電極51がゲート電極6と酸化膜を挾んでオー
バー−ヲツブされて成る。
FIG. 1 is a sectional view of a main part of a MES FET showing an embodiment of the present invention. A source region 4. An S7 gate electrode 6 is formed between the drain regions 5, an oxide film 7 is formed on the surface of the S7 gate electrode 6, and a source electrode 41.
A drain electrode 51 is formed by over-waving the gate electrode 6 and the oxide film between them.

上記の如く、ゲート電極等の電極をsiで形成すること
によJ、87の微細加工が他の金属よシ容易なことから
、高集積化が出来、かつ、高速化に向いた半導体装置と
することができる効果がある。
As mentioned above, by forming electrodes such as gate electrodes with Si, microfabrication of J, 87 is easier than with other metals, making it possible to achieve high integration and make semiconductor devices suitable for higher speeds. There is an effect that can be done.

本発明は化合物半導体によるMPS  FETのみなら
ず、M工S  FEiT、およびJ−FETに用いるこ
とができる。
The present invention can be used not only for MPS FETs using compound semiconductors, but also for MPS FEiTs and J-FETs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す化合物半導体によるM
ES  FF1Tの要部の断面図である。 1・・SZ基板、2・・フィールド酸化膜3 @ 、 
InPエピタキシャル膜 4e・ソース領域 5・・ドレイン領域6・llSiゲ
ート  7・・酸化膜 41・・ソース電極  51・・ドレイン電極以   
上 出願人 株式会社諏訪精工舎 代理人 弁理士量 上  務
FIG. 1 shows an M formed by a compound semiconductor showing one embodiment of the present invention.
It is a sectional view of the main part of ES FF1T. 1...SZ substrate, 2...Field oxide film 3 @,
InP epitaxial film 4e, source region 5, drain region 6, 11Si gate 7, oxide film 41, source electrode 51, drain electrode and beyond
Upper applicant Suwa Seikosha Co., Ltd. Agent Patent attorney amount Upper affairs

Claims (1)

【特許請求の範囲】 1、化合物半導体表面に形成されるMES、FET、M
工S  FETある騒はJ−FET(接合型FET)の
少なくともゲート電極がシリコンで形成されて成ること
を特徴とする半導体装置。 2、シリコン・ゲート電極の少なくとも側面を含む表面
が酸化膜で被ωされて成る事を特徴とする特許請求の範
囲比1項記載の半導体装置。
[Claims] 1. MES, FET, M formed on the surface of a compound semiconductor
S-FET is a semiconductor device characterized in that at least the gate electrode of a J-FET (junction type FET) is made of silicon. 2. The semiconductor device according to claim 1, wherein the surface of the silicon gate electrode, including at least the side surfaces thereof, is coated with an oxide film.
JP58103797A 1983-06-10 1983-06-10 Semiconductor device Pending JPS59228770A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58103797A JPS59228770A (en) 1983-06-10 1983-06-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58103797A JPS59228770A (en) 1983-06-10 1983-06-10 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS59228770A true JPS59228770A (en) 1984-12-22

Family

ID=14363383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58103797A Pending JPS59228770A (en) 1983-06-10 1983-06-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS59228770A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60261177A (en) * 1984-06-08 1985-12-24 Agency Of Ind Science & Technol Compound semiconductor field effect transistor
EP1643645A1 (en) * 2004-09-30 2006-04-05 Fujitsu Limited Rectifier circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60261177A (en) * 1984-06-08 1985-12-24 Agency Of Ind Science & Technol Compound semiconductor field effect transistor
EP1643645A1 (en) * 2004-09-30 2006-04-05 Fujitsu Limited Rectifier circuit
US7732945B2 (en) 2004-09-30 2010-06-08 Fujitsu Limited Rectifier circuit
EP1643645B1 (en) * 2004-09-30 2017-08-30 Fujitsu Limited Rectifier circuit

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