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JPS59226320A - Semiconductor diffraction grating - Google Patents

Semiconductor diffraction grating

Info

Publication number
JPS59226320A
JPS59226320A JP58101133A JP10113383A JPS59226320A JP S59226320 A JPS59226320 A JP S59226320A JP 58101133 A JP58101133 A JP 58101133A JP 10113383 A JP10113383 A JP 10113383A JP S59226320 A JPS59226320 A JP S59226320A
Authority
JP
Japan
Prior art keywords
semiconductor
semiconductor layer
diffraction grating
layer
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58101133A
Other languages
Japanese (ja)
Inventor
Yuzaburo Ban
雄三郎 伴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58101133A priority Critical patent/JPS59226320A/en
Publication of JPS59226320A publication Critical patent/JPS59226320A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
    • G02F1/025Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction in an optical waveguide structure
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
    • G02F1/0151Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction modulating the refractive index
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/30Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 grating
    • G02F2201/305Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 grating diffraction grating
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00Function characteristic
    • G02F2203/22Function characteristic diffractive

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To make diffraction efficiency changeable by a reverse bias voltage by forming (+) conduction type semiconductor layers divided at a specified interval on a semiconductor layer of a (-) conduction type and providing an electrode layer and a voltage impressing device so that the p-n junction interface is reverse biased. CONSTITUTION:A p-InP: Zn (10<16>cm<-3> impurity concn.) crystal or the like is used as a substrate 1 and semiconductor layers 2 of n-InP: Sn (10<16>cm<-3> impurity concn.) or the like are formed thereon at every specified interval. Metallic electrode layers 3 consisting of 10% Sn/Au, etc. are formed on the layers 2 and an electrode layer 4 consisting of 10% Zn/Au is formed on the bottom surface of the substrate 1. When the p-n junction interface between the substrate 1 and the electrode layers is reverse biased by a voltage impressing device 5, a diffraction grating having the diffraction efficiency variable with the magnitude of the impressed voltage is obtd. The diffraction grating is thus made suitable as a diffraction grating particularly for a distribution feedback type semiconductor laser or the like which is a light source for stabilizing wavelength.

Description

【発明の詳細な説明】 産業上の利用分野 本発明による半導体回折格子は、本来の光の特性を利用
した分野で用いることができる。光通信分野は言うまで
もなく、最近急速な発展をしている光デイスク関連分野
に有用である。特に波長安定化光源および光IC用光源
である分布帰還型半導体レーザーやブラッグ反射帰還型
半導体レーザー用の回折格子として利用できる。さらに
将来的に光論理回路の一構成素子にもなり、光コンピュ
ター分野での利用も可能である。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The semiconductor diffraction grating according to the present invention can be used in fields that utilize the inherent characteristics of light. It is useful not only in the field of optical communications but also in fields related to optical disks, which have been rapidly developing recently. In particular, it can be used as a diffraction grating for distributed feedback semiconductor lasers and Bragg reflection feedback semiconductor lasers, which are wavelength stabilized light sources and light sources for optical ICs. Furthermore, in the future, it can become a constituent element of optical logic circuits and can be used in the field of optical computers.

従来例の構成とその問題点 従来の半導体回折格子は、半導体表面に周期的に凸凹を
形成して屈折率変化の周期構造を実現したものである。
Structure of a conventional example and its problems A conventional semiconductor diffraction grating realizes a periodic structure of changing refractive index by periodically forming irregularities on a semiconductor surface.

これらは既に分布帰還型半導体レーザーやブラッグ反射
帰還型半導体レーザーに応用されている。しかしこの従
来の半導体回折格子では、その屈折率変化の周期構造が
半導体表面に形成された凸凹の形状および、用いた半導
体材料の屈折率で一義的に決定されてしまい、回折格子
形成後に屈折率の周期的変化を外部から変調することは
不可能であった。すなわち回折格子の回折効率が、その
形状と用いた材料の屈折率で決定されてしまい、外部か
ら変化させることは不可能であった。
These have already been applied to distributed feedback semiconductor lasers and Bragg reflection feedback semiconductor lasers. However, in this conventional semiconductor diffraction grating, the periodic structure of the refractive index change is uniquely determined by the shape of the unevenness formed on the semiconductor surface and the refractive index of the semiconductor material used. It was not possible to externally modulate the periodic changes in . That is, the diffraction efficiency of a diffraction grating is determined by its shape and the refractive index of the material used, and it has been impossible to change it from the outside.

発明の目的 本発明は上記したような従来における問題点を改善し、
回折効率の変調を実現するだめ、丑だ将来的に光集積回
路の一構成素子を前提として、新しい構造の半導体回折
格子を提供するものである。
Purpose of the Invention The present invention improves the conventional problems as described above,
In order to achieve modulation of diffraction efficiency, the present invention provides a semiconductor diffraction grating with a new structure, assuming that it will be used as a constituent element of an optical integrated circuit in the future.

発明の構成 本発明にかかる半導体回折格子は、−導電型を有する第
1の半導体層と、前記第1の半導体層」二に形成され、
一定間隔に分割された第1の半導体層と異なる導電型を
有する第2の半導体層と、前記第2の半導体層上に形成
された第1の電極層と、前記第1の半導体層の下表面す
なわち前記第2の半導体層が形成されていない表面に形
成された第2の電極層と、前記第1の電極層と前記第2
の電極層との間に電圧を印加する手段とから構成されて
いる。
Structure of the Invention A semiconductor diffraction grating according to the present invention is formed in a first semiconductor layer having a -conductivity type, and the first semiconductor layer,
a second semiconductor layer having a conductivity type different from that of the first semiconductor layer divided at regular intervals; a first electrode layer formed on the second semiconductor layer; and a bottom layer of the first semiconductor layer. a second electrode layer formed on the surface, that is, a surface on which the second semiconductor layer is not formed, the first electrode layer and the second electrode layer;
and means for applying a voltage between the electrode layer and the electrode layer.

実施例の説明 一般に半導体回折格子では、前記第1の半導体層を伝搬
する光は前記第1の半導体層上の屈折率の周期的変化す
なわち前記第2の半導体層の屈折率と、前記第2の半導
体層が形成されていない部分の屈折率の周期的変化によ
り回折を起こす。またその回折効率は、前記第2の半導
体層の屈折率と前記第2の半導体層が形成されていない
部分の屈折率差に比例する。本発明による半導体回折格
子によれば、従来の半導体回折格子と同様に、第1の半
導体層を伝搬する光は、第2の半導体層の埋折率と前記
第2の半導体層が形成されていない部分の屈折率の周期
的変化により回折を起こす。
DESCRIPTION OF EMBODIMENTS Generally, in a semiconductor diffraction grating, light propagating through the first semiconductor layer has periodic changes in the refractive index on the first semiconductor layer, that is, the refractive index of the second semiconductor layer and the second semiconductor layer. Diffraction occurs due to periodic changes in the refractive index of the portions where no semiconductor layer is formed. Further, the diffraction efficiency is proportional to the difference in refractive index between the second semiconductor layer and the portion where the second semiconductor layer is not formed. According to the semiconductor diffraction grating according to the present invention, similarly to conventional semiconductor diffraction gratings, light propagating through the first semiconductor layer depends on the embedding index of the second semiconductor layer and the formation of the second semiconductor layer. Diffraction occurs due to periodic changes in the refractive index of the non-containing parts.

しかし、前記第1の半導体層と前記第2の半導体層のp
 −n接合界面に逆バイアスがかかるように電圧を印加
すると前記第2の半導体層の屈折率が増大して、屈折率
の周期的変化が変調され、その結果回折効 も増大する
。なぜならば、逆バイアスを印加すると空乏層が広がり
、前記第2の半導体層中のキャリア濃度が減少して屈折
率が増大し、その結果前記第2の半導体層が形成されて
いない部分との屈折率差が増大して回折効率も増大する
わけである。 ′ このように本発明によれば、外部からの印加する電圧の
大きさによって、回折効率を変化させることが可能であ
る。
However, the p of the first semiconductor layer and the second semiconductor layer
When a voltage is applied so as to apply a reverse bias to the -n junction interface, the refractive index of the second semiconductor layer increases, the periodic change in the refractive index is modulated, and as a result, the diffraction effect also increases. This is because when a reverse bias is applied, the depletion layer expands, the carrier concentration in the second semiconductor layer decreases, and the refractive index increases, resulting in refraction with the part where the second semiconductor layer is not formed. As the index difference increases, the diffraction efficiency also increases. ' As described above, according to the present invention, it is possible to change the diffraction efficiency depending on the magnitude of the voltage applied from the outside.

実施例1 本発明による半導体回折格子においてInPを用いた場
合の構成例の断面図を第1図に示す。すなわち基板結晶
1としてP −InP: Zn (不純物濃度10  
cm  )結晶を用い、その上に一定間隔(0,4μm
)毎に形成される幅0.4μm、厚み0.4μmの半導
体層2としてはn−1nP;Sn(不純物濃度10  
cm  )を用いる。また半導体層2の上に形成される
金属からなる電極層3には10% Sn/Auを、また
基板結晶1の下表面に形成される金属からなる電極層4
には1o%Zn/Auを用いる。さらに前記電極層3と
前記電極層4との間に電圧を印加する装置5を設ける。
Example 1 FIG. 1 shows a cross-sectional view of a configuration example in which InP is used in a semiconductor diffraction grating according to the present invention. That is, as the substrate crystal 1, P-InP: Zn (impurity concentration 10
cm ) crystals are used, and a certain interval (0.4 μm) is placed on top of the crystal.
), the semiconductor layer 2 with a width of 0.4 μm and a thickness of 0.4 μm is formed with n-1nP;Sn (impurity concentration 10
cm) is used. Further, an electrode layer 3 made of metal formed on the semiconductor layer 2 is made of 10% Sn/Au, and an electrode layer 4 made of metal formed on the lower surface of the substrate crystal 1 is used.
10% Zn/Au is used. Furthermore, a device 5 for applying a voltage between the electrode layer 3 and the electrode layer 4 is provided.

2は光である。2 is light.

本発明によるこの半導体回折格子は、外部電圧を印加し
ない場合は、従来の半導体回折格子と同じ働きしか示さ
ない。しかし基板結晶1と半導体層2のp−n接合界面
に逆バイアスが印加されるように、電極層3と電極層4
との間に電圧をかけると回折効率が可変の回折格子とし
ての働きを示すことになる。すなわち、逆バイアスを印
加すると半導体層1と半導体層2のp −n接合界面に
存在する空乏層が広がり、その結果ヤヤリア濃度が減少
して屈折率が増大する。まだ印加する逆バイアスを大き
くすると、空乏層も大きくなるので、逆バイアスの大き
さによって屈折率の増大部分を変化させることが可能と
なる。この結果、回折効率が可変となるわけである。本
実施例ではInPを材料として用いだがInGaAsP
 等の混晶を用いても同様に実現される。   ′ 実施例2 次に本発明による半導体回折格子において、基板結晶1
と半導体層20間に、特に光aの光導波路層6を備えた
混合の具体的な構成例を第2図に示す、この場合光導波
路層となる半導体層にはp−InGaAsP  四元混
晶を用い、その他は実施例1で用いた材料と同一のもの
で構成される。寸だこの場合の電圧印加方法および回折
格子全体の働きも、実施例1の場合と変わりはない。
This semiconductor grating according to the invention exhibits only the same behavior as a conventional semiconductor grating when no external voltage is applied. However, the electrode layer 3 and the electrode layer 4 are arranged so that a reverse bias is applied to the p-n junction interface between the substrate crystal 1 and the semiconductor layer 2.
When a voltage is applied between them, it functions as a diffraction grating with variable diffraction efficiency. That is, when a reverse bias is applied, the depletion layer existing at the p-n junction interface between the semiconductor layer 1 and the semiconductor layer 2 expands, and as a result, the Yayaria concentration decreases and the refractive index increases. If the applied reverse bias is increased, the depletion layer also becomes larger, so it is possible to change the increased portion of the refractive index depending on the magnitude of the reverse bias. As a result, the diffraction efficiency becomes variable. In this example, InP is used as the material, but InGaAsP is used as the material.
The same effect can be achieved by using a mixed crystal such as . ' Example 2 Next, in the semiconductor diffraction grating according to the present invention, the substrate crystal 1
FIG. 2 shows a specific example of a mixed structure including an optical waveguide layer 6 for light a between the semiconductor layer 20 and the semiconductor layer 20. In this case, the semiconductor layer serving as the optical waveguide layer is made of p-InGaAsP quaternary mixed crystal. The other components are the same as those used in Example 1. In this case, the voltage application method and the function of the entire diffraction grating are the same as in the first embodiment.

実施例3 次に本発明による半導体回折格子において一定間隔に分
割された半導体層2のそれぞれの間が半絶縁性の半導体
層あるいは前記半導体層2と異なる導電型を有する半導
体層7で埋められている場合の具体的な構成例を第3図
に示す。この場合の半導体層7には虻イオン注入InP
層あるいはp−InP; Zn (不純物濃度1016
an−5)を用い、その他は実施例1で用いた材料と同
一のもので構成される。またこの場合の電圧印加方法お
よび回折格子全体の働きも、実施例1の場合と変わりは
ない。
Example 3 Next, in the semiconductor diffraction grating according to the present invention, the spaces between the semiconductor layers 2 divided at regular intervals are filled with a semi-insulating semiconductor layer or a semiconductor layer 7 having a conductivity type different from that of the semiconductor layer 2. A specific example of the configuration is shown in FIG. In this case, the semiconductor layer 7 is ion-implanted with InP.
layer or p-InP; Zn (impurity concentration 1016
an-5), and the other materials were the same as those used in Example 1. Further, the voltage application method and the function of the entire diffraction grating in this case are also the same as in the first embodiment.

また以上述べた実施例においてはInP −InGaA
sP系半導体において説明したが、GaAs−GaAR
As系などの他の■−V族半導体においても同様に実現
されるばかりでなく、更にZn5e等のn−Vl族化合
物半導体においても可能であり、II−Vl族と■−V
族半導体を同時に用いても実現は可能である。
Furthermore, in the embodiments described above, InP-InGaA
Although it was explained in terms of sP-based semiconductors, GaAs-GaAR
Not only can it be realized in the same way with other ■-V group semiconductors such as As-based semiconductors, but also with n-Vl group compound semiconductors such as Zn5e.
It is also possible to realize this by using group semiconductors at the same time.

発明の詳細 な説明したように、本発明による半導体回折格子は半導
体回折格子の凸部を構成する半導体層とその下部半導体
の導電型を相異なるものにし、そのp−n接合界面に逆
バイアスを印加できるように電極層と電圧印加装置とを
(+iiiえたものであり、逆バイアス電圧の大きさに
よりその回折効率が変化可能という効果がある。また本
発明による半導体回折格子を分布帰還型半導体レーザー
やブラッグ半対型半導体レーザー用回折格子として用い
た場合、レーザー光の帰還量を変調することが可能であ
り、しだがって半導体レーザーからの出射光の変調を可
能にするものである。
As described in detail, the semiconductor diffraction grating according to the present invention has a semiconductor layer constituting the convex portion of the semiconductor grating and a semiconductor layer below the semiconductor layer having different conductivity types, and a reverse bias is applied to the p-n junction interface. The electrode layer and the voltage application device (+iii) are arranged so that the voltage can be applied, and the diffraction efficiency can be changed depending on the magnitude of the reverse bias voltage. When used as a diffraction grating for a Bragg semi-pair type semiconductor laser, it is possible to modulate the amount of feedback of the laser light, and therefore it is possible to modulate the light emitted from the semiconductor laser.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の半導体回折格子の断面図、
第2図は光導波路層を備えた半導体回折格子の断面図、
第3図は半導体層の間が半絶縁性の半導体層あるいは前
記半導体層と異なる導電型を有する半導体層で埋められ
た半導体回折格子の断面図である。 1・・・・・・p−InP基板、2・・・・・・n−I
nP基板層、3.4・・・・・・電極層、5・・・・・
・電圧印加装置、6・・・・・・p −InGaAsP
光導波路層、7・・・・・・B イオン注入InP層あ
るいはp−InP層。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名−1
FIG. 1 is a cross-sectional view of a semiconductor diffraction grating according to an embodiment of the present invention;
Figure 2 is a cross-sectional view of a semiconductor diffraction grating equipped with an optical waveguide layer;
FIG. 3 is a cross-sectional view of a semiconductor diffraction grating in which the spaces between the semiconductor layers are filled with a semi-insulating semiconductor layer or a semiconductor layer having a conductivity type different from that of the semiconductor layer. 1... p-InP substrate, 2... n-I
nP substrate layer, 3.4... Electrode layer, 5...
・Voltage application device, 6...p-InGaAsP
Optical waveguide layer, 7...B Ion-implanted InP layer or p-InP layer. Name of agent: Patent attorney Toshio Nakao and 1 other person-1
(

Claims (2)

【特許請求の範囲】[Claims] (1)−導電型を有する第1の半導体層と、前記第1の
半導体層上に形成され、一定間隔に分割された前記第1
の半導体層と異なる導電型を有する第2の半導体層と、
前記第2の半導体層上に形成された第1の電極層と、前
記第1の半導体層の前記第2の半導体層が形成されてい
ない表面に形成された第2の電極層と、前記第1の電極
層と前記第2の電極層との間に電圧を印加する電圧印加
手段とを有する半導体回折格子。
(1) - A first semiconductor layer having a conductivity type, and a first semiconductor layer formed on the first semiconductor layer and divided at regular intervals.
a second semiconductor layer having a conductivity type different from that of the semiconductor layer;
a first electrode layer formed on the second semiconductor layer; a second electrode layer formed on the surface of the first semiconductor layer on which the second semiconductor layer is not formed; A semiconductor diffraction grating comprising a voltage applying means for applying a voltage between the first electrode layer and the second electrode layer.
(2)一定間隔に分割された第2の半導体層の間に、半
絶縁性の半導体層あるいは前記第2の半導体層と異なる
導電型を有する半導体層を有することを特徴とする特許
請求の範囲第1項に記載の半導体回折格子。
(2) A claim characterized in that a semi-insulating semiconductor layer or a semiconductor layer having a conductivity type different from that of the second semiconductor layer is provided between the second semiconductor layers divided at regular intervals. The semiconductor diffraction grating according to item 1.
JP58101133A 1983-06-06 1983-06-06 Semiconductor diffraction grating Pending JPS59226320A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58101133A JPS59226320A (en) 1983-06-06 1983-06-06 Semiconductor diffraction grating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58101133A JPS59226320A (en) 1983-06-06 1983-06-06 Semiconductor diffraction grating

Publications (1)

Publication Number Publication Date
JPS59226320A true JPS59226320A (en) 1984-12-19

Family

ID=14292577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58101133A Pending JPS59226320A (en) 1983-06-06 1983-06-06 Semiconductor diffraction grating

Country Status (1)

Country Link
JP (1) JPS59226320A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2715251A1 (en) * 1994-01-20 1995-07-21 Christophe Kazmierski Semiconductor structure with a virtual diffraction grating
US5581572A (en) * 1994-02-11 1996-12-03 France Telecom Wavelength-tunable, distributed bragg reflector laser having selectively activated, virtual diffraction gratings
EP1402298A4 (en) * 2001-05-17 2006-05-17 Optronix Inc Electronic semiconductor control of light in optical waveguide
JP2010199158A (en) * 2009-02-23 2010-09-09 National Institute Of Information & Communication Technology Optical waveguide type semiconductor and method for manufacturing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5194975A (en) * 1974-09-06 1976-08-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5194975A (en) * 1974-09-06 1976-08-20

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2715251A1 (en) * 1994-01-20 1995-07-21 Christophe Kazmierski Semiconductor structure with a virtual diffraction grating
EP0664588A1 (en) * 1994-01-20 1995-07-26 France Telecom Semiconductor structure with virtual diffraction lattice
US5821570A (en) * 1994-01-20 1998-10-13 France Telecom Etablissement Autonome De Droit Public Semiconductor structure having a virtual diffraction grating
US5581572A (en) * 1994-02-11 1996-12-03 France Telecom Wavelength-tunable, distributed bragg reflector laser having selectively activated, virtual diffraction gratings
EP1402298A4 (en) * 2001-05-17 2006-05-17 Optronix Inc Electronic semiconductor control of light in optical waveguide
JP2010199158A (en) * 2009-02-23 2010-09-09 National Institute Of Information & Communication Technology Optical waveguide type semiconductor and method for manufacturing the same

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