JPS59220837A - Digital comparator circuit with hysteresis - Google Patents

Abstract

PURPOSE:To obtain comparison outputs with hysteresis by comparing the values in magnitude of plural input signals with one another and outputting a high-level signal to an output terminal, and inputting it to a set/reset FF circuit. CONSTITUTION:(n) units of digital comparators 1 are cascaded successively in digit order and (n)-digit signals are compared. Further, output terminals 2 and 4 of the final-stage circuit 1 are connected to inputs of the set/reset FF5, which operates so as to give the hysteresis to the comparison outputs of the comparators. Namely, the circuits compare the values of input signals A and B to output high-level signals to output terminals 2 (A>B), 3 (A=B), and 4 (A<B), and they are inputted to the FF5. Thus, comparison outputs which are obtained by giving reference or set signals to be compared with some specific width and eliminated the influence of a flicker, namely, with hysteresis are obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION This item #3 relates to an improvement of a digital connominator circuit.

The digital comparator circuits 1-6 compare the reference digital value or set digital value with the digital value at the edge of operation, and based on the comparison result, for example, it is used in equipment in the field of the gods that needs to control the operation. It is applied. By the way, in the conventional digital computer circuit, there are two BODs.
When comparing the names, there is no hysteresis, so the name eclipse is A.
/ If the signal has a lot of flickering, such as the output of a D converter, an inconvenient flicker will occur in the comparison output. Therefore, if such a comparison output is used to control the operation of a device (for example, controlling the operation of a divine valve in a vacuum device), operations that are unnecessary for actual calculation or excessive operations may be performed as a result. Otherwise, it may cause failure or malfunction.

Therefore, the purpose of this invention is to provide a certain width to the reference signal or setting signal to be compared in this divine digital comparator circuit, eliminate the influence of signal flickering as described above, and produce a comparison output with so-called hysteresis. Therefore, the digital converter circuit with hysteresis using EIIJ is as follows.
Connect multiple digital converters that compare two BOD signals of each digit (Next cascade) Connection Ls Connect a set-reset fritz 70 tube to the output side of the cascade-connected digital converters. It is a feature.

The present invention will be further explained below based on the accompanying drawings.

The illustrated devices are constructed to compare signals of one digit, and n digital comparators 1 are successively connected in cascade in the order of digits as shown in FIG. Only three connominators are shown in the drawing: the digit 1, the digit 10n-2, and the digit 70n-1.

In each connominator-l, the symbols lΔ, /Btj represent the input terminals of the BOD signal of the digit associated with it, respectively, and the four input terminals Ao, AI.

It consists of A2, A3 and BoyBl 1B2 +B3.

Also, the code λ, 3. represents the output terminal of the final stage of the comparator. The output terminals of the final stage connominator l are connected to the inputs of a set-reset flip-flop j, and the set-reset flip-flop j acts to introduce hysteresis into the comparison output of the comparator.

In Fig. 2, a signal B is inputted to the input terminal group /f3 of the controller 7, and an input signal A is inputted to the input terminal group /A.
This shows the behavior when changing the value.

As can be seen from this figure, the comparison output A>B signal is obtained only when A becomes 6 or more for B-j, and vice versa.
When becomes less than or equal to Hiro, the A(B signal is output. Therefore, a hysteresis width of ±l is provided for the signal 13=j. Also, the input terminal group /A, /
By connecting both the input terminals Ao and Bo of the lowest digit in B to the connection terminal Vss, the hysteresis width can be reduced to 2.
can be doubled, and thus the hysteresis width can be chosen arbitrarily.

Thus, the digital connominator according to the present invention
In the circuit, input signal A is input to digital comparator l.
, compare the magnitude of the value of B, and output terminal -2 (A>B), 3
(A=B), send a high level signal to 4'(A<8),
By inputting this to the set/reset flip-flop j, a comparison output with hysteresis is obtained, so a stable comparison output can be obtained from the flickering BOD(q).

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a digital comparator circuit according to the present invention, and FIG. 2 is an explanatory diagram of its operation. In the figure, l: comparator, j two-set reset flip-flop.

Claims (1)

[Claims] A plurality of digital comparators that compare two BOD signals of each digit are connected in cascade (1), and a set-reset fritz is connected to the output side of the cascade-connected digital comparator. An f I talcon regulator with hysteresis, characterized in that it is configured to output a comparison output with hysteresis.
circuit.