JPS59198054A - Automatic frequency control system - Google Patents
Automatic frequency control systemInfo
- Publication number
- JPS59198054A JPS59198054A JP7245383A JP7245383A JPS59198054A JP S59198054 A JPS59198054 A JP S59198054A JP 7245383 A JP7245383 A JP 7245383A JP 7245383 A JP7245383 A JP 7245383A JP S59198054 A JPS59198054 A JP S59198054A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- signal
- integrator
- controlled oscillator
- voltage controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 4
- 206010011224 Cough Diseases 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
- 101000767160 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) Intracellular protein transport protein USO1 Proteins 0.000 description 7
- 230000010355 oscillation Effects 0.000 description 3
- OUBORTRIKPEZMG-UHFFFAOYSA-N INT-2 Chemical compound Nc1c(ncn1-c1ccc(F)cc1)C(=N)C#N OUBORTRIKPEZMG-UHFFFAOYSA-N 0.000 description 2
- 101001060278 Xenopus laevis Fibroblast growth factor 3 Proteins 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/16—Frequency regulation arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
(a) 発明の技術分野
本発明はFSI((FrequencyShift T
(eying)通信方式に係り、特に該FSK通信方式
に於ける自動周波数制御方式に関するものであるn0)
従来技術と問題点
FSK通信方式に於て受信されたF’SK変調波を用い
て直接自動周波数制御(A F Cと略)を施すことは
行なわれずに、一般には/くイロット信号を用いてこれ
を行っている。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to FSI ((FrequencyShift T
(eying) related to communication systems, especially automatic frequency control systems in the FSK communication system n0)
Prior art and problems In the FSK communication system, automatic frequency control (abbreviated as AFC) is not performed directly using the received F'SK modulated wave, but is generally performed using a pilot signal. doing this.
第1図及び第2図は従来のF S X通信方式用人−F
C方式のブロック図及び信号配列図である。Figures 1 and 2 show the conventional FSX communication system user-F.
FIG. 2 is a block diagram and a signal arrangement diagram of the C method.
第2図に示すように信号はディジタル信号成分DSとパ
イロット信号成分PSとから、構成されているが、この
ような信号でFSX変調された搬送波は第1図に示すl
i” S K受信装置で受信され受信入力信号に周波数
変換器CON 6i1入力端子INに加えられる。こ\
で”電圧制御発振器vCOからの出力信号と混合されて
中間周波数(例えば10.7MHz)に周波数変換され
て出力端子outから外部に取り出されるが一部は帯域
r波器BPF−1に加えられこ\でパイロット信号成分
PSが取り出される。この信号成分PSは周波数弁別器
DISに加えられこ\でパイロット周波数の周波数誤差
成分を取り田し低域P波器LPFを通して電圧制御発振
器VCOに加え、この周波数弁別器DIRの出力がOに
なるようにこの電圧制御発振器vCOの発振周波数全1
iilJ御する0これにより周波数変換器CONの出力
信号にSまれるパイロット信号成分PSは足められた周
波数になり、パイロット信号成かとディジタル信号成分
との周波数間隔も定められた周波数間隔を持つことにな
る○しかしこの方法ではパイロット信号を送るための周
波数帯域及び電力が必要であるので、衛星通信のように
周波数帯域及び電力ともに制限される系に於ては、周波
数帯域及び電力が増加し又構成部品の増加によるシステ
ムの信頼性が低下すると云う問題があった。As shown in Fig. 2, the signal is composed of a digital signal component DS and a pilot signal component PS, and the carrier wave FSX modulated with such a signal is shown in Fig. 1.
i” S K received by the receiver and added to the received input signal to the input terminal IN of the frequency converter CON 6i1.
It is mixed with the output signal from the voltage controlled oscillator vCO, frequency-converted to an intermediate frequency (for example, 10.7 MHz), and taken out from the output terminal OUT, but a portion is not added to the band R wave generator BPF-1. A pilot signal component PS is taken out at \. This signal component PS is applied to a frequency discriminator DIS, and a frequency error component of the pilot frequency is taken out and added to the voltage controlled oscillator VCO through a low-pass P-wave generator LPF. The oscillation frequency of this voltage controlled oscillator vCO is set to 1 so that the output of the frequency discriminator DIR becomes O.
As a result, the pilot signal component PS added to the output signal of the frequency converter CON has an added frequency, and the frequency interval between the pilot signal component and the digital signal component also has a predetermined frequency interval. ○ However, this method requires a frequency band and power to send the pilot signal, so in systems where both frequency band and power are limited, such as satellite communication, the frequency band and power will increase. There was a problem in that the reliability of the system decreased due to the increase in the number of component parts.
(c) 発明の目的
不発明は上記従来技術の問題点に鑑みなされたものであ
って、完全にランダムなディジタル信号中に含まれる一
定以上連続するマーク信号又はスペース信号を利用する
ことにより、パイロット信号全不要にしたAFC方式全
提供することを目的とする。(c) Purpose of the Invention The invention was made in view of the problems of the prior art described above, and it is possible to generate a pilot signal by using mark signals or space signals that are continuous for a certain period or more and are included in a completely random digital signal. The purpose is to provide a complete AFC system that does not require any signals.
(d) 発明の構成
前記不発明の目的は、ランダムなディジタル信号で変調
されたFSK波を用いて通信するFSK通信方式に於て
、受信されたFSKig波を周波数変換器で周波数変換
し、該周波数変換された信号の一部から例えば連続マー
ク信号成分(周波数ftが正規)全帯域P波器を用いて
取り出し、この出力信号を検波器及び電圧比較器により
ディジタル波形を再生しこれで積分器の動作を断続させ
る〇−一方記周波数変換された信号は周波数弁別器に加
えられるので、前記連続マーク信号成分の周波数がfl
と異なる場合、この周波数差に対応する直流出力電圧か
えられ前記積分器動作中のときに、この積分器を充電す
る。この光電′電圧は電圧制御l。(d) Structure of the Invention The object of the invention is to frequency-convert the received FSKig wave using a frequency converter in the FSK communication system that communicates using FSK waves modulated with random digital signals. For example, a continuous mark signal component (frequency ft is normal) is extracted from a part of the frequency-converted signal using a full-band P-wave generator, and this output signal is regenerated into a digital waveform by a detector and a voltage comparator, which is then used as an integrator. The frequency-converted signal is applied to a frequency discriminator, so that the frequency of the continuous mark signal component becomes fl
If the integrator is different, the DC output voltage corresponding to this frequency difference is changed and the integrator is charged while the integrator is in operation. This photoelectric voltage is controlled by voltage control.
により、連続マーク信号成分の周波数を常に次に保つこ
とができるので、従来のノくイロ、ノド信号と同じ機能
を前記連続マーク信号又は連続スペース信号は持つこと
になるので、特にノくイロット周波数を必要とせず、こ
のAFC方式を提供すること第3図は不発明の一実施例
を示すブロック図及び動作説明図でCONは周波数変換
器、■COは電圧制御発掘器、DISは周波数弁別器、
INT−1はサンプルホールド積分器、BPF−2はマ
ーク信号成分又はスフース信号成分抽出用帯域f波器、
DETは検波器、COMは電圧比較器をそれぞれ示す。As a result, the frequency of the continuous mark signal component can always be maintained at the following level, so the continuous mark signal or continuous space signal has the same function as the conventional nokuiro and nodo signals. Figure 3 is a block diagram and operation explanatory diagram showing an embodiment of the invention, in which CON is a frequency converter, CO is a voltage control excavator, and DIS is a frequency discriminator. ,
INT-1 is a sample-and-hold integrator, BPF-2 is a band f-wave generator for extracting mark signal components or SFOUS signal components,
DET represents a detector, and COM represents a voltage comparator.
以下図面を参照して不発明の実施例を詳述する0第3図
(a)は本発明実施例のブロック図で、周波数変換部C
ONの第1の入力端子は端子INに、第2の入力端子は
電圧制御発振器VCOの出力端子に、出力端子は端子O
UTにそれぞれ接続される。Embodiments of the invention will now be described in detail with reference to the drawings. FIG. 3(a) is a block diagram of an embodiment of the invention, in which the frequency converter C
The first input terminal of ON is connected to the terminal IN, the second input terminal is connected to the output terminal of the voltage controlled oscillator VCO, and the output terminal is connected to the terminal O.
Each is connected to a UT.
そして端子OUTに周波数弁別器DIS及び帯域P波器
BPF−2の入力端子がそれぞれ接続され、周波数弁別
器DISの出力端子は積分器INT−1の第1の入力端
子に、この積分器INT−1の出力端子は電圧制御発振
器vCOの入力端子にそれぞれ接続される。The input terminals of the frequency discriminator DIS and the band P-wave filter BPF-2 are connected to the terminal OUT, respectively, and the output terminal of the frequency discriminator DIS is connected to the first input terminal of the integrator INT-1. 1 output terminals are respectively connected to input terminals of a voltage controlled oscillator vCO.
一方帯域f波器BPF−2の出力端子は検波器−ETの
入力端子に、この検波器り、ETの出力端子は電圧比較
器COMの入力端子に、電圧比較器−〇Mの出力端子は
積分器INT−1の第2の入力端子にそれぞれ接続され
る0次にこのブロック図で示す回路の動作を説明するO
第3図(b)に示すように完全にランダムなディジタル
信号の場合連続する例えばマーク信号は成る確率で発生
し、このマーク信号と次の連続マーク信号の間鉱マーク
信号又はスペース信号がランダムに発生する。このよう
なディジタル信号でFSK変調された搬送波が受信機の
周波数変換器CONに加えられる。こ\で電圧制御発振
器vCOからの出力と混合され中間周波信号(例えば中
間周波数10.7MHz)に変換され大部分の信号成分
は端子outから外部に取出される。残りの部分のち一
部はマーク信号成分又はスペース信号成分抽出用帯域?
I−′波器BPF−2に加えられる。この帯域f波器で
マーク信号成分のみが第3図(e)に示すような形で取
り出される。この波形の立上り及立下りがこの帯域f波
器の帯域中に対応して遅れている。第3図(e)に示す
波形は検波器DETに加えられこ\で包絡線検波されて
中間周波成分は取除かれ第3図(d)に示す波形になり
この波形は電圧比較器COMでスレシホルド電圧A−A
と比較され、この電圧より高い電圧のとき1が低いとき
はOとなり第3図(e)に示すような検波波形に対応し
たパルス波形がえられる。この波形がサンダルホールド
形槓分器INT−1に加えられ、この積分器を0N−O
FF’する。On the other hand, the output terminal of the band f wave filter BPF-2 is connected to the input terminal of the wave detector ET, the output terminal of this wave detector ET is connected to the input terminal of the voltage comparator COM, and the output terminal of the voltage comparator 〇M is connected to the input terminal of the voltage comparator COM. Explain the operation of the circuit shown in this block diagram, which is connected to the second input terminal of the integrator INT-1. For example, a mark signal is generated with a certain probability, and a mark signal or a space signal is randomly generated between this mark signal and the next consecutive mark signal. A carrier wave FSK modulated with such a digital signal is applied to a frequency converter CON of the receiver. Here, it is mixed with the output from the voltage controlled oscillator vCO, converted into an intermediate frequency signal (eg, intermediate frequency 10.7 MHz), and most of the signal components are taken out from the terminal out. Is the remaining part a band for extracting mark signal components or space signal components?
It is added to the I-' waveform generator BPF-2. With this band f wave filter, only the mark signal component is extracted in the form shown in FIG. 3(e). The rise and fall of this waveform are delayed correspondingly during the band of this band f wave generator. The waveform shown in Fig. 3(e) is applied to the wave detector DET, where the envelope is detected and the intermediate frequency component is removed, resulting in the waveform shown in Fig. 3(d).This waveform is applied to the voltage comparator COM. Threshold voltage A-A
When the voltage is higher than this voltage and 1 is low, it becomes O, and a pulse waveform corresponding to the detected waveform as shown in FIG. 3(e) is obtained. This waveform is applied to the sandal-hold type integrator INT-1, which converts this integrator into 0N-O
FF'.
一方、中間周波信号の残りの部分のうちの他の部分が周
波数弁別器DISに加えられる。この弁別器はマーク信
号成分に対応する周波数成分が加えられたとき出力電圧
は0、それ以外の周波数では周波数誤差に対応して十又
は−の出力電圧が出るが、マーク信号成分以外のデータ
信号成分に対しては波形列によって異なるがランダムな
ので出力電圧は殆んどOでこれらの電圧が0N−OFF
しているサンプルホールド形積分器INT−1に加え
られる。こ\でマーク信号成分の周波数誤差電圧がこの
積分器INT−1に加えられる時点とこの積分器がON
の状態になる時点は同期しているが、それ以外の弁別器
出力電圧のこの、積分器への印加の時点と積分器自身の
ONの状態とは同期していないので、この出力電圧は積
分器の動作に何ら影響を与えず積分器の入力信号のS/
Nは向上することになる。このサンプルホールド形積分
!INT−1に加えられた誤差′電圧はこの積分器の構
成要素のコンデンサーを充電するが、積分器の動作OF
Fのときはこの、1ノミ分滞の入出力インピーダンスは
非常に高くなるのでこの充電電圧は次の誤差電圧がこの
積分器に加えられるまで保持される。Meanwhile, another part of the remaining part of the intermediate frequency signal is applied to the frequency discriminator DIS. This discriminator outputs a voltage of 0 when a frequency component corresponding to the mark signal component is added, and an output voltage of 0 or - corresponding to the frequency error at other frequencies; The components vary depending on the waveform sequence, but since they are random, the output voltage is almost O and these voltages are 0N-OFF.
is added to the sample-and-hold integrator INT-1. Here, the time point when the frequency error voltage of the mark signal component is applied to this integrator INT-1 and this integrator is turned on.
The point in time when the state is reached is synchronized, but the point in time when the other discriminator output voltages are applied to the integrator is not synchronized with the ON state of the integrator itself, so this output voltage is not integrated. S/ of the input signal of the integrator without affecting the operation of the integrator.
N will improve. This sample-hold type integral! The error' voltage applied to INT-1 charges the capacitor of this integrator component, but the integrator's operating OF
When F, the input/output impedance for one lag becomes very high, so this charged voltage is held until the next error voltage is applied to this integrator.
そしてこの電圧が高い入力インピーダンスを持つ電圧制
御発振器vCOに加えられ誤差電圧が0になるように電
圧制御発振器の発振周波数を変化させる。This voltage is then applied to a voltage controlled oscillator vCO having a high input impedance, and the oscillation frequency of the voltage controlled oscillator is changed so that the error voltage becomes zero.
第4図(は別の発明の一実施例を示すブロック図でIN
T−2は尖頭値保持形積分器で第3図と同じ記号は同じ
部分を示す0
以下図面を参照して不発明の実施例を詳述するO同図に
於て周波数変換部CONの1つの入力端子は端子INに
、他の入力端子は電圧制御発振器の出力端子に、出力端
子は端子OUTにそれぞれ接続される。そして・4域を
波器BPF−2の入力側は端子OUTに、出力側は周波
数弁別器入力側に、周波数弁別器出力側は尖頭値保持形
積分器INT−2の入力側に、この積分器−2の出力側
は電圧制御発振器の入力端子にそれぞれ接続される。FIG. 4 is a block diagram showing an embodiment of another invention.
T-2 is a peak value holding type integrator, and the same symbols as in FIG. One input terminal is connected to the terminal IN, the other input terminal is connected to the output terminal of the voltage controlled oscillator, and the output terminal is connected to the terminal OUT. Then, the input side of the wave filter BPF-2 is connected to the terminal OUT, the output side is connected to the input side of the frequency discriminator, and the output side of the frequency discriminator is connected to the input side of the peak value holding type integrator INT-2. The output sides of the integrator-2 are respectively connected to the input terminals of the voltage controlled oscillator.
そしてこのブロック図で示される回路の動作は次のよう
である。即ち、前記のように帯域f波器BPF−2で取
り出されたマーク信号成分は周波数弁別器DISでマー
ク信号成分の周波数誤差電圧が得られる。この誤差電圧
は尖頓値保持形積分器INT−2に保謁され、高い入力
インピーダンスをもつ電圧制御発振器VCOに加えられ
、前記のようにこの電圧制御発振器の発振周波数全変化
させる。The operation of the circuit shown in this block diagram is as follows. That is, the mark signal component extracted by the band f wave filter BPF-2 as described above is used to obtain the frequency error voltage of the mark signal component by the frequency discriminator DIS. This error voltage is collected by the peak value holding type integrator INT-2 and applied to the voltage controlled oscillator VCO having a high input impedance, causing the entire oscillation frequency of this voltage controlled oscillator to change as described above.
尚AFC動作を確実に行う為に、ランダムなディジタル
信号で発生する連続マーク信号又は連続スペース信号を
利用するのでなく、意識的に一定長の連続マーク信号を
一定周期でディジタル信号に挿入する方法もある。In order to ensure the AFC operation, instead of using continuous mark signals or continuous space signals generated from random digital signals, there is also a method of intentionally inserting continuous mark signals of a certain length into the digital signal at a certain period. be.
(f) 発明の詳細
な説明したように、不発明によればパイロット信号を使
用せずFSX変調波にAFC’、かけることができるの
で、使用周波数の帯域中及び使用単 3 日
(Q)
(eン
第 49(f) As explained in detail, according to the invention, it is possible to apply AFC' to the FSX modulated wave without using a pilot signal. E No. 49
Claims (1)
を用いて通信するFSX通信方式に於て、受信されたF
SK変調波を電圧制御発振器の出力信号により周波数変
換器で周波数変換し、該周波数変換された信号を周波数
弁別器で弁別した信号を、前記周波数変換されたディジ
タル信号成分中の連続するマーク信号成分又は連続する
スペース信号成分のみを選択的に抽出する手段によって
抽出した信号によって動作が断続される積分器により積
分し、該積分器の出力を周波数誤差信号として該電圧制
御発振器の出力信号の周波数を一定に保つこと全特徴と
する自動周波数制御方式。 2 ランダムなディジタル信号で変調されたFSK波乞
用いて通信するFSK通信方式に於て、受信されたFS
K変調波を電圧制御発振器の出力信号により周波数変換
器で周波数変換し、該周波数変換された信号から連続す
るマーク信号成分又は連続するスペース信号成分のみを
選択的に抽出し、該抽出された信号成分を周波数弁別器
に加えて周波数誤差・信号を検出し、該検出信号?矢頒
値保持型積分器に加え、該積分==の出力信号金談電圧
制御発振器に加えて咳周波数変換器の出力信号の周波数
を一定に保つことを特徴とする自動周波数制御方式。[Claims] 1. In the FSX communication system that communicates using FSK waves modulated with random digital signals, the received F
The frequency of the SK modulated wave is converted by a frequency converter using the output signal of the voltage controlled oscillator, and the frequency-converted signal is discriminated by a frequency discriminator. Alternatively, the frequency of the output signal of the voltage controlled oscillator is determined by using an integrator whose operation is interrupted by the signal extracted by means for selectively extracting only continuous space signal components, and using the output of the integrator as a frequency error signal. Automatic frequency control system that keeps the frequency constant. 2 In the FSK communication method, which uses FSK waves modulated with random digital signals, the received FS
The frequency of the K modulated wave is converted by a frequency converter using the output signal of the voltage controlled oscillator, and only continuous mark signal components or continuous space signal components are selectively extracted from the frequency-converted signal, and the extracted signal is Component is added to the frequency discriminator to detect the frequency error/signal, and the detected signal? An automatic frequency control system characterized in that, in addition to a constant value holding type integrator, the frequency of the output signal of the cough frequency converter is kept constant in addition to the output signal of the integral == voltage controlled oscillator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7245383A JPS59198054A (en) | 1983-04-25 | 1983-04-25 | Automatic frequency control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7245383A JPS59198054A (en) | 1983-04-25 | 1983-04-25 | Automatic frequency control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59198054A true JPS59198054A (en) | 1984-11-09 |
Family
ID=13489730
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7245383A Pending JPS59198054A (en) | 1983-04-25 | 1983-04-25 | Automatic frequency control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59198054A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02246564A (en) * | 1989-03-20 | 1990-10-02 | Oki Electric Ind Co Ltd | Automatic frequency control equipment and its system |
JPH04229751A (en) * | 1990-10-01 | 1992-08-19 | Tokyo Electric Co Ltd | Automatic frequency controller for receiver and its control method |
-
1983
- 1983-04-25 JP JP7245383A patent/JPS59198054A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02246564A (en) * | 1989-03-20 | 1990-10-02 | Oki Electric Ind Co Ltd | Automatic frequency control equipment and its system |
JPH04229751A (en) * | 1990-10-01 | 1992-08-19 | Tokyo Electric Co Ltd | Automatic frequency controller for receiver and its control method |
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