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JPS59191942A - Turn-on sequence AGC method demodulator - Google Patents

Turn-on sequence AGC method demodulator

Info

Publication number
JPS59191942A
JPS59191942A JP58065543A JP6554383A JPS59191942A JP S59191942 A JPS59191942 A JP S59191942A JP 58065543 A JP58065543 A JP 58065543A JP 6554383 A JP6554383 A JP 6554383A JP S59191942 A JPS59191942 A JP S59191942A
Authority
JP
Japan
Prior art keywords
agc
signal
demodulator
circuit
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58065543A
Other languages
Japanese (ja)
Inventor
Kazuhiko Takaoka
高岡 和彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58065543A priority Critical patent/JPS59191942A/en
Publication of JPS59191942A publication Critical patent/JPS59191942A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3036Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To correct the set error of an AGC for a demodulator which performs the AGC with a training signal by detecting the switching between an AB period (when data A and B are repeated regularly and alternately) and a CD period (when data C and D are repeated at random by a certain produced polynomial) respectively. CONSTITUTION:An input signal is received and demodulated via an AGC circuit 1, a demodulator 2, an LPF3 and an automatic equalizer 4. When a training signal is received, the level of the training signal is detected by a level detector 5. Then a high-speed AGC is applied by an AGC control circuit 6. When the training signal shifts to a CD period from an AB period, an AB/CD switching detector 7 detects this shift. Then a high-speed AGC is applied again by the circuit 6.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、ターンオンシーケンスAGC方式の復調器に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a turn-on sequence AGC type demodulator.

〔発明の背景〕[Background of the invention]

トレーニング信号を用−て同期引き込みを行う自動等化
器内蔵の復調器が従来より存在する。この復調器では、
トレーニング信号の入力レベル誤差を信号パターンによ
って補正するターンオンシーケンスAGC方式を採用し
ている。
Demodulators with built-in automatic equalizers that perform synchronization using a training signal have conventionally existed. In this demodulator,
A turn-on sequence AGC method is used to correct input level errors of training signals using signal patterns.

トレーニング信号とデータ信号をキャリイ信号にて変調
した信号を受信し、受信信号の波形等化を内蔵するデー
タ復調器におりては、一般に情報データの波形を等化す
る前に、即ちデータの直前に配置されるトレーニング信
号によって正常な等化ができる様、初期化及び引き込み
を行う。
In a data demodulator that receives a signal obtained by modulating a training signal and a data signal with a carry signal, and has a built-in waveform equalization function for the received signal, generally before equalizing the waveform of the information data, that is, immediately before the data. Initialization and pull-in are performed so that normal equalization can be performed using the training signal placed in .

第1図(al、(b)は、トレーニング信号による初期
化を説明する図である。第2図は従来のターンオンシー
クンスAGC装置のブロック図を示す。第1図(a)は
受信信号の位相平面を示し、A、C,D。
FIGS. 1(a) and 1(b) are diagrams explaining initialization using a training signal. FIG. 2 is a block diagram of a conventional turn-on sequence AGC device. FIG. Phase planes are shown, A, C, D.

〜−一はデータを示し、これら各々は第1図(b)のデ
ータA、 、 C、D 、 −m−に対応する。
~-1 indicates data, each of which corresponds to data A, , C, D, -m- in FIG. 1(b).

トレーニング信号は、無信号期間NOXMT。The training signal is the no-signal period NOXMT.

第1図(b)のデータA、Bが規則的に交互に繰返され
る期間ALT(AB期間とも云う)、データC,Dがあ
る一定の生成多項式で表わされるランダムに繰返される
期間AP(CD期間とも云う)及び位相平面上に存在す
る全てのデータがランダムに配置されるスクランブルデ
ータ区間SCRによジ構成されるデータDAの直前に配
置する。
The period ALT (also referred to as the AB period) in which data A and B in FIG. It is placed immediately before the data DA which is constituted by a scramble data section SCR in which all the data existing on the phase plane are randomly arranged.

第2図は、AGC回路1、復調器2、ローパフイルタ3
、自動等止器4、レベル検出器5.AGC制御回路6よ
り成る。この動作は以下となる。
Figure 2 shows an AGC circuit 1, a demodulator 2, and a low-pass filter 3.
, automatic equalizer 4, level detector 5. It consists of an AGC control circuit 6. This operation is as follows.

■ データが入力しない状態下で、等止器4のタップ係
数イニシャライズの実行及びAGC回路1の最小レベル
信号を検出すべき利得に設定する。
(2) In a state where no data is input, initialize the tap coefficient of the equalizer 4 and set the minimum level signal of the AGC circuit 1 to the gain to be detected.

■ AB期間ALTの信号”ABAB−−−”が入力す
ると、レベル検出器5が、レベル検出を行う。AGC制
御回路6がこれを取込み、高速度にAGC回路1の利得
を変更し、検出レベルに応じたAGC利得の設定を行う
。高速度のAGC利得変更とは、1〜2回程度で設定を
完了することを云う。
(2) When the AB period ALT signal "ABAB---" is input, the level detector 5 performs level detection. The AGC control circuit 6 takes this in, changes the gain of the AGC circuit 1 at high speed, and sets the AGC gain according to the detection level. High-speed AGC gain change means that the setting can be completed in about one or two times.

この利得の高速設定は、自動等化器4が調整される前に
、入力レベルを一定にするとのことである。その後、A
GCは、ゆっくシとした時定数のAGC回路となる様に
制御を行う。
This fast setting of the gain is said to stabilize the input level before the automatic equalizer 4 is adjusted. After that, A
The GC is controlled so that it becomes an AGC circuit with a slow time constant.

■ レベルが最適となシ、トレーニング信号がALT期
間からAE期間に移行すると、等止器4の引き込み動作
が、前述の2値不規則に配列されたデータ群によって行
われる。
(2) When the level is optimal and the training signal shifts from the ALT period to the AE period, the pull-in operation of the equalizer 4 is performed using the aforementioned binary irregularly arranged data group.

■ 次いで、スクランブル期間の多値ランダムデータ信
号が等止器4に入力し、2値ランダムデータによって収
束させたタップ係数をさらに更新し、きめのこまかい等
化を実行する。
(2) Next, the multi-value random data signal of the scrambling period is input to the equalizer 4, and the tap coefficients converged with the binary random data are further updated to perform fine-grained equalization.

以上によシ、トレーニング信号を使用して引き込みを完
了させ、以後データは波形等化を受ける。
According to the above, the training signal is used to complete the acquisition, and thereafter the data is subjected to waveform equalization.

このとき、AGC回路は、AL’[’期間初期に高速に
プリセットされた初期設定レベルを、長い時定数で更新
するAGCとなる。
At this time, the AGC circuit becomes an AGC that updates the initial setting level, which was preset at high speed at the beginning of the AL'[' period, with a long time constant.

一方、等止器を内蔵する変復調器を介してデータを送受
し、所定の情報処理を行うシステムにあっては、送信側
変調器の送信周波数スペクトラム備差、及び通信を行う
回線途中で発住する減衰歪によシ、受信周波数のスペク
トラムの偏差が生ずる。
On the other hand, in systems that transmit and receive data via a modulator/demodulator with a built-in equalizer and perform predetermined information processing, there are Due to the attenuation distortion that occurs, deviations in the received frequency spectrum occur.

ここで、従来のシステムで問題となるのは、AGC回路
1の設定を行うAB倍信号トータルパワーがデータラン
ダム信号に比べて減少することである。これは、第1図
(a)の信号点配置はCCITT勧告V29に設定され
ているもので、そのALT区間の周波数スペクトルは、
キャリア周波数1700Hz、ポウトレー ) 240
0 BA UDであるため、500Hz、  1700
Hz、及び2900 Hz O線スペクトルとなる。こ
の時の通信回線の減衰歪みは、谷リンク(1リンク、3
リンク、5リンク)に応じて第3図の如くなり、リンク
数が増加すると、 500Hz、2900Hzのスペク
トルが減衰し、トータルパワーが減少する。
Here, a problem with the conventional system is that the total power of the AB double signal for setting the AGC circuit 1 is reduced compared to the data random signal. This is because the signal point arrangement in Figure 1(a) is set in CCITT recommendation V29, and the frequency spectrum of the ALT section is:
Carrier frequency 1700Hz, Poultry) 240
Since it is 0 BA UD, 500Hz, 1700
Hz, and 2900 Hz O-line spectrum. The attenuation distortion of the communication line at this time is the valley link (1 link, 3
As the number of links increases, the spectrum of 500Hz and 2900Hz is attenuated, and the total power decreases.

以上の様に、ABのパワーが減少することによ、!11
.AB信号の高速レベルセットの値が誤ることになp、
CD区間の自動等化器の調整パターン時にレベル設定が
ずれることにな島引き込み動作に支障をきたす。最悪の
場合は、引き込みが実行できなめこともある。
As mentioned above, due to the decrease in the power of AB,! 11
.. The value of the AB signal high-speed level set will be incorrect.
If the level setting deviates during the adjustment pattern of the automatic equalizer in the CD section, it will interfere with the island pull-in operation. In the worst case, retraction may not be possible.

〔発明の目的〕[Purpose of the invention]

本発明の目的は1等化器調整パターンとのAGC設定誤
差を補正し、自動等化器の引き込み確立をはかってなる
ターンオンシーケンスAGc方式の復調装置を提供する
ものである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a turn-on sequence AGc type demodulation device which corrects an AGC setting error with a 1-equalizer adjustment pattern and establishes automatic equalizer pull-in.

〔発明の概要〕 本発明では、ALT期間(AB期間)からAE期間(C
D期間)の変化点を検出し、自動等化器の調整を開始す
る前に再度AGCのきめこまかい高速設定を行うことに
より自動等化器のレベル誤差による立上り確立の悪化を
防止させた。
[Summary of the Invention] In the present invention, from the ALT period (AB period) to the AE period (C
By detecting the change point in period D) and performing fine-grained high-speed settings of the AGC again before starting adjustment of the automatic equalizer, deterioration of the rise probability due to level error of the automatic equalizer was prevented.

〔発明の実施例〕[Embodiments of the invention]

第4図は本発明のターンオンシーケンスAGC装置の実
施例図を示す。本実施例は、AGC回路1、復調回路2
、ローパスフィルタ(LPF ) 3、自動等化器4、
レベル設定器5.AGC制御回路6、ABCD切換検出
器7より成る。この要素の中で、ABCD切換検出器7
が本実施例で追加された要素である。
FIG. 4 shows an embodiment of the turn-on sequence AGC device of the present invention. In this embodiment, an AGC circuit 1, a demodulation circuit 2
, low-pass filter (LPF) 3, automatic equalizer 4,
Level setter 5. It consists of an AGC control circuit 6 and an ABCD switching detector 7. Among this element, ABCD switching detector 7
is an element added in this embodiment.

このABCD切換検出器7は、AB期間からCD期間へ
の切換シを検出する機能を持つ。この切換りの検出信号
は、AGC制御回路6に入力し、AGC制御回路6は、
必要なAGC制御を行う。
This ABCD switching detector 7 has a function of detecting switching from the AB period to the CD period. This switching detection signal is input to the AGC control circuit 6, and the AGC control circuit 6
Perform necessary AGC control.

第4図のターンオン時の動作を説明する。データが入力
してバない場合には、第2図の従来例と同じ動作をなす
。次に、AB期間のALT受信時、レベル検出器5から
現在レベルを検出し、AGCの設定利得により、標準レ
ベルに設定するためのレベル変動量を制御口N6によシ
計算し、高速にレベル設定がなされる。この時、他に必
要なタイミング及びキャリアの初期設定がなされる。し
かし、回線の減衰歪等により、実際のパワーよりも少な
いとみてAGCが設定されている、ことになる。
The operation at turn-on in FIG. 4 will be explained. If no data is input, the same operation as the conventional example shown in FIG. 2 is performed. Next, when receiving ALT during the AB period, the current level is detected from the level detector 5, and the control port N6 calculates the amount of level fluctuation to set the standard level using the set gain of the AGC, and the level is set at high speed. Settings are made. At this time, other necessary timing and carrier initial settings are made. However, due to line attenuation distortion, etc., the AGC is set assuming that the power is less than the actual power.

次に、トレーニング信号がAB倍信号らCD期間に移項
すると、等化器の引き込みが行われる。
Next, when the training signal is shifted from the AB times signal to the CD period, the equalizer is pulled in.

この切り替9点は、ABCD切換検出器7によシ検出し
た検出信号によってなす。即ち、この時のパワーを再測
定し再設定要求信号をAGC制御回路6に出力し、CD
信号の初期にて、きめこまか−、高速設定がなされる。
These nine switching points are made by the detection signals detected by the ABCD switching detector 7. That is, the power at this time is remeasured, a reset request signal is output to the AGC control circuit 6, and the CD
Fine-grained, high-speed settings are made at the beginning of the signal.

これにより、等什器イの引き込み区間において、最適な
レベルで、等化器の設定がなされ、立上シ確立のよい構
成となる。
As a result, the equalizer is set at an optimal level in the lead-in section of the fixture A, resulting in a configuration with good start-up stability.

尚、AB倍信号らCD信号の切シ換え点の検出は、交互
AB信号周波数スペクトルが異なることにより、簡単な
フィルタリングで検出可能である。
Note that the switching point between the AB double signal and the CD signal can be detected by simple filtering because the alternate AB signal frequency spectra are different.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、入力信号の存在する回線の減衰歪等の
影響によるAGCレベル設定誤差を、トレーニング信号
のターンオンシーケンスの信号によってきめこまかに吸
収できる。従って、自動等化器の調整が能率よく行うこ
とができ、同期確立が向上する効果を呈する。
According to the present invention, the AGC level setting error due to the influence of attenuation distortion of the line where the input signal exists can be finely absorbed by the signal of the turn-on sequence of the training signal. Therefore, the adjustment of the automatic equalizer can be performed efficiently, and the synchronization establishment is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)、 (b)は従来例の動作説明図、第2図
は従来例図、第3図はその特性図、第4図は本発明の実
施例図である。 1・・・AGC回路、2・・・復調回路、3・・・ロー
−くスフィルタ(LPF)、4・・・自動等化器、5・
・・レベル検出器、6・・・AGC制御回路、7・・・
ABCD切換検出器。 オ l 図 (α〕 オ 2 図 第3 図 11a 第4図
1(a) and 1(b) are explanatory diagrams of the operation of the conventional example, FIG. 2 is a diagram of the conventional example, FIG. 3 is a characteristic diagram thereof, and FIG. 4 is a diagram of an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... AGC circuit, 2... Demodulation circuit, 3... Low pass filter (LPF), 4... Automatic equalizer, 5...
...Level detector, 6...AGC control circuit, 7...
ABCD switching detector. O l Figure (α) O 2 Figure 3 Figure 11a Figure 4

Claims (1)

【特許請求の範囲】[Claims] トレーニング信号とデータ信号とによシキャリャ信号で
変調した信号を受信するAGC回路と、該AGC回路出
力であるトレーニング信号の無信号に続くデータ点配置
図での2点間繰返し信号により、上記AGC回路のゲイ
ン制御を行うAGC制御回路と、上記AGC回路の出力
を入力して復調を行う復調器と、該復調器の出力を取込
み自動等化する自動等化器とを備えると共に、上記復調
器の出力を取込み上記交互繰返し信号に続く2点間ラン
ダム繰返の等止器信号の切り換υ点を検出する手段と、
該検出信号を上記AGC制御回路に入力させ上記AGC
回路のゲイン制御を行わせる手段とを備えたターンオン
シーケンスAGC方式%式%
An AGC circuit that receives a signal modulated by a carrier signal by a training signal and a data signal, and a repeating signal between two points in the data point arrangement diagram following the no signal of the training signal that is the output of the AGC circuit. an AGC control circuit that performs gain control, a demodulator that inputs the output of the AGC circuit and performs demodulation, and an automatic equalizer that takes in the output of the demodulator and automatically equalizes the output of the demodulator. means for capturing the output and detecting a switching point υ of a two-point randomly repeated isolator signal following the alternatingly repeated signal;
The detection signal is input to the AGC control circuit and the AGC
Turn-on sequence AGC method % type % equipped with means for controlling the gain of the circuit
JP58065543A 1983-04-15 1983-04-15 Turn-on sequence AGC method demodulator Pending JPS59191942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58065543A JPS59191942A (en) 1983-04-15 1983-04-15 Turn-on sequence AGC method demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58065543A JPS59191942A (en) 1983-04-15 1983-04-15 Turn-on sequence AGC method demodulator

Publications (1)

Publication Number Publication Date
JPS59191942A true JPS59191942A (en) 1984-10-31

Family

ID=13290033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58065543A Pending JPS59191942A (en) 1983-04-15 1983-04-15 Turn-on sequence AGC method demodulator

Country Status (1)

Country Link
JP (1) JPS59191942A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62122338A (en) * 1985-11-21 1987-06-03 Fujitsu Ltd AGC method
JPH0220150A (en) * 1988-07-08 1990-01-23 Oki Electric Ind Co Ltd Gain control system for modem
JPH0324824A (en) * 1989-06-21 1991-02-01 Matsushita Graphic Commun Syst Inc Modem device
JPH0468735A (en) * 1990-07-04 1992-03-04 Mitsubishi Electric Corp Automatic output power controller

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62122338A (en) * 1985-11-21 1987-06-03 Fujitsu Ltd AGC method
JPH0220150A (en) * 1988-07-08 1990-01-23 Oki Electric Ind Co Ltd Gain control system for modem
JPH0324824A (en) * 1989-06-21 1991-02-01 Matsushita Graphic Commun Syst Inc Modem device
JPH0468735A (en) * 1990-07-04 1992-03-04 Mitsubishi Electric Corp Automatic output power controller

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