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JPS59187214U - Transistor output display circuit - Google Patents

Transistor output display circuit

Info

Publication number
JPS59187214U
JPS59187214U JP7824083U JP7824083U JPS59187214U JP S59187214 U JPS59187214 U JP S59187214U JP 7824083 U JP7824083 U JP 7824083U JP 7824083 U JP7824083 U JP 7824083U JP S59187214 U JPS59187214 U JP S59187214U
Authority
JP
Japan
Prior art keywords
display circuit
output display
transistor output
transistor
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7824083U
Other languages
Japanese (ja)
Inventor
後藤 三郎
Original Assignee
富士電機株式会社
富士フアコム制御株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士電機株式会社, 富士フアコム制御株式会社 filed Critical 富士電機株式会社
Priority to JP7824083U priority Critical patent/JPS59187214U/en
Publication of JPS59187214U publication Critical patent/JPS59187214U/en
Pending legal-status Critical Current

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  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Audible And Visible Signals (AREA)
  • Amplifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第3図は従来のトランジスタ出力表示回路の構
成をそれぞれ示す回路図、第4図〜第7図は本考案トラ
ンジスタ出力表示回路の構成例をそれぞれ示す回路図で
ある。 1・・・トランジスタ、2. 2a、  2b・・・表
示素子、3〜6・・・抵抗、7・・・ツェナーダイオー
ド、7′・・・ダイオ″−ド、8・・・負荷、9・・・
負荷用電源、10・・・バイアス電源、11・・・表示
用電源。
1 to 3 are circuit diagrams showing the configuration of a conventional transistor output display circuit, and FIGS. 4 to 7 are circuit diagrams each showing a configuration example of the transistor output display circuit of the present invention. 1...transistor, 2. 2a, 2b...Display element, 3-6...Resistor, 7...Zener diode, 7'...Diode"-dead, 8...Load, 9...
Load power supply, 10...bias power supply, 11...display power supply.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] トランジスタ回路の入力側iよび出力側にそれぞれ動作
表示等を付加することにより前記トランジスタ回路の平
常動作および故障の双方を表示し得るようにしたことを
特徴とするトランジスタ出力表示回路。
1. A transistor output display circuit, characterized in that it is possible to display both normal operation and failure of the transistor circuit by adding an operation display or the like to the input side i and the output side of the transistor circuit, respectively.
JP7824083U 1983-05-26 1983-05-26 Transistor output display circuit Pending JPS59187214U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7824083U JPS59187214U (en) 1983-05-26 1983-05-26 Transistor output display circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7824083U JPS59187214U (en) 1983-05-26 1983-05-26 Transistor output display circuit

Publications (1)

Publication Number Publication Date
JPS59187214U true JPS59187214U (en) 1984-12-12

Family

ID=30208243

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7824083U Pending JPS59187214U (en) 1983-05-26 1983-05-26 Transistor output display circuit

Country Status (1)

Country Link
JP (1) JPS59187214U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6312914U (en) * 1986-06-30 1988-01-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6312914U (en) * 1986-06-30 1988-01-28

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