JPS5918690A - Hall element - Google Patents

Abstract

PURPOSE:To prevent the short circuit between an electrode and a substrate due to overetching, by providing an Si nitride film, whose etching speed is different from that of an Si oxide film, on the surface of the Si substrate. CONSTITUTION:An Si nitride film 12 is attached to the surface of an Si semiconductor substrate 11. Then, a compound semiconductor layer 13 is evaporated on the film 12. Thereafter, the layer 13 with a desired pattern is made to remain by photoetching. Then the entire surface is coated by an Si oxide film 14, and the layer 13 is protected. Thereafter, a contact hole 15 is provided in the film 14 by photoetching. In this case, even though overetching is performed, the surface of the substrate 11 is hardly etched since it is coated by the film 12. Therefore, the short circuit to the substrate 11 can be prevented. Then an electrode 16 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Technical Field of the Invention The present invention relates to the improvement of Hall elements, particularly Hall elements using silicon semiconductor substrates. A deposited film of a compound semiconductor such as InSb is used as a material for the Hall element. Ferrite has been used as a substrate on which InSb is deposited in order to obtain a high Hall voltage, but with the development of ICs for low noise enhancement (1), it has become possible to use substrates with a small Hall voltage.

Therefore, by using a silicon wafer as a substrate, it is possible to manufacture the Hall element using the same manufacturing line as for general semiconductor manufacturing, and thus it has become possible to manufacture a Hall element using a silicon semiconductor substrate.

As shown in Figure 1, a conventional Hall element consists of a silicon semiconductor substrate (1), a silicon oxide film (2) deposited on the substrate (1), and a compound semiconductor layer (such as InSb) deposited on the oxide film (2). 3) is deposited by vapor deposition, and the compound semiconductor layer (3) is coated with a silicon oxide film (4) by CVD method for protection. ) and select the contact hole (5).
is formed, and an electrode (6) for extraction is provided.

In such a conventional Hall element, when etching the silicon oxide film (4) that protects the compound semiconductor layer (3), the substrate (
1) The silicon oxide film (2) on the surface was also etched, and there was a risk that the electrode (6) and the substrate (1) would be short-circuited.

(c) Disclosure of the invention The non-invention was made in view of the above-mentioned conventional drawbacks, and
) is characterized in that a silicon nitride film (121), which has a different etching rate than the silicon oxide film (121), is provided on the surface.

B) Embodiment of the Invention An embodiment of the invention will be described in detail with reference to FIGS. 2A, B, C, and DXE.

First, as shown in FIG. 2A, a wafer-shaped silicon semiconductor substrate 01) is prepared, and a silicon nitride film (12) is deposited on the surface of this substrate. Silicon nitride film (about 1,000 ml is formed by plasma CVD or low pressure CVD)
Generates to the thickness of the final layer.

Next, as shown in FIG. 2B, InSb is deposited on the silicon nitride film θ.
A compound semiconductor layer of 0.0 cm is deposited. After that, a compound semiconductor layer 03 with a desired pattern is formed by photo-etching technology.
).

Next, as shown in FIG. 2C, a silicon oxide film θ4 is formed on the entire surface.
) to protect the compound semiconductor layer (13).

Furthermore, as shown in the second diagram, a contact hole (15) is formed in the silicon oxide film 04) by photo-etching. The silicon oxide film (14) is etched by covering the portions other than the contact holes 09 with a photoresist film (17) and etching with a hydrofluoric acid etchant to expose the ends of the compound semiconductor layer (13). Even if over-etching occurs at this time, since the surface of the substrate θ1) is covered with the silicon nitride film (12), it will hardly be etched and a short circuit with the substrate (11) can be prevented.

Finally, as shown in FIG. 2E, an electrode 06) is formed by vapor deposition of aluminum. Since the compound semiconductor layer (13) is covered with the silicon oxide film 04), the temperature of the substrate 01) can be raised sufficiently and sufficient adhesion strength of the vapor-deposited aluminum can be ensured.

G1→ Effect According to the uninvented structure, since the surface of the substrate 01) is coated with silicon nitride II (12), it is possible to completely prevent a short circuit between the electrode 06) and the substrate (11) due to over-etching. It is possible to mass-produce extremely reliable Hall elements.

[Brief explanation of the drawing]

FIG. 1 is a sectional view illustrating a conventional example, and FIGS. 2A to 2E are sectional views illustrating the present invention. Description of main figure numbers: 01) is a silicon semiconductor substrate, 02) is a silicon nitride film (13) is a compound semiconductor, (14) is a silicon oxide film, and (16) is an electrode.

Claims (1)

[Claims] ], a silicon semiconductor substrate, a silicon nitride film deposited on the substrate, a compound semiconductor layer deposited on the nitride film, a protective film covering the compound semiconductor layer, and a contact hole provided in the protective film. A Hall element comprising an electrode in contact with an end of the compound semiconductor layer.