JPS59180588A - Quantity of light distribution corrector for display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a display device for automatically correcting variations in light intensity of individual light emitting elements in a display device in which a large number of light emitting elements that can be individually controlled to light up are arranged in a matrix. The present invention relates to a light amount distribution correction device.

In this type of display device, there is considerable variation in the luminance of each light emitting element due to differences in characteristics during manufacture of the light emitting elements and individual differences in changes over time. If the light-emitting elements are selected to have the same characteristics before being installed, initial variations in brightness can be considerably avoided, but it is not so easy to eliminate the variations after installation. For example, conventionally, a brightness adjustment circuit is provided for each lighting circuit of a light emitting element, and the brightness of each light emitting element is manually adjusted to eliminate variations while checking the brightness of each light emitting element by some means. This is a common method. However, this makes the adjustment work complicated and not economical.

The present invention was made in consideration of such circumstances, and
It is an object of the present invention to provide a light amount distribution correction device that can compensate for variations in brightness at a lower cost, simply, and with high precision.

In order to achieve this objective, the present invention has developed a television camera for photographing a display device in which a large number of light emitting elements that can be individually controlled to light up are arranged in a matrix, and an image obtained by the television camera. A brightness calculation means that calculates the light emission brightness of each light emitting element based on a signal, and a correction memory that stores the difference between the light emission brightness of each light emitting element calculated by the brightness calculation means and a reference brightness as a total brightness correction amount. and a brightness correction means for correcting the brightness of each light emitting element according to the brightness correction amount stored in the correction memory.0 Hereinafter, the present invention will be explained in more detail with reference to the drawings. .

FIG. 1 shows the configuration of the brightness correction means for each light emitting element. On the display surface 2 of the display device, m - n light emitting elements such as lamps 3 are arranged in a matrix in m rows and n columns. Lamp 3 is a comparator (described later) (Figure 2)
The lighting is controlled individually by the output of the A television camera 6 is arranged so as to be able to photograph a portion of the entire display surface 2. m The shadow range is determined by taking into consideration the resolution of the television camera 60, scanning time, etc. When configured to photograph a part of area 4 as shown by the broken line,
It is only necessary to sequentially switch the photographing area by the camera and to cover the entire display surface with all its might, dividing the area into narrow areas.

The video signal obtained by the television camera 6 is combined with the synchronization signal from the synchronization signal generation section 7 to form a composite video signal, which is amplified by the video signal amplification section 8 and then sent to the transmission section 9.
The signal is sent to the receiving section 10 via. A synchronizing signal is extracted by a synchronizing signal generating section 11 from the composite video signal received by the receiving section 10, and a timing signal is generated by a timing signal generating section 12 using this synchronizing signal as a reference. In synchronization with this timing signal, the video signal generation section 13 extracts a video signal from the composite video signal, converts it into a digital signal, and transfers this from the timing signal generation section 12 to the switching section 1.
Write signal R and address signal A input via 4
With the help of , the light amount data of each lamp is stored in each address of the buffer memory 15.

The memory contents of the buffer memory 15 are displayed on the operation monitor part 17.
Based on the command from the data processing section 16, the read signal Qk is sent to the buffer memory 15, and based on this, the data stored in the 5-software memory 15 is guided to the data processing section 16 as data No. 49, and the data as required here. After performing the above processing, the deviation from the luminance reference previously stored in the built-in memory is sent as a luminance correction amount to the correction memory 1.8 (Fig. M'2) consisting of a RAM. Here, the data processing unit 16 reads out the brightness correction amount as a data signal E as a read/write signal 1? , /W. A row address signal RA and a column address signal OA are also led from the data processing section, and are led to the input switching section 19 together with the above-mentioned signals E, R, /W. It is configured to be able to do the following.

FIG. 2 shows a video display system apart from the correction memory 18-i, in which synchronizing signals are detected from among the received signals received by the antenna 21 and the receiving section n on the one hand via the synchronizing signal detection circuit 23. is taken out, and on the other hand, a video signal is taken out via the video signal generator 24. The video signal generator 24 converts the analog video signal from the receiver 22 into a digital video signal based on the timing signal from the timing signal generator 5 which operates in synchronization with the synchronization signal from the synchronization signal detection circuit Okara. The output is output and stored in the one-screen memory 26 for one screen each time via the manual switching section 19. The one-screen memory 26 can store all of the data υ from the video signal generator and data from the data processing section 17 by switching the input switching section 19 . The memory data stored in the memory is led to the first input terminal of the adder. The contents stored in the correction memory 18 are introduced as a correction amount to the second input terminal on the addition section side.

The adder section includes an adder 200 and O as shown in FIG.
It is composed of an R gate 201 and an AND gate 202 with an inverting input terminal. The above-mentioned correction memory data and video data are input to the adder 200, and normally (since the correction value is positive) the sum output is ORG) 201 and AN
D game) 202 e is output. Kaa: vessel 20
When a carry occurs in 0, the carry signal KU is also outputted via the OR gate 201 and the AN I) gate 202e. When a carry down occurs in adder 200 (such as when the correction signal produced by the apparatus of FIG. Do not pass the number.

The output end of the adder is connected to each latch 7 arranged in a matrix in correspondence with the lamp 3.

The signal from the adder is a serial signal, and in order to distribute it to the latches arranged in a matrix, four row address decoders and four column address decoders are provided. Read/write clock signal RW, row address signal RA, and column address signal CAf:.

At the same time, a row address signal RA is supplied to a row address decoder 29, a column address signal CA and a latte clock signal LCk to a column address decoder 29 via an AND game ( ) 31, and a row address signal RA is supplied to a part of one screen memory. The serial signals from 26 are synchronously stored in each latch 27 in sequence as described above. A comparator 31 is attached to each latch, and the video signal stored therein is inputted from the latch to which it belongs. Comparator 31
The count output of the q-bit counter 36, which receives the output signal of the synchronizing signal detection circuit B, is input to the second input terminal of the synchronous signal detection circuit B.

Thus, by both address decoders u, 29, e.g.
Assuming that the latch 27 in row, column 06 and the comparator 3 are selected, the corrected data signal 827 from the comparator 31 halach υ and the count signal 8 from the counter 36
When S36≦827, an output signal for turning on the .xi. pulse is output, and when 836>S27, the pulse is turned off. Below, R□・・・Fukugyo, C
Similar operations are repeated one after another in the 1...Cn columns to perform lighting control.

As described above, according to the present invention, the luminance fluctuation of each light emitting element of a display device can be adjusted automatically with a simple circuit configuration and with high precision, without providing a luminance adjustment means for each lighting circuit. Accordingly, it is possible to provide a light intensity distribution correction device for a display device that can compensate for the light intensity distribution.

[Brief explanation of drawings]

FIGS. 1 and 2 are block diagrams showing one embodiment of the present invention, and FIG. 3 is a wiring diagram showing the internal configuration of the adder section of the same embodiment. 2...Display surface, 3...Lamp, 6...Television camera, 8...Video signal amplification section, 9...Transmission section,
10... Receiving section, 13... Video signal generating section, 15.
...Buffer memory, 16...Data processing section, 18
...correction memory, addition...addition section, 22...reception section, Sae...video signal generation device...l 1ihi
Area memory, 27...Latch, 29...Column address decoder, 31...Comparator, 36...Q-bit counter. 83 Figure 3 Procedural amendment document May 11, 1949 Director-General of the Patent Office Kazuo Wakasugi 1, Indication of the case Patent Application No. 55636 of 1983 2, Light intensity distribution correction device for the name display device of the invention 3, Amendment Relationship with the case of a person who makes a patent application Patent applicant (375) Toshiba Electric Materials Corporation 7, Specification subject to amendment and drawings 8, Contents of amendment −

Claims (1)

[Scope of Claims] A television camera that photographs a display device in which a large number of light emitting elements that can be individually controlled to light up are arranged in a matrix; a brightness calculation means for calculating the light emission brightness of the element; a correction memory for storing the deviation between the light emission brightness of each light emitting element calculated by the brightness calculation means and a reference brightness as a brightness correction amount; 1. A light amount distribution correction device for a display device, comprising: a brightness correction means for correcting the brightness of each light emitting element according to the brightness correction amount.