JPS59176851A - Data storage method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (1) Technical Field of the Invention The present invention stores data in a local storage for data saving without performing any special processing, and performs predetermined processing when reading, thereby reducing processing time. The present invention relates to a data storage method that enables data storage.

(2) Background of the Technology When an error occurs for some reason during information processing by the central processing unit, the process returns to the initial step of the instruction and executes a retry. Depending on the cause of the error, a royal action will be performed when retrying, or an error will occur again. At this time, retrying an instruction using data that was changed during the initial processing operation is not a valid retry, so the data from the beginning of the processing operation should be temporarily stored in local storage for data saving. , the data stored in the local storage is returned to the main storage immediately before retrying.

(3) Prior Art and Problems Referring to FIG. 1 showing the conventional method, a case will be described in which the data shown in FIG. 2 is stored in the local storage DSLS for data saving. In the main memory device MS in FIG. 1, data A to H is stored at addresses 0 to 7, data from ■ to P are stored at addresses 8 to 15, and the data length is 4 bytes starting from address 6. local storage D
, SL, and S, only data G and H are read out in the first machine cycle of the main memory MS, and data LJ is read out in the next cycle. The address register ADR shown in Figure 1-2 stores address number 6, the alignment direction register ALR stores it as 01'' when alignment is to the left and the address increases, and the data length register DLR stores it. “
100'' (4 bytes).The main memory device MS is read out at the address specified by the address register ADR, and data G and H are stored in the data alignment circuit DAL in the first cycle.At this time, The address register ADR and data length register DLR are updated by 2 bytes, and the contents of the data length register DLR are changed to the temporary storage data length and stored in the register TDR.The data align circuit DAL is controlled by the align control circuit ALC, In the second cycle, the data read out in the fetch from the central processing unit (not shown) is aligned and stored in the read data register RDR.

The second cycle access detection circuit SAC is activated by the flip-flop FF which is turned on during the second cycle access, and changes the length of the temporary storage data and switches the register contents of the disk TDR and the contents of the ring data length register with the gate MPX.
and outputs it to the output line L3. Output line L3. L
4 is written in the second cycle fetch. Note that writing is performed on the output lines LL and L2 by fetching in the first cycle. As a result, the data is stored in the local storage DSLS in the data format shown in FIG. The main memory fetch data is the first cycle fetch data and the second cycle fetch data.
This is the result of a logical sum operation of cycle data, and therefore, the control of additions, calculations, etc. is complicated.

Regarding the data in the main memory device MS, when aligning to the right and decreasing the address, the code in the alignment direction is set to 10.
”, and when the address is increasing in the right direction, the code in the alignment direction is set to “11” and read data as shown in FIG. 2 is obtained.

As shown in Figure 4, data is stored in n addresses of the local storage DSLS when n fetches are performed in one instruction, so when retrying the next time, data is read in the reverse direction from the last stored address. , the data is converted in the opposite manner to the above and returned to the main storage device MS. For this reason, the control hardware is complicated both when storing in the local storage DSLS and when reading. In FIG. 1, the counter of the local storage DSLS increments by 1 when the second +cycle ends.

(4) Purpose of the Invention The purpose of the present invention is to improve the above-mentioned drawbacks, to store data easily in a local storage, to perform predetermined processing when reading, and to store data in a relatively short time. The goal is to provide a method.

(5) Structure of the Invention The structure of the present invention to achieve the above-mentioned object is to store the data in the main memory device in a local storage for data saving along with the address alignment direction and data length, and to read it out from the local storage. In a data storage method in which the address is read from the last saved address in a decreasing direction and then re-stored in the main memory after inverse conversion, when fetching beyond the boundary area of the main memory, the first cycle and the first cycle of the central processing unit machine cycle are Two cycles of access are performed separately, the alignment direction of the second cycle is stored as a specific bit string, and reading is performed in the opposite direction to the storage direction, and the data that finds the specific bit string is read out in the next cycle. The process is to perform logical operations on the data and then store it again in the main memory.

(6) Embodiment of the Invention FIG. 5 is a diagram showing the configuration of an embodiment of the invention, and the same reference numerals as in FIG. 1 indicate the same parts. In FIG. 5, each output line L1 to L4 is connected to a local storage D for each fetch.
Controlled to write to SLS. Regarding the output line L2 of the align direction register ALR, in particular, the outputs in the first cycle and the second cycle fetch are stored while being distinguished as shown in FIG. That is, in the first cycle, normal alignment direction data is stored, and in the second cycle, regardless of the first cycle, a specific bit string is stored, in this case "00".
”.

For this purpose, a circuit is used that performs a logical operation on the output of the free-seven-prompt F'F and the output of the align direction register ALR. Further, the address from which the fetch data is obtained is different, such as "address 6" in the first cycle and "address 8" in the second cycle.

Next, when reading data from the local storage DSLS and retrying the instruction, the data is read in the reverse direction from the final address. A bit string detection circuit in the alignment direction is provided, and the data at the address obtained in the specific bit string is temporarily held, and an OR operation is performed on the first cycle data read out one address later. The data to be re-stored in the main memory is [fetch data at address M] 0, R [fetch data at address M-1] The address to be re-stored is M in local storage DSLS.
The alignment direction of the address stored at address -1 is toward address M-1, and the data length can be determined by (length of address M-1) + (length of address M).

Data inversion then proceeds as usual.

(7) Effects of the Invention According to the present invention, when storing to local storage, it is done immediately without special checking, and when retrying, it is short and only requires hardware to detect a specific bit string. It can be stored in time and has a simple configuration.

[Brief explanation of drawings]

Figure 1 is a diagram for explaining the conventional data storage method, Figure 2 is an example of stored data, Figure 3 is a conventional data string stored in local storage, and Figure 4 is the data in Figure 3. An example in which a plurality of columns are stored, FIG. 5 is a diagram showing the configuration of an embodiment of the present invention, and FIG. 6 is a diagram showing stored data columns corresponding to FIG. 3. MS-Main storage DSLS-Local storage for data saving ALR-
Align direction register ADR - Address register DLR - Data length register DAL - Data align circuit ALC - Align control circuit Patent applicant Fujitsu Limited Agent Patent attorney Eisuke Suzuki

Claims (1)

[Claims] The data in the main storage device is stored in the local storage for data saving along with the address alignment direction and data length, and when reading it, it is read in the address decreasing direction from the last address saved in the local storage, and after reverse conversion, it is stored again in the main storage device. In a data storage method, when fetching beyond the boundary area of the main memory, the first and second cycles of the central processing unit machine cycle are accessed separately, and the alignment direction of the second cycle is stored as a specific bit string. However, when the data is not read, it is performed in the opposite direction to the storage order, and the data for which the specific bit string is found is subjected to a logical operation with the data of the next read cycle, and then stored again in the main memory. Data storage method.