JPS59174007A - Feedback amplifier circuit - Google Patents

Abstract

PURPOSE:To obtain a feedback type amplifying circuit having an optimum noise index despite a single power supply system by adding a source resistance and a source by-pass capacitor to a field effect transistor. CONSTITUTION:A field effect transistor FETQ contains a feedback resistance Rf and a feedback capacitor Cf. At the same time, a gate resistance Rg is provided between the gate and the earth of the FETQ. Then a source resistance Rs and a source by-pass capacitor Cs are put between the gate and the source of the FETQ. Thus the minus voltage, i.e., the gate bias voltage is generated between the gate and the souece of the FETQ. Thus it is possible to control properly the working point of the FETQ by selecting properly the value of the resistance Rs and then applying the set gate bias voltage to the gate of the FETQ. In such a way, a feedback type amplifying circuit having an optimum noise index can be obtained even when a single power supply system.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a feedback amplifier circuit suitable for a GaAS monolithic integrated circuit used, for example, in an ultra-high frequency band.

Prior Art and Problems In general, feedback amplifier circuits are widely used because they are capable of flat amplification over a wide band and can be expected to operate stably, especially on the low frequency side.

FIG. 1 is a circuit diagram of a main part showing an example of a conventional feedback type amplifier circuit.

In the figure, Q is a GaAs-based field effect transistor, R
f is the feedback resistance, Cf is the feedback capacitor, Rg is the gate resistance, Rd is the power supply resistance, +VDD is the drain side supply voltage,
VCC indicates the gate side supply voltage, respectively.

This conventional example has a drawback in that two power supplies are required to operate it, namely, a power supply for the train side supply voltage 1 VAN and a power supply for the cable side supply voltage -VCC.

FIG. 2 is a main circuit diagram showing a conventional example different from the conventional example explained with reference to FIG. 1, and the same parts as those explained with reference to FIG. 1 are indicated by the same symbols.

The difference between this conventional example and the conventional example shown in Fig. 1 is as follows.
The gate of the field effect transistor Q is grounded via a resistor Rg.

In this way, as a power supply, the drain side supply voltage +
Since it only needs to be used for vDD, it becomes a so-called negative power supply method. However, since the field effect transistor Q in this case is normally on, the gate bias voltage is 0.
[V], so-called ID5S operation, that is, operation can only be performed with the drain current at its maximum, which makes it impossible to optimize the noise figure in terms of noise suppression, for example. .

OBJECTS OF THE INVENTION The present invention provides a feedback amplifier circuit that does not use a negative power source system and can also apply a gate bias voltage.

Embodiment of the Invention FIG. 3 is a circuit diagram of a main part of an embodiment of the present invention, and the same parts as those explained in connection with FIGS. 1 and 2 are indicated by the same symbols.

This embodiment differs from the conventional example shown in FIGS. 1 and 2 in that a source resistor R5 and a source bypass capacitor Cs are inserted between the source of the field effect transistor Q and the ground.
A negative voltage, that is, a gate bias voltage, is generated between the gate and the source.

Therefore, by appropriately selecting the value of the source resistance R50, it is possible to apply a set gate bias voltage to the gate of the field effect transistor Q to appropriately control its operating point. Therefore, it is possible to create a feedback amplifier circuit with an optimized noise figure.

FIG. 4 is a circuit diagram of a main part of another embodiment of the present invention, and the same parts as those explained in connection with FIG. 83 are indicated by the same symbols.

This embodiment differs from the embodiment shown in FIG. 3 in that it does not have a feedback capacitor Cf.

This embodiment is characterized by good feedback down to low frequencies, but unlike the embodiment shown in FIG. 3, it is not possible to set the gate bias voltage by adjusting only the source resistance RS. In addition, each of the gate resistance Rg, voltage resistance Rd, and feedback resistance Rf must be adjusted comprehensively.

Effects of the Invention According to the present invention, in a feedback amplifier circuit having a field effect transistor in which a power supply is connected only to the drain and a feedback resistor is inserted between the drain and the gate, the source transistor of the field effect transistor is Since a source resistor and a source bypass capacitor are inserted between the ground and a gate resistor is inserted between the gate and the ground, a negative voltage is generated between the source and the gate. Since the voltage becomes the gate bias voltage and can determine the operating point of the field effect transistor, it is possible to optimize the noise figure even though it is a power supply system.
A feedback amplifier circuit with good characteristics can be obtained.

[Brief explanation of the drawing]

1 and 2 are circuit diagrams of main parts of different conventional examples, and FIGS. 3 and 4 are circuit diagrams of main parts of different embodiments of the present invention. 113, Q is a field effect transistor, Rf is a feedback resistor, Cf is a feedback capacitor, Rg is a gate resistor, R
d is the power supply resistance, +van is the drain side supply voltage, VC
C is the gate side supply voltage, R5 is the source resistance, and cS is the source bypass capacitor. Patent applicant Fujitsu Ltd. Representative Patent Attorney Kugobe Tamamushi (3 others) Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] In a feedback amplifier circuit having a field effect transistor in which a power supply is connected only to the drain and a feedback resistor is inserted between the drain and the gate, a source resistor and a feedback resistor are inserted between the source and ground of the field effect transistor, respectively. Source bypass circuit No. 7, a feedback amplifier circuit characterized in that it also includes a gate resistor inserted between the gate and ground.