JPS59173357U - Printed board - Google Patents
Printed boardInfo
- Publication number
- JPS59173357U JPS59173357U JP6687183U JP6687183U JPS59173357U JP S59173357 U JPS59173357 U JP S59173357U JP 6687183 U JP6687183 U JP 6687183U JP 6687183 U JP6687183 U JP 6687183U JP S59173357 U JPS59173357 U JP S59173357U
- Authority
- JP
- Japan
- Prior art keywords
- plating
- back sides
- lead
- printed circuit
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図〜第3図は従来例を示し、第1′図aはフレキシ
ブルプリント基板の表面図、同すは裏面図、第2図は第
1図におけぬ■−■断面図、第3図は第1図における正
面図である。第4図及び第5図は本考案の第1実施例を
示し、第4図aはフレキシブルプリント基板の表面図、
同すは裏面図、第5図は第4図における正面図である。
第6図及び、第7図は本考案の第2実施例を赤し、第6
図aはフキシブルプリント基板の表面図、同すは裏面図
、第7図は第6図における正面図である。
〔主要部分の符号の説明〕、10・・・フレキシブルプ
リント基板、12・・・ベースフィルム、14゜16・
・・リード線、18. 20−・・カバーフィルム、2
6.28・・・端子用パターン、40,42.50a〜
50e、52a〜52e・・・めっき用リードパターン
。1 to 3 show a conventional example, FIG. The figure is a front view in FIG. 1. 4 and 5 show the first embodiment of the present invention, FIG. 4a is a surface view of the flexible printed circuit board,
5 is a back view, and FIG. 5 is a front view of FIG. 4. Figures 6 and 7 show the second embodiment of the present invention in red;
Figure a is a front view of the flexible printed circuit board, the same is a back view, and Figure 7 is a front view of Figure 6. [Explanation of symbols of main parts], 10...Flexible printed circuit board, 12...Base film, 14°16.
...Lead wire, 18. 20-...Cover film, 2
6.28...Terminal pattern, 40, 42.50a~
50e, 52a to 52e... Lead patterns for plating.
Claims (1)
面側及び裏面側のリード線の一部が端子用パターンとさ
れるとともに、該端子用パターンをめっきするために該
ベース基板端縁に露出させためつき用リードパターンを
備え、前記ベース基板の表面側のめっき用リードパター
ンと、ベース基板の裏面側のめっき用リードパターンと
が表裏で重なり合わないようにされたことを特徴とする
プリント基板。 、2 前記めっき用リードパターンは前記プリント基板
の配線パターンの中で最も幅が狭く形成されている実用
新案登録請求の範囲第1項に記載のプリント基板! 3 前記めっき用リードパターンは、前記ベース基板の
表裏で重なり合わないように前記ベース基板の表裏で互
いに反対方向に屈曲されている実用新案登録請求の範囲
第2項記載のプリント基板。[Claims for Utility Model Registration] 1. Lead wires are wired on both the front and back sides of the base board, and a portion of the lead wires on the front and back sides are used as a terminal pattern, and the terminal pattern is plated. is provided with a lead pattern for plating exposed on the edge of the base substrate, and the lead pattern for plating on the front side of the base substrate and the lead pattern for plating on the back side of the base substrate are prevented from overlapping on the front and back sides. A printed circuit board characterized by: , 2. The printed circuit board according to claim 1, wherein the plating lead pattern is formed to have the narrowest width among the wiring patterns of the printed circuit board! 3. The printed circuit board according to claim 2, wherein the plating lead patterns are bent in opposite directions on the front and back sides of the base board so that they do not overlap on the front and back sides of the base board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6687183U JPS59173357U (en) | 1983-05-06 | 1983-05-06 | Printed board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6687183U JPS59173357U (en) | 1983-05-06 | 1983-05-06 | Printed board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59173357U true JPS59173357U (en) | 1984-11-19 |
JPH0223007Y2 JPH0223007Y2 (en) | 1990-06-21 |
Family
ID=30197074
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6687183U Granted JPS59173357U (en) | 1983-05-06 | 1983-05-06 | Printed board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59173357U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62271493A (en) * | 1986-05-20 | 1987-11-25 | 日立マクセル株式会社 | Semiconductor device |
JP2007072066A (en) * | 2005-09-06 | 2007-03-22 | Sanyo Epson Imaging Devices Corp | Electro-optical device, electronic device, interface board |
JP2009042777A (en) * | 2008-09-24 | 2009-02-26 | Epson Imaging Devices Corp | Electro-optical device and electronic apparatus |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243661U (en) * | 1975-09-25 | 1977-03-28 | ||
JPS5559795A (en) * | 1978-10-30 | 1980-05-06 | Nippon Electric Co | Printed circuit board and method of manufacturing same |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243661B2 (en) * | 1974-02-23 | 1977-11-01 |
-
1983
- 1983-05-06 JP JP6687183U patent/JPS59173357U/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243661U (en) * | 1975-09-25 | 1977-03-28 | ||
JPS5559795A (en) * | 1978-10-30 | 1980-05-06 | Nippon Electric Co | Printed circuit board and method of manufacturing same |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62271493A (en) * | 1986-05-20 | 1987-11-25 | 日立マクセル株式会社 | Semiconductor device |
JP2007072066A (en) * | 2005-09-06 | 2007-03-22 | Sanyo Epson Imaging Devices Corp | Electro-optical device, electronic device, interface board |
JP2009042777A (en) * | 2008-09-24 | 2009-02-26 | Epson Imaging Devices Corp | Electro-optical device and electronic apparatus |
JP4626694B2 (en) * | 2008-09-24 | 2011-02-09 | ソニー株式会社 | Electro-optical device and electronic apparatus |
Also Published As
Publication number | Publication date |
---|---|
JPH0223007Y2 (en) | 1990-06-21 |
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