JPS59168645A - Loading method of semiconductor pellet - Google Patents
Loading method of semiconductor pelletInfo
- Publication number
- JPS59168645A JPS59168645A JP4255683A JP4255683A JPS59168645A JP S59168645 A JPS59168645 A JP S59168645A JP 4255683 A JP4255683 A JP 4255683A JP 4255683 A JP4255683 A JP 4255683A JP S59168645 A JPS59168645 A JP S59168645A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor pellet
- low melting
- ceramic
- pellet
- point glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000008188 pellet Substances 0.000 title claims abstract description 30
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000011068 loading method Methods 0.000 title 1
- 239000011521 glass Substances 0.000 claims abstract description 23
- 239000000919 ceramic Substances 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 3
- 238000002844 melting Methods 0.000 claims description 17
- 230000008018 melting Effects 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 12
- 239000007787 solid Substances 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 abstract description 2
- 238000007796 conventional method Methods 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000006023 eutectic alloy Substances 0.000 description 1
- RZTAMFZIAATZDJ-UHFFFAOYSA-N felodipine Chemical compound CCOC(=O)C1=C(C)NC(C)=C(C(=O)OC)C1C1=CC=CC(Cl)=C1Cl RZTAMFZIAATZDJ-UHFFFAOYSA-N 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000005394 sealing glass Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8389—Bonding techniques using an inorganic non metallic glass type adhesive, e.g. solder glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体ベレットをセラミック基体に搭載する方
法に関し７、’ｔ’＋に低融点カラス片を介してセラミ
ック）、１併に接着う゛る方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of mounting a semiconductor pellet on a ceramic substrate (7) and a method of adhering the semiconductor pellet to the ceramic substrate via a piece of glass having a low melting point.
半導体ベレットをセラミック基体に搭載するには、Ａｎ
−８ｉ 共晶系の合金が多く用いられていたが、近年は
低融１点カラスにより、半導体ベレットをセラミック稈
一体に融着する方法も多く用いられてきた。その場合、
ベンツ１面には低融点カラスとの接着強度を上げるため
に、アルミニウム（Ａｔ）等の膜形成が一般に行なわ扛
ている。従来より行なわれている低融点カラスを介して
の半導体ベレットの接Ｍ（以下カラスマウントと−う）
方法を駒！１図に示す。つまり、セラミック基体ｌのダ
イアタッチ面２の上にあらかじめ低融点ガラス層３Ａ：
形成し７ておき、裏面にあらかじめＡρ薩７を形成した
半導体ペレット６を融着するのである。In order to mount the semiconductor pellet on the ceramic substrate, An
-8i Eutectic alloys were often used, but in recent years, a method in which a semiconductor pellet is integrally bonded to a ceramic culm using a low-melting one-point glass has also been widely used. In that case,
A film of aluminum (At) or the like is generally formed on one side of the vent to increase the adhesive strength with the low-melting glass. Conventional method of attaching a semiconductor pellet through a low-melting glass (hereinafter referred to as a glass mount)
How to piece! Shown in Figure 1. That is, the low melting point glass layer 3A is preliminarily formed on the die attach surface 2 of the ceramic substrate 1:
After forming the semiconductor pellet 6 on the back surface thereof, the semiconductor pellet 6 on which the Agon 7 has been formed in advance is fused.
このち“１合、マウンターのヒーターブロックでセラミ
ック基体】を加熱し、低融点カラス層３を溶融。After that, heat the ceramic base using the heater block of the mounter to melt the low melting point glass layer 3.
し、半導体ペレット６を矢印の方向に所定ｔｔ加圧し、
接着する方法が一般に用いられている。Then, the semiconductor pellet 6 is pressurized by a predetermined tt in the direction of the arrow,
A method of gluing is generally used.
ところが、第１図に示す方法であると、低融点カラス層
３の平面度か悪く、マウント時に半導体ベレット６が傾
いたり、一部が浮き上がってしまったり、位嵌１ズレが
生じる等の欠点を有している。However, the method shown in FIG. 1 has drawbacks such as poor flatness of the low melting point glass layer 3, which causes the semiconductor pellet 6 to tilt during mounting, part of the semiconductor pellet to be lifted up, and misalignment. have.
この様な不十分なマウント状態であると、次エイ４′の
ボンティングにおいて不良が多発する。止り、傾いたま
まマウントされたベレット幻、封止時に低融点カラスが
十分に流動する温度になった時、大きなペレットズレが
生じることもＬｌ：ｌ’ｌばであった。If the mounting condition is insufficient, defects will occur frequently during bonding of the next ray 4'. When the pellet was mounted while still and tilted, when the temperature reached such that the low melting point glass could flow sufficiently during sealing, large pellet displacement occurred.
本発明は従来方法の欠点を解消すべく、良好なガラスマ
ウント方法を提供することＶＣある。The object of the present invention is to provide a good glass mounting method to overcome the drawbacks of conventional methods.
本発明は低融点ガラス片を介【、て摺着する方法である
。The present invention is a method of sliding the glass pieces through a piece of low melting point glass.
第２図に従って本発明に基づくカラスマウント方法の一
実施例を説明ずろ。マウンターのヒーターブロックでセ
ラミック基体ｌを加熱し２、セラミックダイアタッチ面
２上に低融点カラス片８を１１１′き、次にあらかじめ
裏面にＡｔｎ＋ｙ７を形成した半導体ペレッ） ６ ｆ
置き、矢印の方向に所定の加圧を施しセラミックダイ
アタッチ１ｎ１２と半導体ペレット６を融着する方法で
ある。寸だ、他の実施例としては、セラミックダイアタ
ッチ面２上に低副！点カラス片８と４６らかしめ裏面に
ｈｔ膜７を形成した半導体ペレット６を積ねてｊｉ’イ
き、適切な温度プロファイル下のベルト炉等の加熱体を
通過させ、低融点カラス片８を溶融させ、セラミックタ
イアタッチ而２と半導体ペレット６を融着する方法であ
る。本発明に偽（：づくカラスマウント方法てぽ）ると
、半導体ペレット融着用の低融点ノＪシスがハである為
（通常２００〜３００μ厚）、平面１かが１ぐれており
、マウント時にペレットが傾いたり、ペレットの一部が
浮いｆ′Ｃすすることかなく、良クイなマウ；／トが成
されるという利点を有している。An embodiment of the crow mounting method according to the present invention will be described with reference to FIG. Heat the ceramic substrate l with the heater block of the mounter 2, place a low melting point glass piece 8 on the ceramic die attach surface 2, and then form a semiconductor pellet with Atn+y7 formed on the back surface in advance) 6 f
In this method, the ceramic die attach 1n12 and the semiconductor pellet 6 are fused by applying a predetermined pressure in the direction of the arrow. As another example, there is a low vice on the ceramic die attach surface 2! Semiconductor pellets 6 on which the HT film 7 is formed on the back surface of the clinched glass pieces 8 and 46 are piled up and heated, and passed through a heating element such as a belt furnace under an appropriate temperature profile to form the low melting point glass pieces 8. This is a method of melting and fusing the ceramic tie attach 2 and the semiconductor pellet 6. If the present invention were to be faked, the low melting point for semiconductor pellet fusion would be poor (usually 200-300μ thick), so plane 1 would be off by 1 when mounted. It has the advantage that a good grip can be achieved without the pellet being tilted or part of the pellet floating and being sipped.
第１図り、低融点カラスを介して半導体暑子をマウント
する従来方法を示す断面図であり、第２図は低閘廣カラ
スを介して半導体素子をマウントする本発明に基づく方
法の一実施例を示す断面図である。
伺、し１において、１・・・・・・セラミック基体、２
・・・・・・セラミックダイアタッチ面、３・・・・・
・低融点ガラス層、４・・・・・・シーリング用カラス
、５・・・・・・リードフレーム、６・・・・・・半導
体ペレット、７・・・・・・Ａ ｔＪＪｉＨ（，８・・
・・・・低融点・′カンフ片。1 is a cross-sectional view showing a conventional method of mounting a semiconductor device through a low-melting point glass, and FIG. 2 is an embodiment of the method based on the present invention for mounting a semiconductor element through a low-height glass. FIG. In 1, 1...ceramic substrate, 2
...Ceramic die attach surface, 3...
・Low melting point glass layer, 4...Sealing glass, 5...Lead frame, 6...Semiconductor pellet, 7...A tJJiH(,8・・
・・・Low melting point・'Kampf piece.
Claims (1)
にアルミニウム膜を形成し７斤半導体ベレットを低融点
ガラス片を介して接着することを特徴とする半冶体ベレ
ットの搭載方法。A method for mounting a semi-solid pellet, characterized in that an aluminum film is formed on the back surface of a ceramic substrate in advance on the die attach surface, and a 7 loaf semiconductor pellet is bonded via a piece of low melting glass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4255683A JPS59168645A (en) | 1983-03-15 | 1983-03-15 | Loading method of semiconductor pellet |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4255683A JPS59168645A (en) | 1983-03-15 | 1983-03-15 | Loading method of semiconductor pellet |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59168645A true JPS59168645A (en) | 1984-09-22 |
Family
ID=12639316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4255683A Pending JPS59168645A (en) | 1983-03-15 | 1983-03-15 | Loading method of semiconductor pellet |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59168645A (en) |
-
1983
- 1983-03-15 JP JP4255683A patent/JPS59168645A/en active Pending
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