JPS59131173U - electronic circuit package - Google Patents
electronic circuit packageInfo
- Publication number
- JPS59131173U JPS59131173U JP2527083U JP2527083U JPS59131173U JP S59131173 U JPS59131173 U JP S59131173U JP 2527083 U JP2527083 U JP 2527083U JP 2527083 U JP2527083 U JP 2527083U JP S59131173 U JPS59131173 U JP S59131173U
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- circuit package
- front plate
- wiring board
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000605 extraction Methods 0.000 description 1
Landscapes
- Manufacturing Of Printed Wiring (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の正面板を取り付けた電子回路パッケージ
の側面図、第２図は第１図の平面図、第３図は第１図の
正面図、第４図は本考案の実施例の電子回路パッケージ
を示す側面図、第５図は第４図の平面図、第６図は第４
図の平面図である。
尚図において、１１・・・印刷配線板、１２・・・電子
部品、１３・・・正面板、１４ａ・・・取り付は部、１
４ｂ・・・取り付は穴、１５・・・引抜き用貫通穴、１
６ａ、 １６ｂ、 １７ａ、 １７ｂ−、突起部
。Fig. 1 is a side view of an electronic circuit package with a conventional front plate attached, Fig. 2 is a plan view of Fig. 1, Fig. 3 is a front view of Fig. 1, and Fig. 4 is an embodiment of the present invention. A side view showing the electronic circuit package, Fig. 5 is a plan view of Fig. 4, and Fig. 6 is a plan view of Fig. 4.
FIG. In the figure, 11...Printed wiring board, 12...Electronic components, 13...Front plate, 14a...Mounting part, 1
4b... Mounting hole, 15... Through hole for extraction, 1
6a, 16b, 17a, 17b-, protrusion.
Claims (1)
において、前記印刷配線板のそり矯正が行えるように、
前記正面板に突起部を設けたことを特徴とする電子回路
パッケージ。In an electronic circuit package formed by mounting a front plate on a printed wiring board, in order to correct warpage of the printed wiring board,
An electronic circuit package characterized in that a protrusion is provided on the front plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2527083U JPS59131173U (en) | 1983-02-23 | 1983-02-23 | electronic circuit package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2527083U JPS59131173U (en) | 1983-02-23 | 1983-02-23 | electronic circuit package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59131173U true JPS59131173U (en) | 1984-09-03 |
Family
ID=30156259
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2527083U Pending JPS59131173U (en) | 1983-02-23 | 1983-02-23 | electronic circuit package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59131173U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010177513A (en) * | 2009-01-30 | 2010-08-12 | Toshiba Corp | Electronic apparatus |
-
1983
- 1983-02-23 JP JP2527083U patent/JPS59131173U/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010177513A (en) * | 2009-01-30 | 2010-08-12 | Toshiba Corp | Electronic apparatus |
| JP4585592B2 (en) * | 2009-01-30 | 2010-11-24 | 株式会社東芝 | Electronics |
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