JPS59123879A - Image display system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to an image display method, and in particular, in image display such as that obtained by modulating the brightness of a bright spot scanned at a constant speed using a dot pattern signal, it is possible to display a partial image on a screen. The present invention relates to an image display method that enables enlarged/reduced display.

Prior Art Conventional devices that obtain a display image by modulating the brightness of a bright spot scanned at a constant speed using an image signal include CRT display devices, liquid crystal display devices, plasma display devices, and the like. Furthermore, if images are displayed on paper, the meaning can be expanded to include wire dot printers, thermal printers, electrophotographic printers, etc. In this case, brightness modulation in a wire dot printer means control in which wire dots are driven or not driven to form a dot on a sheet of paper depending on the presence or absence of a pixel signal.

In any case, if the image display method is unified in this way, information can be output to the above-mentioned disparate display devices with almost no modification to the original display information code group edited by a microprocessor, etc. It has the advantage of being possible.

The image display method according to the present invention is applicable to the above-mentioned display device in a broad sense.

Among such display devices, a CRT display device is suitable for displaying interactive tabulations because it can display a large amount of information on one screen. An example of a table display is shown in Figure 1 (
A), with row items a-i and column items A~
The squares corresponding to the numbers are filled in with the number A 1a data. Normally, an operator cannot recognize this displayed information all at once. Information of interest is recognized by sequentially reading the displayed data along a row or along a column. Therefore, if the display information of the rows and columns that the operator is interested in could be arbitrarily exaggerated and displayed using some method, the screen would be easier to see, which would be very beneficial.

For this purpose, color display devices have conventionally been used.

Adding a special color to the text background can emphasize important parts of the display, but the disadvantage is that it is expensive.

Alternatively, if the display is not in color, there is a method of enlarging and displaying important characters by changing the display character size. However, according to the conventional character size variable mechanism, it is first necessary to re-add the size code to the edited original display information code group. On a normal display device, characters are displayed from left to right and rows are displayed from top to bottom, so if you want to force a certain column in a table, it will appear row by row. It is necessary to add the size code at least once to the highlighted characters.

Furthermore, according to the conventional character size variable mechanism, the character is enlarged and displayed without destroying its original shape, so for example, if you try to enlarge one character twice in the row direction, it will be enlarged twice in the column direction at the same time. As a result, the displayed characters are enlarged four times.

Figure 1 (B) is column B in the table display of Figure 1 (A),
This is a preferable display example in which columns G and 1 are emphasized to the operator. However, according to the double conventional technique, the enlarged characters are also enlarged in the column direction, so there is an inconvenience that the characters protrude from the table frame. be. Furthermore, if the conventional character size variable mechanism is used, complex control is required such as calculation of the starting position of one display character and generation of pixel bombardment according to size control, and if this is done by software, the burden on the control microprocessor is reduced. Moreover, if it were implemented using hardware, the control circuit would become more complex, larger, and more expensive.

Yet another method is to emphasize the displayed characters by blinking them, but if, for example, display data of one column of sentences is displayed in a blinking manner, it becomes even more difficult to read.

Purpose The present invention has been made in view of the problems in the prior art described above. The purpose is to propose an image display method that can partially enlarge or reduce an image and display it using a cylinder structure simply by controlling the transfer rate of pixel signals.

Another object of the present invention is to propose an image display method that allows an operator to easily exaggerate and display a partial display area of screen information without adding or deleting new display information.

Example An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram showing an example of a conventional configuration for outputting an image to a CRT display section. In order to clarify the difference in configuration from an embodiment of the present invention described later, a conventional example will first be outlined.

In the figure, l is a microprocessor (hereinafter referred to as MPU) having a built-in RAM and ROM. Under the control of the MPUI, unit pixel information for characters and tabulations stored in the ROM is retrieved according to the display information code group edited and stored in the RAM, and sent to one screen via the input/output bus 11. are stored in the pixel memory 3 for the following minutes. Furthermore, the MPUI is configured to be able to send initialization signals and various commands to the CRT control section 2 via the input/output bus 11, and to receive various status signals from the CRT control section 2. .

4 is a clock oscillator (hereinafter referred to as O8C) and lead 41
A clock signal, which is the basis of control, is supplied to the CRT control unit 2 and shift register 5 via the CRT controller 2 and the shift register 5.

The CRT control unit 2 further divides the basic clock signal to obtain C
Various signals for controlling the RT drive unit 6 are generated. These signals include a horizontal sweep periodic signal outputted via the gate 21, a vertical sweep synchronization signal outputted via the gate 22, and an address signal for reading parallel pixel information one after another from the pixel memory 3. (output to the address bus 24) and a latch signal (read 23) that stores the read parallel pixel information in the shift register 5 via the data bus 31.
output). Further, the shift signal for serially transferring the parallel pixel information set in the shift register 5 to the brightness modulation circuit of the CRT drive section 6 via the lead 51 is always given by the basic clock signal on the lead 41 as described above.

The CRT drive unit 6 controls the display screen 7 according to the horizontal sweep synchronization signal.
1, generates a sawtooth wave that horizontally scans the bright spot.

On the other hand, the vertical sweep periodic signal inputted via the lead 22 has a frequency divided approximately to the ratio of the number of operating lines for one screen, and is generated in synchronization with the horizontal sweep synchronization signal, and is a signal that is generated on the display screen. 71, a sawtooth wave is generated to vertically move the bright spot. When a bright spot is scanned from top to bottom on the display screen 71 by these two sawtooth waves, if the brightness of this bright spot is modulated by one screen's worth of pixel information from the pixel memory 3, the result shown in FIG. 1(A) is obtained. It is well known that images such as those shown can be obtained.

As another example of the configuration, instead of providing the pixel memory 3 for one screen, a configuration in which parallel pixel information is directly loaded from a unit pixel generator to the shift register 5 is also common.

FIG. 3 is a timing chart showing the relationship between the sawtooth wave VH generated by the horizontal sweep synchronization signal HP and the shift signal Sr (same as the basic clock signal in the lead 41) that sends out serial pixel signals from the shift register 5. . In the figure, the sawtooth wave VH is the rising section TVH3 of the sweep.
and a retrace section TVHR. Rising section TVH
3, a bright spot is scanned across the display screen 71 from left to right at a constant speed. At the same time, the luminance of the bright spot is modulated by a serial pixel signal sent from the shift register 5 by a shift signal SP having a constant period TDN. - If the number of pixels on a horizontal scanning line is N, the rising section TVHS is a constant value having a time determined by NXTDN. The following retrace section TVHR
, the bright spot is forcibly blanked (the contents of the shift register 5 are 0) and the screen returns from right to left at high speed. On the other hand, the sawtooth wave (
(not shown) has been raised slightly at this point, serving to return the bright spot to just below the initial scan line start position. By repeating such scanning for a predetermined number of scanning lines, an image for one screen is obtained. Therefore, the size of the displayed character is always constant in accordance with the pixel information stored in the pixel memory 3.

FIG. 4 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, 1 is a microprocessor (MPU) with built-in RAM and ROM, 2 is a CRT control unit, 3 is a pixel memory, 5 is a shift register, 6 is a CRT drive unit, 7 is a CRT, and 71 is a display screen. This is the same as that of the conventional example described above.

The difference is that the clock oscillator 4 has been replaced with a variable frequency clock oscillator (hereinafter referred to as VOSC) 8 and that the VO3
This is due to the addition of a g-clock control section 9 that controls the oscillation frequency of C8. Before explaining the configuration details of the differences, the operation mode for performing partial enlargement/reduction display according to the present invention will be explained.

According to the display example shown in FIG. 1(B), first the cursor is moved to the display area of column item B. Next, press the enlarged display request key. At this time, the MPU 1 reads the display column address of the cursor, and based on this reads the list structure of the display information code group in the RAM, and finds that this is an enlarged display request for column item B. Similarly, column item B
The display start column address and number of display digits can be obtained.

Next, the MPU l sets the type parameter in the clock control unit 9 based on the obtained information, and immediately sets the number column item B.
information is displayed enlarged. The same applies to column items G and H, and it is also possible to simultaneously enlarge and display a plurality of column item parts as shown in FIG. 1(B). If you want to stop the enlarged display, just move the cursor again and press the enlarged display request key again.

FIG. 5 is a block diagram showing the configuration of the clock control section 9. As shown in FIG. In the figure, registers 904 and 905 store constants for controlling two types of oscillation frequencies. N pixel signals must always be output during the entire display period TVH3 on the horizontal scanning line. Therefore, if there are n pixels of enlarged display (oscillation with period TDL) on the same scanning line,
The remaining section (N-n pixels) is always T V HS =
This is the section in which the display is reduced (oscillated at the period TDH) to satisfy nXTDL+(N-n)XTDH (see FIG. 6). For example, if a constant for causing vosca to oscillate with period TDL is set in register 904, a constant for causing vosca to oscillate with one period TDH is set in register 905. Also, when not displaying in an enlarged manner, the period TDN = T
A constant determined by VH3/N is set in register 905.

MPUI does not need to calculate such constants every time. If the possible number of digits for enlarged display is set in advance, a pair of two constants will be calculated and stored in the table each time. M.P.
Since the UI can immediately know the total number of digits for enlarged display from the requested pattern for enlarged display entered manually, the pair of constants corresponding to the periods TDL and TDH can be obtained simply by referring to this table.

On the other hand, the basic clock signal SP on the lead 41 is used as a shift clock for a shift register (hereinafter referred to as SR) 903 consisting of N bits. AND gate 910
Since clock input is blocked by the inverter 909 while the horizontal sweep synchronization signal HP of the lead 21 is at HI level (horizontal blanking interval = TVHR), the 5R903 synchronizes N shift clocks for each horizontal scanning line. lead 91
It will be received via 01. Next, data input to 5R903 is an OR game) 907. Impark 908
It is given from a data selection circuit consisting of. Normally, the write signal on lead 9001 is deactivated, and 5R903
The output bits of are recirculated as input bits. In the initial state, all bit information of O is stored in 5R903, which causes data selector 906 to select register 9.
A constant signal for oscillation with the period TDN stored in 05 is output to the control bus 91. Therefore, characters of uniform size are displayed on the display screen 71 as shown in FIG. 1(A).

As described above, the MPU 1 receives the input from the enlarged display request key, thereby obtaining the display start column address and the number of display digits for the column item B. Furthermore, period TDL and T are added to vosc8.
The constants for oscillating the DH were also obtained by referring to the table.

7p NiM P U 1 is N that should be written to 5R903
A memory area for bits is prepared on the RAM, and write data to the 5R903 is formed here. This data is formed by writing a 0 bit into the memory when the pixel is displayed in a reduced size on the scanning line, and writing a 1 bit into the memory when the pixel is displayed in an enlarged size.

The parameters above 1 are transferred to the clock control section 9 using this section when the MPUI inquires of the vertical retrace section to the CRT control section 2 via the input/output bus 11 and synchronization is achieved. The register 904 contains a constant corresponding to the period TDL, the register 905 contains a constant corresponding to the period T[)H, and the register 901 contains N bits of write data to 5R903 (of the display area to be enlarged/reduced). data) is divided and stored in sequence. At the same time, MPU
1, the control section 900 listens for the write signal of the code 9001 in synchronization with the fall of the dummy horizontal sweep synchronizing signal HP provided in the vertical retrace section.

Thereafter, the inverter 908 prevents the return from the output bit of the 5R903. The write data previously set in the register 901 is immediately transferred to the shift register 902, and when the shift clock of the read 9101 is activated, it is synchronously transferred to the 5R 903. When such control is repeated for N bits, the horizontal sweep synchronization signal H
At the rising edge of P, the control unit 900 is deenergized and the writing ends. Thereafter, the contents of 5R903 circulate in synchronization with the scanning lines. Next, when the first horizontal scan is performed on the display screen 71, the 5R90
The contents of 3 are read out. If the output bit is 0, vO
Since the pixel 808 oscillates with a period TDH according to the constant of the register 905, the pixel is displayed in a reduced size on the screen.

When the time to output the pixel signal of column item B is reached, bit 1 is outputted from 5R903. Data selector 906 outputs the constant signal in register 904 to control bus 91 by output bit 1, so voscs oscillates at a period TDL, and pixels are enlarged and displayed on the screen. Next, when the pixel signal of column item B reaches the end T, bit 0 is output again from 5R903 in synchronization with this. Therefore, the data selector 906 connects the register 905 to the control path 91 again and sets the period TD to VO5C8.
The pixel is displayed in a reduced size on the screen as the pixel moves one step so as to oscillate. When the pixel signals of N bits are output on the scanning line in this way, the contents of 5R903 are also circulated at 11jj. Thereafter, the same control is repeated until the frame of the last scanning line.

The VOSCs may be configured so that the oscillation frequency of the oscillation circuit is directly controlled by an analog signal obtained by D-A converting the signal on the control bus 91, or a pulse (5" It may be configured such that VB is frequency-divided and controlled by a digital signal on the control bus 91. Here, the water sweep period signal HP inputted to VO5C8 via the lead 21 is the horizontal retrace section TV.
It works so that an oscillation output with a period TDN is always obtained in the HR, thereby making the horizontal retrace interval constant.

In the description of the two-part embodiment, the case where the display data in the tabulated column items is displayed in an enlarged manner has been described. One method for enlarging and displaying display data in a row item using the image display method according to the present invention is to scan the display surface vertically with scanning lines, and scan the scanning lines in the horizontal direction. This is possible by connecting to a display device having a configuration that allows switching between the horizontal scanning method and the vertical scanning method of the embodiment.

In this case, images are stored in the pixel memory in a form corresponding to scanning.

Furthermore, in the explanation of the above embodiment, a case was described in which all display data in a specified column item is uniformly enlarged. By monitoring the generation of the vertical sweep synchronization signal and resetting different parameters in the clock control unit 9 while the rask scan progresses from top to bottom, it is also possible to configure the screen to be displayed in a variety of formats. That is clear.

Furthermore, in the description of the above embodiments, the case where the scanning of the horizontal scanning lines is controlled so that the interval is always constant has been described. However, this condition is not necessarily necessary. In other words, the entire screen may be controlled to expand or contract by enlarging or reducing a partial display area on the screen. This reduces the burden on the microprocessor that controls the oscillation period.

Effects As described above, according to the present invention, by simply adding a lock control means, it is possible to arbitrarily enlarge or reduce a partial display area of screen information and display it with a TI ratio of 17. Furthermore, since there is no need to add complicated control to the output from the pixel memory, the configuration of display control can be simplified.

Further, when the present invention is used for table display as in the embodiment, it is particularly effective because it is possible to easily display an exaggerated display area of interest by scanning the keyboard while looking at the screen.

[Brief explanation of the drawing]

FIG. 1(A) is an example of a tabular display; FIG. 1(B) is an example of a partially enlarged tabular display; FIG. 2 is a block diagram showing an example of a conventional CRT image display device; 3 is a timing chart showing the timing of horizontal scanning in the CRT image display device shown in FIG. 2. FIG. 4 is a block diagram showing the structure of an embodiment of the present invention. FIG. 5 is a block diagram showing the structure of the clock control section. , FIG. 6 shows the horizontal scanning in one embodiment of FIG.
l...Microprocessor (MPU), 2...CR
T control unit, 3 pixel memories, 4... clock oscillator (
O5C), 5...Shift register, 6...CRT drive unit, 7...CRT, 8...Variable frequency clock oscillator (VO5C), 9...Clock control unit, patent applicant Canon Co., Ltd.

Claims (1)

[Claims] A device for obtaining an image by modulating a scanning bright spot moving at a constant speed with a pixel signal, comprising a storage means for storing a display area to be enlarged or reduced on a screen, and a period of pixel modulation controlled based on the output of the storage means. 1. An image display method characterized by having a pixel modulation means for displaying a display image by enlarging or reducing a partial display area.