JPS59119848A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the lowering of switching speed by a method wherein a U-groove is formed through the window of an isolation part located on a nitride film and an insulating film which are successively grown on the whole surface, a channel-cut layer is formed at the bottom part, and an oxide film is formed on the insulating material which is filled by selectively oxidizing the surface, thereby enabling to reduce the junction capacitance and parasitic capacitance of the semiconductor device. CONSTITUTION:A buried layer 8 is diffused on the whole surface of a silicon substrate 1, and after an epitaxial layer 9 has been formed thereon, a field oxide film 2 is formed using a nitride film as a mask. Then, a nitride film 10 and then a phosphosilicate glass film 11 are successively grown on the whole surface, and a window is provided on an isolation region by performing an etching. Then, a groove 12 is formed by performing another etching through the window, subsequently boron is ion-implanted, and a channel-cut layer 13 is formed. Then, an oxide film 14 is selectively formed on the surface of the U-groove 12. Said U-groove is filled up by growing polycrystalline silicon 15. Subsequently, the polysilicon film located on an active region is removed by performing a wet etching, the surface of the polysilicon 15 is selectively oxidized using the nitride film 10, it is connected to a field oxide film 2, and the nitride film 10 is removed.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method for manufacturing a 21' conductor device, and more particularly, to a method for manufacturing a 21' conductor device, in particular a method for forming a U-groove in an isolane portion to complete element isolation. .

(2) Background of the technology A transistor surrounded by an oxide film (hereinafter referred to as USi' structure) is shown in the cross-sectional view of Figure 1.
developed. Referring to the same figure, 1 is a silicon substrate, 2
is a field oxide film, 3 is an n+ type buried L, and 4 is a n+ type buried L.
type collector contact, 5 is a p+ type isolation part, 6 is a heath, 7 is an emitter, and the transistor to be manufactured has a j! of 1 to 1.5 μm. It is surrounded by a field oxide of 300 mL. The illustrated OS'r
It has been confirmed that the trench structure has the advantage of reducing the characteristics of the transistor, especially the parasitic capacitance of the heather portion.

(3) Prior Art and Problems However, the above-mentioned O31' structure has a problem in that, especially in the rounded part of the buried tooth 3, the area is large and the joint volume 1d becomes large. Further, the parasitic capacitance generated between the rounded end portion (81X) of the isolation portion 5 and the buried layer 3 tends to be large, which causes the switching speed of the device to decrease.

(4) In view of the above conventional problems, the present invention manufactures a semiconductor device in which junction storage and parasitic capacitance are reduced while utilizing an O3T structure, and a reduction in switching speed is prevented. The purpose of this method is to make a difference.

(5) The invention (14) and the object of the present invention is to form a semi-dedicated group (buried layer; after forming the epitaxial layer, to remove the isolation part and the active region of the substrate). In the method of manufacturing a semiconductor device in which an oxide film is formed on the surface of the oxide film and an insulating film is sequentially grown on the entire surface, and these films are formed in the isolation region, a step of forming a groove that penetrates through the buried layer through the window and forming a channel cut layer at the bottom of the U-groove, selectively oxidizing the surface of the U-groove; This is achieved by providing a method for manufacturing a semiconductor device, which includes the steps of filling the U-groove with an insulator and forming an oxide film on the surface of the insulator.

(6) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

In Figure 2 and below, the main parts of a semiconductor device in which the method of the present invention is carried out are shown in 19J plane views. and show.

As shown in FIG. 2, an n" type buried jτ 8 is diffused over the entire ifj of the silicon substrate 1, and a ζn-type epitaxial layer 9 is formed on the entire surface of the diffused jτ 18 by epitaxial growth. Next, Isolation portion, collector contact 1- and /\- space formation area 1so,
CG and B are each masked with a nitride film, and a field oxide film 2 having a thickness of 1 to 1.5 μm is formed by selective oxidation (LOCO5 method).

Next, 0.1% of nitrided Jiff (Si 3N 411%) 10 was applied to the entire surface by chemical vapor deposition (CVD).
A layer of 1 layer of phosphorus, silicate, glass (+) SG) 1 layer of about 0.5 μm was grown on top of the solidified layer 10 to a thickness of ~0.2 pm, and then an isolating layer was grown. Ration 1 (area to be formed for 11 minutes, etched at (+?IF,) to remove the nitrided pattern and I) SG 119 to form a window (Figure 3).

1, the isolation part formation area 1so is etched through the window 1iii using old E using (CCV a + It(V23) gas as shown in FIG. 4, to form a U groove 12. I) Wash out the sGI model by removing it, for example by wet etching), and then remove the sGI model (B") with a 40 KeV condensate, IX
Ions were implanted using the ion implantation method at a dose of 10 cm.

A p'l-shaped channel cut l-1τ is formed on the surface layer of the U-groove 12.
[Form 113.

Next, L) selectively oxidize the surface of the trench 12 to form a mono-ζ oxide film 14, grow undoped polycrystalline silicon (polysilicon) 15, and form U'/NjJ2.
Fill it.

After the formation of the polysilicon described above, the excess polysilicon is removed by polishing, and the remaining polysilicon is removed not only in the active region but also in the area CC where the collector contact is to be formed and the area B where the base is to be formed. Then, wet etching using potassium hydroxide (Koll) is performed to remove the excess polysilicon, leaving the polysilicon in the U-groove 12 (FIG. 5).

The nitriding that acted as a stopper during the polishing described above)
Selectively oxidize the surface of polysilicon 15 using dust 10,
Cover polysilicon I5 as shown in FIG. The single branch 11Q formed at this time is connected to the field oxide 11M2. The nitride +1*10 is then removed. Thereafter, a collector contact 1-, a heath, and an emitter are formed in the same manner as in the conventional process.

As mentioned above, since the J-groove is formed in the vertical force direction, the joint surface is flat and the area is reduced compared to the conventional rounded isolation part, so the joint capacitance is reduced. , since the U groove 12 is formed penetrating through the circular buried layer 8, the channel force of U 11j 12・7T layer 13
does not come into contact with the buried layer 8, thereby suppressing the occurrence of bulge valleys.

(7) Effects of the invention As explained in detail above, according to the method of the present invention,
J formed to surround the element by selective oxidation method
! Using a thin oxide film as a mask, the silicon substrate is etched to form a U-groove, which is then filled with an insulator to form device isolation.
This makes it possible to reduce the parasitic capacitance between the elements, which is highly effective in preventing a reduction in the switching speed of the element.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of an O3T structure according to the prior art, and FIGS. 2 to 6 are cross-sectional views of essential parts of a semi-dedicated apparatus in the process of implementing method A.2 of the invention. 1-Silicon substrate, 2-Fiel IS oxide film,” --
'Buried? J-b, 4-collector contact, 5-'j
'Inlay part, 6--, -su, 7-emifth, 8-buried layer, 9-epitaxial layer, 10-crab film,
1l-PSG crotch, 12-- Ll fj, L3-ch + flannel cut j row, 14-oxide film, 15-bo ν silicon

Claims (1)

[Claims] After forming a buried layer and an epitaxial layer on a semiconductor substrate, an oxide film is selectively formed on the substrate except for isolation areas and active regions, and a semiconductor device surrounded by these oxide films is manufactured by nitriding the entire surface. A process of sequentially bottom IMing the j pattern and the insulating film, forming a window in one of these patterns in the isolation part, forming a U groove that penetrates through the buried j part through the window, and forming a bottom IM of the U groove. a step of forming a single layer of channel cutters on the portion; a step of selectively oxidizing the surface of the U-groove and filling the U-groove with an insulator; step 4-1) forming an oxide layer on the surface of the insulator; A method for manufacturing a semiconductor device, comprising the steps above.