JPS5880910A - Tone control circuit - Google Patents
Tone control circuitInfo
- Publication number
- JPS5880910A JPS5880910A JP56178680A JP17868081A JPS5880910A JP S5880910 A JPS5880910 A JP S5880910A JP 56178680 A JP56178680 A JP 56178680A JP 17868081 A JP17868081 A JP 17868081A JP S5880910 A JPS5880910 A JP S5880910A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- supplied
- control
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G5/00—Tone control or bandwidth control in amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G5/00—Tone control or bandwidth control in amplifiers
- H03G5/005—Tone control or bandwidth control in amplifiers of digital signals
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Abstract
Description
【発明の詳細な説明】
トーンコントロール回路は一般に:2ンデンナ及び挺−
抗器の組み金わせにより構成されている。従って、その
よう゛なシーン暑ントーール回路に1例えば第j!II
λに示すように高域成分8Hと低域成分8Lとを有する
オーディオ信号が供給されていると鯉、例えば像域を増
強するようにトーンコン塾−−゛ルを行さと、第f1m
BK示すように低域成分8Lのレベルが大きくなると同
時に、位相のずれ!、すなわち、位相歪みを生じてしま
う。DETAILED DESCRIPTION OF THE INVENTION Tone control circuits generally include:
It is composed of a combination of resistors. Therefore, if such a scene is hot in the total circuit, for example, the jth! II
If an audio signal having a high frequency component 8H and a low frequency component 8L is supplied as shown in
As shown in BK, the level of low frequency component 8L increases and at the same time, the phase shifts! In other words, phase distortion occurs.
この発明は、この各信号成分の位相を考慮したトーンコ
ントロール回路を提供しようとするものである。The present invention aims to provide a tone control circuit that takes into consideration the phase of each signal component.
以下その一例についズ説明しよう、なお、以下の例にお
いては、jlll1311に示すように、低域は100
1ム以iを±10dBの範囲にわたつ【調整でき、高域
は15 kHz以上を±10dBの範囲にわたって調整
できる′ようにした巻金である。I will explain one example below.In the following example, as shown in jllll1311, the low range is 100.
It is a winding that can be adjusted over a range of ±10 dB over a range of ±10 dB, and the high frequency range can be adjusted over a range of ±10 dB over 15 kHz.
第1図KThい、て、アナーダのオーディオ信号が、入
力端子(1)を通じズム/D−ンパータ(2)K供給さ
れ1周液数が例えば60に出でナンプリンダされてデジ
タル信置S彦に変換さt、この信号82がローパスフィ
ルタαυに供給される。Fig. 1 KTh, Anada's audio signal is supplied to the rhythm/D-parter (2)K through the input terminal (1), and when the liquid number for one cycle is, for example, 60, it is number printed and sent to the digital Shinoki Shiko. This signal 82, converted t, is fed to a low-pass filter αυ.
このフィルタaυは、98個の遅延回路D・〜D−7と
、SO個の係数回路al)〜14−と、−49個の加算
−路4〜ム4Iとにより係数が対称な98次oFrR形
に構成される4゜すなわち、遅延回路D・〜D・1が縦
続接続、され、0番目の遅延回路Do K信号8sが供
給され、n番目(0<II<49 )及び(1151−
11)1目の遅延回路”lie I)sトnの出力が(
49−ym)番目の係数回路141−EI K供給され
ると共に、信号81及び遅延回路D・8の出力が係数回
路aa* K供給され、48番目の遅延回路I)4gの
出力が係数回路匂に供給され、係数回路MO”’−84
8の出力が加算回路4〜人48 K供給されて信号St
tが取り出される。This filter aυ is composed of 98 delay circuits D・~D-7, SO coefficient circuits al)~14-, and -49 addition circuits 4~4I, making up a 98th order oFrR whose coefficients are symmetrical. In other words, the delay circuits D. to D.1 are connected in cascade, the 0th delay circuit Do K signal 8s is supplied, and the nth (0<II<49) and (1151-
11) If the output of the first delay circuit is (
49-ym)-th coefficient circuit 141-EI K is supplied, the signal 81 and the output of delay circuit D. is supplied to the coefficient circuit MO”'-84
The output of 8 is supplied to the adder circuit 4 to 48K and the signal St
t is taken out.
むの場合、遅延回路D・〜D軒の避電時間は、ム/D;
ンバータ(2) Kおけるサンプリング周波数の逆数、
すなわち、 20μ秒とされる。また、係数aha・〜
149の係数は、例えば第8図に示すように選定される
。なお、との第8図において、文字Eの次の数字は、
1Gの乗数を示すもので、例えば係数回路1(Hの係数
麿・は、
lemLi1m08I−3
膜tismosx1o−”
であるi
従って、フィルタ収υの周波数特性は第6図に示すよう
な低域1通過特性(阻止帯域の損失は47 dB以上)
となり、出力信号8oは端子(1)の入力信号の低域成
分である。In the case of M, the evacuation time of the delay circuit D to D is M/D;
Inverter (2) The reciprocal of the sampling frequency at K,
In other words, it is 20 microseconds. Also, the coefficient aha・~
The 149 coefficients are selected as shown in FIG. 8, for example. In addition, in Figure 8, the number following the letter E is
It shows the multiplier of 1G, for example, the coefficient of coefficient circuit 1 (H is lemLi1m08I-3 film tismosx1o-"). Therefore, the frequency characteristic of filter convergence υ is a low-pass 1-pass as shown in Fig. 6. Characteristics (stopband loss is 47 dB or more)
The output signal 8o is the low frequency component of the input signal of the terminal (1).
そして、この像域成分の信号811が乗算回路azk供
給されると共に、制御回路a3から制御信号8ssが乗
算回路aaK供給され、信号811は信号5XSkより
信号80の示すレベルが第4図に示すように制御され、
その出力信号81!が加算回路(3)に供給される。Then, the signal 811 of this image area component is supplied to the multiplication circuit azk, and the control signal 8ss is supplied from the control circuit a3 to the multiplication circuit aaK. controlled by
Its output signal 81! is supplied to the adder circuit (3).
また、コンバータ(2)からの信号82が遅延回路Ql
を通じて加算回路(3)K供給される。この遅延回路Q
1は、加算回路(3)K供給される信号8漏と信号。Further, the signal 82 from the converter (2) is transmitted to the delay circuit Ql
The adder circuit (3)K is supplied through the adder circuit (3)K. This delay circuit Q
1 is the signal 8 and the signal supplied to the adder circuit (3) K.
81*との違蔦時間の差をなくすためのものであり、こ
のため、遅延回路a!9はフィルタa1)における遅延
回路DIGと同様の4−個の遅延回路り、〜D41によ
り構成される。This is to eliminate the difference in the delay time from 81*, and for this reason, the delay circuit a! Reference numeral 9 is composed of four delay circuits D41 similar to the delay circuit DIG in the filter a1).
さらに、フィルタt21)の遅延回路I)4tから信号
8mが取り出され、この信号82が1ノ・イバスフィル
タ111)K供給される。このフィルタ61)も係数が
対称な3次のFIR形に構成されているもので、遅延回
路D・、Dlと、係数回路b・、blと、加算回路B。Furthermore, a signal 8m is taken out from the delay circuit I)4t of the filter t21), and this signal 82 is supplied to the 1no bus filter 111)K. This filter 61) is also constructed in a third-order FIR type with symmetrical coefficients, and includes delay circuits D., Dl, coefficient circuits b., bl, and an adder circuit B.
とを有する。なお、係数回路bOe blの係数は例え
ば第9図に示すように選定される。and has. Note that the coefficients of the coefficient circuit bOe bl are selected as shown in FIG. 9, for example.
従つ【、フィルタ600周波数特性は第1図に示すよう
な高域通過特性(阻止帯域の損失は5411B以上)と
なり、その出力信号SStは端子(1)の入力信号の高
域成分である。また、この信号831と。Therefore, the frequency characteristic of the filter 600 becomes a high-pass characteristic (stopband loss is 5411B or more) as shown in FIG. 1, and its output signal SSt is a high-frequency component of the input signal at the terminal (1). Also, this signal 831.
加算回路(3)K供給されている信号811 # 8m
との関に遷蔦時間の差を生じることがない。Adder circuit (3) K supplied signal 811 #8m
There is no difference in transfer time between the two.
そして、この高域成分の信号SStが乗算回路(2)K
供給されると共に、制御回路(至)から制御信号all
が乗算回路(2)K供給され、信号831は信号5SS
kより信号ssiの示すレベルが第6図に示すように制
御され、その出力信号SSSが加算回路(3)K供給さ
れる。Then, this high-frequency component signal SSt is transmitted to the multiplier circuit (2) K
At the same time, the control signal all is supplied from the control circuit (to).
is supplied to the multiplier circuit (2) K, and the signal 831 is the signal 5SS.
The level of signal ssi is controlled by k as shown in FIG. 6, and the output signal SSS is supplied to adder circuit (3)K.
従って、加算回路(3)からは、信号all e ’1
m ’11の加算信号8mが取り出されると共に、こ
の信号83は、第3HK示すよ)な周液数特性になる。Therefore, from the adder circuit (3), the signal all e '1
The addition signal 8m of m'11 is taken out, and this signal 83 has a liquid number characteristic as shown in the 3rd HK.
すなわ、ち、−御償−*5lsKより低域成分81mの
レベルは、第4図に示すよ5に変化し、この低域成分8
11が平坦なs性の信号83に加算されるので、加算信
号8m K會すれる像域成分itsは第3図に示すよう
に変化する。また、制御信号ass Kより高域成分8
11f)レベルは、第2図に示すよ5に変化し、この高
域成分881が平坦な特性の信号83に加算され養ので
、加算俳号8mKt壕れる高域成分ss1は第5IIK
示すように変化する。従って、信号もは、制御信号81
1 m s、、 Kより第3図に示すように変化する周
液数特性になる。In other words, the level of the low frequency component 81m changes from 5lsK to 5 as shown in Figure 4, and this low frequency component 8
11 is added to the flat s-character signal 83, the image area component its which meets the summed signal 8mK changes as shown in FIG. In addition, the higher frequency component 8 from the control signal ass K
11f) The level changes to 5 as shown in FIG. 2, and this high frequency component 881 is added to the signal 83 with flat characteristics.
Change as shown. Therefore, the signal also becomes the control signal 81
From 1 m s,,K, the peripheral liquid number characteristic changes as shown in Fig. 3.
そして、仁の信4#8sがD/ムコンパーメ(4)に供
給されてアナ1wダのオーディオ信号とされ、これが出
力端子(5)K取り出される。Then, Jin's signal 4#8s is supplied to the D/mukon perme (4) and made into an analog 1w da audio signal, which is taken out from the output terminal (5)K.
ヒラして、この発明によれば、オーディオ信号のトーン
プント璽−ルができるが、この場合、特にこの発@によ
れば、平坦な特性の信号83に低域成分”11及び高域
成分SSSを加算して所望の周腋数峙性を得ると共に、
このとき両成分811 e ’l!を形成するフィルタ
αυ、clυを係数が対象なFIR形フィルタにより構
成しているので、フィルタαυ。Furthermore, according to the present invention, tone punching of an audio signal is possible. In this case, in particular, according to this invention, a low frequency component "11" and a high frequency component SSS are added to a signal 83 with a flat characteristic. While adding up to obtain the desired circumaxillary number,
At this time, both components 811 e 'l! Since the filters αυ and clυ that form the filter αυ and clυ are composed of FIR type filters with symmetrical coefficients, the filter αυ.
tA勘の位相特性は平坦となり、信号S1鵞e ’1m
K位相のずれを生じることがなく、従つ【、端子(5
)の出力信号Ktまれる低域成分8tzと中域成分と高
域成分8nとの間にも位相のずれ、すなわち、位相歪み
を生じることがない。The phase characteristics of the tA intuition become flat, and the signal S1'1m
K phase shift does not occur, and the follow [, terminal (5
), there is no phase shift, that is, no phase distortion, between the low frequency component 8tz, middle frequency component, and high frequency component 8n included in the output signal Kt.
第10図に示す例においては、低域、中域、高域の位相
(遅延)をも調整できるようにした場合である。In the example shown in FIG. 10, the phase (delay) of the low, middle, and high ranges can also be adjusted.
すなわち、フィルタαυからの低域成分811と、遅延
回路Qυからの平坦な特性の信号8!と、フィルタa1
)からの高域成分8m1とが減算回路(6)K供給され
、信号S3から両成分’11 s Sm1が減算され【
中域成分S・が取り出される。そし文、これら各成分8
1h8・、831が可変遅延回路I、(財)、C%に供
給されると共に、制御回路(15、(ハ)、&9からの
制御信号により遅延回路I〜(財)の遅延時間がそれぞ
れ制御される。That is, a low frequency component 811 from the filter αυ and a signal 8 with flat characteristics from the delay circuit Qυ! and filter a1
) is supplied to the subtraction circuit (6)K, and both components '11s Sm1 are subtracted from the signal S3.
A midrange component S. is extracted. So, each of these ingredients 8
1h8・, 831 are supplied to variable delay circuits I, (goods), and C%, and the delay times of delay circuits I to (goods) are controlled by control signals from control circuits (15, (c), &9), respectively. be done.
そして、逼l!回路a4からの低域成分811が乗算I
I jl am K供給され1遍蔦回路(財)からの中
域成分S6が加算回路(3)K供給されると共に、遅延
回路(財)からの高域成分831が乗算回路(至)k供
給される。And, 〼l! The low frequency component 811 from circuit a4 is multiplied by I
I jl am K is supplied, and the mid-range component S6 from the one-way circuit is supplied to the adder circuit (3), and the high-frequency component 831 from the delay circuit is supplied to the multiplier circuit (to) k. be done.
従って、端、子(5)kはトーンプントロールされたオ
ーディオ信号が取り出されると共に、その各帯域成分の
遅駕は所望の大きさに調整されたものとなる。Therefore, at the terminal (5) k, a tone-controlled audio signal is extracted, and the delay of each band component is adjusted to a desired magnitude.
第1図、第10図は仁の発例の一例の系統図、第2図〜
第9WAはその説明のための図である。
Iはm−パスフィルタ、Gυはバイパスフィルタtある
。Figures 1 and 10 are phylogenetic diagrams of an example of Jin, and Figures 2~
The ninth WA is a diagram for explaining the same. I is an m-pass filter, and Gυ is a bypass filter t.
Claims (1)
給され、係数が対称なFIR形のm−パスフィルタと、
上記デジタル信号が供給され、係数が対称なFIR形の
ノ・イパスフィルタと、上記−一パスフィルタの出力を
制御してこの出力がD/ム変換されたときの信号成分の
レベルを制御する第1の乗算回路と、上記ノ・イパスフ
ィルタの出力を制御してこの出力がD/ム変換されたと
きの信号成分のレベルを制御する第2の乗算回路と、上
記第lの乗算回路の出力と上記第2の乗算回路の出力と
上記オーディオ信号の少なくとも中域成分を有するデジ
タル信号とを加算する加算回路とを有し、この加算回路
からトーンコントーールされた上記オーディオ信号のデ
ジタル信号を堆り出すようにしたトーンコントロール回
路。an FIR type m-pass filter with symmetrical coefficients, to which a digital signal A/D converted from an audio signal is supplied;
The digital signal is supplied to a FIR-type no-pass filter with symmetrical coefficients, and a second filter that controls the output of the one-pass filter to control the level of the signal component when the output is D/MU-converted. a second multiplier circuit that controls the output of the no-pass filter to control the level of a signal component when this output is D/mu-converted; and an output of the l-th multiplier circuit. and an adder circuit for adding the output of the second multiplier circuit and a digital signal having at least a mid-range component of the audio signal, and a digital signal of the tone-controlled audio signal is output from the adder circuit. Tone control circuit designed to bring out
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56178680A JPS5880910A (en) | 1981-11-06 | 1981-11-06 | Tone control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56178680A JPS5880910A (en) | 1981-11-06 | 1981-11-06 | Tone control circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5880910A true JPS5880910A (en) | 1983-05-16 |
JPH0557767B2 JPH0557767B2 (en) | 1993-08-24 |
Family
ID=16052670
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56178680A Granted JPS5880910A (en) | 1981-11-06 | 1981-11-06 | Tone control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5880910A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6276315A (en) * | 1985-09-27 | 1987-04-08 | Victor Co Of Japan Ltd | Digital filter |
JPS6276316A (en) * | 1985-09-27 | 1987-04-08 | Victor Co Of Japan Ltd | Digital filter |
JPS62291211A (en) * | 1986-06-10 | 1987-12-18 | Fujitsu Ten Ltd | Sound quality control device |
JPS63187417U (en) * | 1987-05-25 | 1988-11-30 | ||
JPS6441511A (en) * | 1987-08-07 | 1989-02-13 | Victor Company Of Japan | Digital audio tone controller |
WO2011072737A1 (en) * | 2009-12-16 | 2011-06-23 | Robert Bosch Gmbh | Audio system, method for generating an audio signal, computer program and audio signal |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS512368A (en) * | 1974-03-14 | 1976-01-09 | Victor Company Of Japan | Fm shingodensoyotaiikirohaki |
JPS5397355A (en) * | 1977-02-04 | 1978-08-25 | Sharp Corp | Phase adjusting device |
JPS53138212A (en) * | 1977-05-10 | 1978-12-02 | Nippon Hoso Kyokai <Nhk> | Emphasis system |
JPS55162424U (en) * | 1979-05-09 | 1980-11-21 | ||
JPS55163908A (en) * | 1979-06-08 | 1980-12-20 | Takayoshi Hirata | Digital tone control circuit |
JPS5620320A (en) * | 1979-07-28 | 1981-02-25 | Takayoshi Hirata | Digital frequency control circuit |
-
1981
- 1981-11-06 JP JP56178680A patent/JPS5880910A/en active Granted
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS512368A (en) * | 1974-03-14 | 1976-01-09 | Victor Company Of Japan | Fm shingodensoyotaiikirohaki |
JPS5397355A (en) * | 1977-02-04 | 1978-08-25 | Sharp Corp | Phase adjusting device |
JPS53138212A (en) * | 1977-05-10 | 1978-12-02 | Nippon Hoso Kyokai <Nhk> | Emphasis system |
JPS55162424U (en) * | 1979-05-09 | 1980-11-21 | ||
JPS55163908A (en) * | 1979-06-08 | 1980-12-20 | Takayoshi Hirata | Digital tone control circuit |
JPS5620320A (en) * | 1979-07-28 | 1981-02-25 | Takayoshi Hirata | Digital frequency control circuit |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6276315A (en) * | 1985-09-27 | 1987-04-08 | Victor Co Of Japan Ltd | Digital filter |
JPS6276316A (en) * | 1985-09-27 | 1987-04-08 | Victor Co Of Japan Ltd | Digital filter |
JPS62291211A (en) * | 1986-06-10 | 1987-12-18 | Fujitsu Ten Ltd | Sound quality control device |
JPH06101658B2 (en) * | 1986-06-10 | 1994-12-12 | 富士通テン株式会社 | Sound quality control device |
JPS63187417U (en) * | 1987-05-25 | 1988-11-30 | ||
JPS6441511A (en) * | 1987-08-07 | 1989-02-13 | Victor Company Of Japan | Digital audio tone controller |
WO2011072737A1 (en) * | 2009-12-16 | 2011-06-23 | Robert Bosch Gmbh | Audio system, method for generating an audio signal, computer program and audio signal |
US9666177B2 (en) | 2009-12-16 | 2017-05-30 | Robert Bosch Gmbh | Audio system, method for generating an audio signal, computer program and audio signal |
Also Published As
Publication number | Publication date |
---|---|
JPH0557767B2 (en) | 1993-08-24 |
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