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JPS587958A - Detecting system for signal interruption - Google Patents

Detecting system for signal interruption

Info

Publication number
JPS587958A
JPS587958A JP10585381A JP10585381A JPS587958A JP S587958 A JPS587958 A JP S587958A JP 10585381 A JP10585381 A JP 10585381A JP 10585381 A JP10585381 A JP 10585381A JP S587958 A JPS587958 A JP S587958A
Authority
JP
Japan
Prior art keywords
signal
output
flip
flop
degrees
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10585381A
Other languages
Japanese (ja)
Other versions
JPS6310626B2 (en
Inventor
Shinji Kiyota
清田 眞司
Sadao Ifukuro
貞雄 衣袋
Satoshi Ikeuchi
聡 池内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10585381A priority Critical patent/JPS587958A/en
Publication of JPS587958A publication Critical patent/JPS587958A/en
Publication of JPS6310626B2 publication Critical patent/JPS6310626B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/20Arrangements for detecting or preventing errors in the information received using signal quality detector

Landscapes

  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To precisely decide signal interruption in a repeater to be used for digital communication by applying a signal outputted from a discriminating and reproducing part and a signal obtained by delaying the phase of said output signal to a flip-flop (FF). CONSTITUTION:A signal (a) outputted from a discriminating and reproducing part 1, an equalizing amplifier part or a wave-shaping amplifier and a signal (b) obtained by delaying the phase of the output signal (a) by a delay circuit 3 are applied to FF2. When a data signal is inputted, its output signal (c) is DC and, at the time of signal interruption, the signal (c) is AC. By detecting the AC component, the signal interruption can be precisely decided.

Description

【発明の詳細な説明】 本発明はディジタル通信に使用する中継器に係p信号断
の検出を確実に行なうことが出来る信号断検出方式に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal disconnection detection method that can reliably detect a p signal disconnection in a repeater used for digital communication.

ディジタル通信に使用する中継器には等化増巾機能を有
するもの(IR機能)、勢化増巾機能及び整形増巾機能
を有するもの(2R機能)及び等化増巾機能、タイミン
グ機能及び識別再生機能を有するもの(3R機能)があ
、Q3R機能を有する中継器が用いられる場合が多い。
Repeaters used for digital communication include those with equalization amplification function (IR function), those with equalization amplification function and shaping amplification function (2R function), equalization amplification function, timing function, and identification function. Some have a reproduction function (3R function), and repeaters with a Q3R function are often used.

一般に光及び同軸のディジタル通信における中継器にお
いては、ディジタル信号入力断の状態が発生した場合は
、出力における雑音の発生を防止するため、直ちに回線
を切断する必要がある。これは具体的には次のような理
由に基づいている。
Generally, in repeaters for optical and coaxial digital communications, when a digital signal input interruption occurs, it is necessary to immediately disconnect the line in order to prevent the generation of noise in the output. This is specifically based on the following reasons.

■光ディジタル通信においては、中継器入力(rj号が
断になると、信号送信用レーザ全雑音で不要に駆動する
結果、レーザダイオードの劣化を促進する。
(2) In optical digital communications, if the repeater input (rj signal) is cut off, the laser for signal transmission is driven unnecessarily by the total noise, which accelerates the deterioration of the laser diode.

■光及び同軸のディジタル通(已における中継器では、
信号入力がないとき2次段の装置が雑音によって誤動作
を生じる。
■Optical and coaxial digital communication (in repeaters,
When there is no signal input, the secondary stage device malfunctions due to noise.

従来、3R機能を有する中継器における信号断検出方式
としては、タイミング回路におけるタイミング信号抽出
用タンク回路を出力する信号が。
Conventionally, as a signal disconnection detection method in a repeater having a 3R function, a signal is output from a timing signal extraction tank circuit in a timing circuit.

が生じることを利用して、信号断の判定を行なう方式が
用いられていた。しかしながらこのような方式では、@
号断時にタンク回路を出力する雑音の量が太きいときは
、信号入力がある場合と信゛号断の場合とで振巾差が小
さく、そのためすぎ号断の判定が困難になる欠点があっ
た。
A method has been used to determine whether a signal is disconnected by taking advantage of the occurrence of this phenomenon. However, in such a method, @
When the amount of noise output from the tank circuit is large when the signal is cut off, the difference in amplitude between when there is a signal input and when the signal is cut off is small, which makes it difficult to judge whether the signal is too cut off. Ta.

本発明の目的は上記の欠点をなくするために雑音が大き
い場合でも信号入力がある状態と信′+ツ断の状態との
判定を正しく行なうことが出来る信号断検出方式の提供
にある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a signal disconnection detection method that can correctly determine whether a signal is present or disconnected even when there is a large amount of noise, in order to eliminate the above-mentioned drawbacks.

本発明は上記の目的を達成するために中継器にデータ信
号が入力している場合は規則正しいタイミングの出力信
号が得られるが、信号断の場合は。
To achieve the above object, the present invention provides an output signal with regular timing when a data signal is input to the repeater, but when the signal is disconnected.

ランダムな信号が出力される点に着目し2等化増巾部又
は整形増巾機能又は識別再生部から出力する信号と、該
出力信号の位相を遅延回路によシ遅延させた信号とを、
フリップフロップに与えた場合。
Focusing on the point that a random signal is output, the signal output from the 2 equalization amplification section, shaping amplification function, or identification reproduction section, and the signal whose phase of the output signal is delayed by a delay circuit,
If given to flip-flop.

出力信号が、データ信号が入力している場合は直流とな
り、信号断の場合は交流となる故この交流3− 分子:検出することをt+′j−徴とする信号断検出方
式でおる。
The output signal is a direct current when a data signal is input, and is an alternating current when the signal is disconnected. Therefore, a signal disconnection detection method is used in which detection of this alternating current 3-molecule is a t+'j-sign.

以下本発明の実施例につき図に従って説明する。Embodiments of the present invention will be described below with reference to the drawings.

第1し1は本発明の実施例の3R機能を有する中継器の
信号断検出方式のブロック図、第2図はフリップフロッ
プにおける動作を示すタイムチャートである。図中1は
識別再生部、2はフリップフロップ、3は遅延回路、4
は直流交流判定回路である。識別再生部1は、中継器の
等化増巾部にて等化増巾されたパルスの波高値の1/2
に設定された障1値を越えているかいないかを、タイミ
ング部で入力パルス列からパルス繰返し周波数を抽出し
作られたタイミングパルスで判定し2元ツバ/l/ス列
と同じ再生されたパルスを出力する。この出力信号aは
2分岐されて、一方は直接フリップフロップ2の1方の
入力りに加えられ、他方は遅延回路3を介して遅延され
た信号すを作シ、フリップフロップ2の他方の入力Cに
加えられる。フリップフロップ2はDタイプフリップ7
0ツブ(D−FF)からなL Dはそのデータ入力端子
、Cは4− クロック入力端子である0遅延回路3は0°より大きく
360°より小さい遅延位相角を有するものである。フ
リップフロップ2はデータ信号入力がおるときはロウレ
ベル又はノ・イレベルからなる直流信号出力を発生し、
信号断の場合は入力パルス列がタイミング部にて抽出さ
れないので識別再生部1の出力はランダムな雑音となる
。フリップフロップ2の出力Cは直流交流信号判定回路
4に加えられて、交流分のレベルを検出される。すなわ
ち直流交l#1信号判定回路4は平均値検出回路又はピ
ーク値検出回路等からなり、信号入力における交流分の
平均値又はピーク値を検出して、それが一定レベル以上
であるときは信号断を示すハイレベルの信号を発生し、
一定レベル以下の時はデータ信号入力の存在を示すロー
レベルの信号を発生する。このようにして第1図に示さ
れた構成によυ信号断の検出信号dを発生することが出
来る。
1 is a block diagram of a signal disconnection detection method of a repeater having a 3R function according to an embodiment of the present invention, and FIG. 2 is a time chart showing the operation of a flip-flop. In the figure, 1 is an identification and reproducing unit, 2 is a flip-flop, 3 is a delay circuit, and 4
is a DC/AC determination circuit. The identification/reproduction unit 1 is configured to generate 1/2 of the peak value of the pulse equalized and amplified by the equalization amplification unit of the repeater.
The timing section extracts the pulse repetition frequency from the input pulse train and determines whether the fault 1 value set in Output. This output signal a is branched into two, one is directly applied to one input of the flip-flop 2, and the other is applied to the other input of the flip-flop 2 as a delayed signal via the delay circuit 3. added to C. Flip-flop 2 is D type flip 7
The 0-delay circuit 3, which is made up of 0-tubes (D-FF), has a data input terminal, C is its 4-clock input terminal, and has a delay phase angle greater than 0° and less than 360°. When there is a data signal input, the flip-flop 2 generates a DC signal output consisting of a low level or a no/no level,
When the signal is cut off, the input pulse train is not extracted at the timing section, so the output of the identification and reproduction section 1 becomes random noise. The output C of the flip-flop 2 is applied to a DC/AC signal determination circuit 4, and the level of the AC component is detected. In other words, the DC/AC l#1 signal determination circuit 4 consists of an average value detection circuit or a peak value detection circuit, etc., and detects the average value or peak value of the AC component in the signal input, and when it is above a certain level, the signal is rejected. generates a high level signal indicating disconnection,
When the level is below a certain level, a low level signal indicating the presence of data signal input is generated. In this way, the configuration shown in FIG. 1 can generate the detection signal d of the υ signal disconnection.

第2図の(5)は信号入力がある場合を示し、(B)は
信号入力断の場合を示している。又それぞれの場合にお
いて+  a+  b+  QHdは夫々第1図に示さ
れた信号a、b、c、d’9・示している。D−4i’
F2はクロック入力端子Cに力えらハでいる信号すの立
−Lり時、データ入力嬬子■)に−1,、fられている
信号aの状態を読込んで、出力における信号Cの状態が
定する。入力信号がある場合、信+ja、bの位相関係
は常に一定であり従ってD −F F 2の出力信号C
の状態に変化を生ずることがなく出力信号Cはローレベ
ル又はノ・イレベルのいづれか一方の状態を維持する。
(5) in FIG. 2 shows the case where there is a signal input, and (B) shows the case where the signal input is disconnected. Also, in each case +a+b+QHd represents the signals a, b, c, d'9, respectively, shown in FIG. D-4i'
F2 reads the state of the signal a which is applied to the clock input terminal C when the signal is set to -1, which is -1, f at the data input terminal C, and outputs the state of the signal C at the output. is determined. When there is an input signal, the phase relationship between signals +ja and b is always constant, so the output signal C of D −F F 2
There is no change in the state of the output signal C, and the output signal C maintains either the low level or the no-no level.

第2図(A)においては出力信号Cはローレベルに保た
れ、従って14流交流(S月刊W回路4の信号dは、入
力信号ありを示すローレベルになっている。一方信号断
の状態においては第2図(X3)に示す如くクロック入
力端子Cに与えられている信号すの立上り時、データ入
力端子りに与えられている信号aの状態を読込むが信号
aは雑音であるのでパルス巾は一定でなく信号すの立上
り点で読込む信号はノ・イアロウとなp出力信号Cは交
流となる0これによって直流交流信号判定回路4の検出
信号dは信号断を示すノ・イレベルになる。
In FIG. 2(A), the output signal C is kept at a low level, and therefore the signal d of the 14-current AC (S Monthly W circuit 4) is at a low level indicating that there is an input signal.On the other hand, the signal is disconnected. As shown in Figure 2 (X3), when the signal A applied to the clock input terminal C rises, the state of the signal a applied to the data input terminal is read, but since signal a is noise, The pulse width is not constant, and the signal read at the rising point of the signal becomes a low level, and the output signal C becomes an alternating current.As a result, the detection signal d of the DC/AC signal determination circuit 4 becomes a low level indicating that the signal is disconnected. become.

継器の信号断検出方式のブロンク図、互)4トjVJフ
リツゾフロツプにおける動作否・示すタイムチャートで
を)る。
A block diagram of the relay signal disconnection detection system, and a time chart showing whether or not it works in a 4-pin VJ fritz flop.

図中第1図1と同−仕種ヒのものは同−M14刊で7j
< t 。
The one with the same type as Figure 1 is the same as Figure 1, published in M14, 7j.
<t.

17−整形州中部でおるQ順形紳!巾↑fl’ 1 ’
 i71中耕、器の等什増巾部にて等化へfrllされ
たパルスの波高値の1/2に設定された閾値にて、1か
i イ+lHを超える点にて規定のパルス巾のパルスを
さ?7、生し整形しており出力されるパルスは第1図の
識別町生音19の出力と同一となるので動作としてti
t第1図第2図で説明したと同様でを、る。
17- Q Jun-gyo in Chubu, Orthopedic State! Width↑fl'1'
During i71 plowing, at the threshold set to 1/2 of the peak value of the pulse frlled to equalization at the equal width part of the vessel, the pulse of the specified pulse width at the point exceeding 1 or i + lH. What? 7. Since the output pulse is the same as the output of the identification town raw sound 19 in Fig. 1, the operation is ti.
It is the same as that explained in FIG. 1 and FIG. 2.

第51シ1は本発明の応用例の等化垢II] ’j′1
1sの出力にて信号断を検出するブロック図、第6図は
フIJ ツブフロップにおける動作を示ずタイムチャー
トである。図中第1図と同一機能のものは同−記号で示
す01“は等住僧中部である。等住僧中部1″の出力波
形は2R機能を有する場合はRZの波形であるがIR,
3R機能の場合はNRZの波形である場合もある。遅延
回路3にて遅延させる位相7− 角はRZの波形の場合は波高値の1/2に設定された闇
値の閾値を越える点閾値より下る点の巾に相当する位相
角以内で00 より大きい値の位相を遅延さし、NRZ
の波形の場合は0°より大きく360°より少さくすれ
ばよい。以下の動作は第1図第2し1にて曲間したと同
様である。
The 51st number 1 is the equalization scale II of the application example of the present invention] 'j'1
FIG. 6 is a block diagram for detecting a signal disconnection at an output of 1 s, and is a time chart that does not show the operation of the IJ block flop. In the figure, 01", which has the same function as that in Figure 1, is indicated by the same - symbol. It is the Soshuso Chubu 1". The output waveform of the Soshuso Chubu 1" is an RZ waveform when it has a 2R function, but it is an IR,
In the case of the 3R function, it may be an NRZ waveform. In the case of an RZ waveform, the phase 7-angle to be delayed by the delay circuit 3 is from 00 within the phase angle corresponding to the width of the point below the threshold at the point exceeding the dark value threshold set to 1/2 of the peak value. Delays the phase of large values, NRZ
In the case of a waveform of The following operations are the same as those performed during the inter-song period in FIG. 1, 2-1.

以上群細に説明した如く本発明によればIR機能、2R
4&能、3R機能を有する中継器で雑音が大きい場合で
も信号断の判定を確実に行なって検出信号を発生するこ
とが出来るので極めて効果的である。
As explained in detail above, according to the present invention, the IR function, 2R
A repeater having a 4&3 function and a 3R function is extremely effective because it can reliably determine a signal disconnection and generate a detection signal even when there is large noise.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の3R機能を有する中継器の信
号断検出方式のブロック図、第2図、第4図、第6図は
フリップフロップの動作を示すタイムチャート、第3図
は本発明の応用例の2R機能を有する中継器の信号断検
出方式のブロック図。 第5図は本発明の応用例の等住僧中部の出力にて信号断
を検出する場合の信号断検出方式のブロック図である。 8− 図中1は識別再生部、1′は整形州中部、1″は等住僧
中部、2は7リツプフロソプ、3け連列[回路、4け直
流交流判定回路でp・る。
FIG. 1 is a block diagram of a signal disconnection detection method of a repeater having a 3R function according to an embodiment of the present invention, FIGS. 2, 4, and 6 are time charts showing the operation of a flip-flop, and FIG. FIG. 3 is a block diagram of a signal disconnection detection method of a repeater having a 2R function according to an applied example of the present invention. FIG. 5 is a block diagram of a signal disconnection detection method in the case of detecting a signal disconnection at the output of the central part of the monk according to an applied example of the present invention. 8- In the figure, 1 is the identification and reproduction part, 1' is the orthopedic state central part, 1'' is the soju monk central part, 2 is the 7-lip flop, 3-digit series circuit, and the 4-digit DC/AC judgment circuit.

Claims (1)

【特許請求の範囲】 l ディジタル通信に使用する等化増巾、識別再生及び
タイミング再生の機能を有する中継器において、同一周
波数の2人力の位相状態の一致又は不一致によって論理
状態を変化[2て該状態を示す出力を発生するフリップ
フロップを具え。 識別再生部から出力する信号と該出力信号の位相を遅延
回路によ、Io度より大きく360度よシ小さく遅延さ
せた信号とを、該フリップ70ツブに与えて得られた出
力における交流分を検出することを特徴とする信号断検
出方式。 2、 ディジタル通信に使用する等化増巾及び整形増巾
機能を有する中継器において、同一周波数の2人力の位
相状態の一致又は不一致によって論理状態を変化して該
状態を示す出力を発生するフリップフロップを具え、整
形項中部から出力する信号と該出力信号の位相を遅延回
路により0度よp大きく360度より小さく遅延させた
信号とを、該7リツプフロツプに与えて得られる出力に
おける交流分を検出することを特徴とする信号断検出方
式。 3 ディジタル通信に使用する少なくとも等化増巾機能
を有する中縦器において、同一周波数の2人力の位相状
態の一致又は不一致によって論理状態を変化して該状態
を示す出力を発生するフリップフロップを具え9等化増
巾部から出力する信号と該出力信号の閾値における立上
り立下りの位相巾以内でかつ0度より太き(3601i
より小さく遅延回路によシ遅延させた信号とを。 該フリップフロップに与えて得られた出力における交流
分を検出することを特徴とする信号断検出方式。
[Claims] l In a repeater having equalization amplification, identification regeneration, and timing regeneration functions used in digital communication, the logic state is changed depending on whether the phase states of two operators at the same frequency match or do not match [2. A flip-flop is provided to generate an output indicative of the condition. The alternating current component in the output obtained by applying a signal output from the identification and reproducing section and a signal whose phase is delayed by more than Io degrees and less than 360 degrees by a delay circuit to the flip 70 tube. A signal disconnection detection method characterized by detecting. 2. In repeaters with equalization amplification and shaping amplification functions used in digital communications, a flip-flop is used that changes the logic state depending on whether the phase states of two inputs of the same frequency match or do not match, and generates an output indicating the state. The alternating current component in the output obtained by applying the signal output from the middle part of the shaping section and the signal whose phase is delayed by p greater than 0 degrees and smaller than 360 degrees by a delay circuit to the seven lip-flops is calculated. A signal disconnection detection method characterized by detecting. 3. A vertical amplifier having at least an equalization amplification function used in digital communication is equipped with a flip-flop that changes the logic state depending on the match or mismatch of the phase states of two inputs of the same frequency and generates an output indicating the state. Within the phase width of the rising and falling edges of the signal output from the equalization amplifier and the threshold value of the output signal, and wider than 0 degrees (3601i
The signal is delayed by a smaller delay circuit. A signal disconnection detection method characterized by detecting an alternating current component in the output obtained by applying it to the flip-flop.
JP10585381A 1981-07-07 1981-07-07 Detecting system for signal interruption Granted JPS587958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10585381A JPS587958A (en) 1981-07-07 1981-07-07 Detecting system for signal interruption

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10585381A JPS587958A (en) 1981-07-07 1981-07-07 Detecting system for signal interruption

Publications (2)

Publication Number Publication Date
JPS587958A true JPS587958A (en) 1983-01-17
JPS6310626B2 JPS6310626B2 (en) 1988-03-08

Family

ID=14418548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10585381A Granted JPS587958A (en) 1981-07-07 1981-07-07 Detecting system for signal interruption

Country Status (1)

Country Link
JP (1) JPS587958A (en)

Also Published As

Publication number Publication date
JPS6310626B2 (en) 1988-03-08

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