JPS5877259A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5877259A JPS5877259A JP56175668A JP17566881A JPS5877259A JP S5877259 A JPS5877259 A JP S5877259A JP 56175668 A JP56175668 A JP 56175668A JP 17566881 A JP17566881 A JP 17566881A JP S5877259 A JPS5877259 A JP S5877259A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electrode
- thickness
- wiring
- barrier metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 150000001875 compounds Chemical class 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 239000000463 material Substances 0.000 claims 2
- 239000000853 adhesive Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 33
- 230000004888 barrier function Effects 0.000 description 13
- 238000009792 diffusion process Methods 0.000 description 8
- 239000011230 binding agent Substances 0.000 description 7
- 239000000758 substrate Substances 0.000 description 6
- 238000000151 deposition Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000005253 cladding Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052735 hafnium Inorganic materials 0.000 description 2
- 239000007791 liquid phase Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
Landscapes
- Semiconductor Lasers (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は& GaAtA3/GaAS系、 InGaA
SP/InP系などのIII−V族化合物半導体装置の
゛−電極構造関する。[Detailed description of the invention] The present invention relates to &GaAtA3/GaAS system, InGaA
The present invention relates to an electrode structure of a III-V compound semiconductor device such as an SP/InP system.
従来、m−v族化合物半導体1例えば、G a A A
h a /G a A S系の半導体レーザにおいては
。Conventionally, m-v group compound semiconductor 1, for example, Ga AA
In the ha/G a A S type semiconductor laser.
基板構成元素と配線電極金属との相互拡散を防止するた
めに、MO,W、Hfなどの高融点金属からなるバリヤ
メタル層を設けていた。すなわち。In order to prevent mutual diffusion between the substrate constituent elements and the wiring electrode metal, a barrier metal layer made of a high melting point metal such as MO, W, or Hf has been provided. Namely.
第1図に示すように x14″−〇aA 8基板l上の
p+−GaAj +d 2に対する電極を形成する場合
、まず。As shown in FIG. 1, when forming an electrode for p+-GaAj +d 2 on x14''-〇aA 8 substrate 1, first.
オーミックコンタクトを得るために、T:tたはCrを
厚さ200〜700人被着してオーミック嵯極層3を形
成した。ついで、MO,W、Hfなどの高融点金属を約
2000.Hf着してバリヤメタルj−4を形成した。In order to obtain an ohmic contact, an ohmic electrode layer 3 was formed by depositing T:t or Cr to a thickness of 200 to 700 layers. Next, a high melting point metal such as MO, W, Hf, etc. is heated to about 2000. Barrier metal j-4 was formed by Hf deposition.
さらにsAuまたはAgを約I Am4を着して配線電
極層5を形成していた。Furthermore, the wiring electrode layer 5 was formed by depositing sAu or Ag in an amount of approximately I Am4.
上記のバリヤメタル層を導入した電極構造を採用するこ
とによシ、牛導体構成元素(例えばQa)が配線電極層
にまで外方拡散して電極1−が損なわれることや、配線
電極金属であるAuやAgが半導体中に拡散し、素子特
性が劣化するのを防止することができる。その結果、高
温・漏出力動作時の素子の信頼度が大幅に向上した。By adopting the electrode structure in which the above-mentioned barrier metal layer is introduced, it is possible that the constituent elements of the conductor (for example, Qa) diffuse outward to the wiring electrode layer and damage the electrode 1-, or that the wiring electrode metal It is possible to prevent Au and Ag from diffusing into the semiconductor and deteriorating device characteristics. As a result, the reliability of the device during high-temperature/leakage operation has been significantly improved.
しかし、上記の電極構造をもつ素子を歩留よく製造しよ
うとすると、再現性の点で以下に述べる問題があった。However, when attempting to manufacture a device having the above-mentioned electrode structure with a high yield, there was a problem in terms of reproducibility as described below.
バリヤメタルとなるMO,W。MO and W serve as barrier metals.
)(fなどの高融点金属の良質な薄膜形成が通常の金属
に比べて困難である。すなわち、蒸着に大きなパワーを
必要とするため、蒸着装置内の吸着ガスの放出が大きい
ため、蒸着時に高真空が維持できないことや、吸蔵ガス
の少ない蒸着源の入手がやや困難なためである。) (F) It is difficult to form a high-quality thin film of high-melting point metals, such as f, compared to ordinary metals.In other words, since a large amount of power is required for evaporation, a large amount of adsorbed gas is released in the evaporation equipment, so This is because a high vacuum cannot be maintained and it is somewhat difficult to obtain a deposition source with a small amount of occluded gas.
したがって、形成さルたバリヤメタル1−は酸素や窒素
の吸蔵が著るしい、低品位のものになりやすい。このた
め、配線電極層(Au、Agなど)のバリヤメタル1−
に対する密着性が悪く、配線電極層が剥離するという事
故が生じやすかった。Therefore, the barrier metal 1- thus formed tends to be of low quality, with significant oxygen and nitrogen occlusion. Therefore, the barrier metal 1- of the wiring electrode layer (Au, Ag, etc.)
The adhesion to the wiring electrode layer was poor, and accidents such as peeling of the wiring electrode layer were likely to occur.
本発明は、以上に述べた欠点を解消するためになされた
もので、バリヤメタル層と配線電極l―との間に、接着
性にすぐれる金属(例えばTi。The present invention has been made to eliminate the above-mentioned drawbacks, and uses a metal (for example, Ti) with excellent adhesive properties between the barrier metal layer and the wiring electrode l-.
Crなど)の薄膜1−(バインダ一層)を設けたことを
特長とする。It is characterized by providing a thin film 1- (single layer of binder) of Cr, etc.).
以下1本発明を実施例によ郵詳細に説明する。The present invention will be explained in detail below using examples.
実施例1
第2図は1本発明によるGaAtAS/GaAS系半纏
体レーザの断面構造図を示す。まず t1+−〇aA8
基板l上に” GaAtA3クラッド層6.n−GaA
tA3活性+m7.p−GaAtAsクラッド層8゜n
−GaAs表面層9を液相成長法により形成する。Embodiment 1 FIG. 2 shows a cross-sectional structural diagram of a GaAtAS/GaAS semi-integrated laser according to the present invention. First t1+-〇aA8
GaAtA3 cladding layer 6.n-GaA on substrate l
tA3 activity + m7. p-GaAtAs cladding layer 8゜n
- GaAs surface layer 9 is formed by liquid phase growth.
ついで、活性層7の一部分に、限定して電流を流すため
に幅約2μmの細長い開孔部をもつ拡散マスク10を表
面1149上に設けた後、 Znの選択拡散を行なって
po−拡散ノー11を形成する。Next, a diffusion mask 10 having an elongated opening with a width of approximately 2 μm is provided on the surface 1149 to allow a limited current to flow through a portion of the active layer 7, and then selective diffusion of Zn is performed to form a po-diffusion node. 11 is formed.
次に、p側オーミックコンタクト1−12となるTi(
またはCr)を厚さ200〜700人蒸着し、つ人魚、
バリヤメタル44としてMOを厚さ約2000人魚着し
た。さらに、配線電極・曽5の密層性を高めるために、
バインダ一層13としてTi(またはCr)を厚さ10
0〜500A蒸着し、最後に、配線電極層5となるAu
(またはAg)を厚さ約1μm蒸着してp側電極を形成
した。Next, Ti (
or Cr) to a thickness of 200 to 700, and
I used MO as the barrier metal 44 to a thickness of about 2,000 mermaids. Furthermore, in order to improve the dense layering of the wiring electrodes,
The binder layer 13 is made of Ti (or Cr) with a thickness of 10
0 to 500A is deposited, and finally, Au is deposited to form the wiring electrode layer 5.
(or Ag) to a thickness of about 1 μm to form a p-side electrode.
次にb n”−aaha基板の厚さを約100μmに調
整したのち、n側のオーミックコンタクト1−14.1
5としてh A”GJ N’を各々厚す約2000人、
1ooo人蒸着し、ついで、バリヤメタル114となる
MOを厚さ約2000人魚着した。さらに、バインダー
l−13として厚さ100〜500人のTi(またはC
r)を蒸着し、最後に、配線電極層5となるAu(また
はAg)を厚さ約1gn蒸着してn側電極を形成した。Next, after adjusting the thickness of the b n”-aaha substrate to approximately 100 μm, the n-side ohmic contact 1-14.1
Approximately 2,000 people, each with h A"GJ N' as 5,
100mm thick was deposited, and then MO, which would become barrier metal 114, was deposited to a thickness of about 2000mm. Furthermore, as binder l-13, a thickness of 100 to 500 Ti (or C) is added.
Finally, Au (or Ag), which will become the wiring electrode layer 5, is deposited to a thickness of about 1 gn to form an n-side electrode.
実施例2
第3図は1本発明によるInGaASP/IflP系の
長波長発光ダイオードの断面構造図である。まず。Embodiment 2 FIG. 3 is a cross-sectional structural diagram of an InGaASP/IflP-based long wavelength light emitting diode according to the present invention. first.
n”−tnp 基板21上に液相成長法によpn−In
Pクラッド層22 、1l−111GaASP活性層2
3.1) −InPクラッド/m 24 & n−I
nGaAsP表面層25を形成する。次に、約20μm
幅の細長い開孔部をもつ拡散マスク26を表面層25上
に形成する。ついでZnの選択拡散を行なってp′″−
拡散層27を形成する。pn-In is deposited on the n''-tnp substrate 21 by a liquid phase growth method.
P cladding layer 22, 1l-111GaASP active layer 2
3.1) -InP cladding/m24 & n-I
An nGaAsP surface layer 25 is formed. Next, about 20 μm
A diffusion mask 26 having an elongated opening is formed on the surface layer 25. Next, selective diffusion of Zn is performed to obtain p′″-
A diffusion layer 27 is formed.
次に、p側オーミックコンタクト、i!28となるAu
Znを厚さ約2000人魚着し、ついでバリヤメタルl
114となるWを厚さ約2000人魚着した。さらに、
配線電極層5の密着性を高めるために、バインダ一層1
3としてTi(またはcr>を厚さ100〜500人蒸
着し、最人魚配w*極1−5となるAu(またはAg)
を約1μm蒸着してp側電極を形成した。Next, the p-side ohmic contact, i! Au becomes 28
Apply Zn to a thickness of about 2000mm, then apply barrier metal.
I wore a mermaid with a W size of 114 and a thickness of about 2000. moreover,
In order to improve the adhesion of the wiring electrode layer 5, a binder layer 1 is added.
3, deposit Ti (or cr) to a thickness of 100 to 500, and then deposit Au (or Ag) with a maximum distribution w*pole of 1-5.
A p-side electrode was formed by depositing about 1 μm of the p-side electrode.
次に n′″−1l1P基板21の厚さを約20074
mに調整した後、n側オ、=ミックコンタクト層29と
してAu8nt−、バリヤメタル層4としてWを。Next, the thickness of the n'''-1l1P board 21 is approximately 20074 mm.
After adjusting to m, Au8nt- was used as the n-side O,=mic contact layer 29, and W was used as the barrier metal layer 4.
バインダー1−5としてTi(またはcr>を、配線′
成極/min 5としてAu(またはAg)を蒸着して
n1ll電極を形成した。Ti (or cr> as binder 1-5, wiring'
Au (or Ag) was deposited at a polarization rate of 5 to form an n1ll electrode.
以上説明したように、バリヤメタル層と配線電極ノーと
の間に、Ti、Crなどを用いて密着性にすぐれるバイ
ンダ一層を設けることによL配線電極層の密着性が大幅
に改善された。その結果。As explained above, the adhesion of the L wiring electrode layer was significantly improved by providing a binder layer with excellent adhesion using Ti, Cr, etc. between the barrier metal layer and the wiring electrode layer. the result.
膜剥離のトラブルが解消し、′に極形成工程の再現性が
大幅に向上した。また、ノ(リヤメタル1−として、適
度に酸化したMO,W、Hfなどを用いることができる
ので、すぐれた)(リヤ効果が得られ、素子の信頼度が
さらに向上した。The problem of film peeling was resolved, and the reproducibility of the electrode formation process was greatly improved. In addition, as the rear metal 1-, suitably oxidized MO, W, Hf, etc. can be used, an excellent rear effect is obtained, and the reliability of the device is further improved.
まfC,実施例では、配線電極+4(Au、Agなど)
を蒸着法で被着した場合を述べたが、メッキ法を用いて
厚膜電極(いわゆるP H8’4極)とすることも可能
である。さらに、オーミック電極層。In the example, wiring electrode +4 (Au, Ag, etc.)
Although the case has been described in which the electrode is deposited by vapor deposition, it is also possible to form a thick film electrode (so-called PH8' quadrupole) by using a plating method. Additionally, an ohmic electrode layer.
バリャメIル#、パインター1.配線′戒極層は。Ballame Ile #, Painter 1. The wiring is the precept layer.
蒸着法のみならず、スパッタリング法、イオンブレーテ
ィング法などによっても形成可能である。It can be formed not only by a vapor deposition method but also by a sputtering method, an ion blating method, etc.
第1図は従来の電極構造を示す断面図、第2図。
第3図は本発明の実施例の電極構造を示す断面図である
。
1・・・n”−QaAs基板、4・・・バリヤメタル1
−15・・・配線電極層、11・・・p”−zn拡散層
、12・・・p側−−25オーミックwL極層、13・
・・バインダ層。
代理人 弁理士 薄田利幸゛
¥JZ図
第 3 図
ζ
第1頁の続き
0発 明 者 小林正装
国分寺市東恋ケ窪1丁目280番
地株式会社日立製作所中央研究
所内
0発 明 者 千葉勝昭
国分寺市東恋ケ窪1丁目280番
地株式会社日立製作所中央研究
所内
0発 明 者 加藤弘
高崎市西横手町111番地株式会
社日立製作所高崎工場内
0発 明 者 小林正道
高崎市西横手町111番地株式会
社日立製作所高崎工場内FIG. 1 is a sectional view showing a conventional electrode structure, and FIG. 2 is a sectional view showing a conventional electrode structure. FIG. 3 is a sectional view showing an electrode structure according to an embodiment of the present invention. 1...n''-QAAs substrate, 4...Barrier metal 1
-15... Wiring electrode layer, 11... p''-zn diffusion layer, 12... p side--25 ohmic wL pole layer, 13...
...Binder layer. Agent Toshiyuki Usuda, Patent Attorney JZ Diagram No. 3 Diagram ζ Continuation of Page 1 0 Author: Kobayashi Masagi 1-280 Higashi Koigakubo, Kokubunji City Hitachi, Ltd. Central Research Laboratory 0 Author: Chiba Katsuaki 1-chome, Higashi Koigakubo, Kokubunji City Address: 280, Hitachi, Ltd., Central Research Laboratory. Author: Hirokato Kato, Hitachi, Ltd., Takasaki Factory, 111 Nishiyokote-cho, Takasaki City. Author: Masamichi Kobayashi, Hitachi, Ltd., Takasaki Factory, 111 Nishiyokote-cho, Takasaki City.
Claims (1)
属と半導体材料との相互拡散を防止する金属層、該金属
層上に接着用金属層、該接着用金属増土に′It4.配
線用金属層を形成して成る一極部を有する半導体装置。In a semiconductor device using a compound semiconductor as a base material, a metal layer for preventing interdiffusion between the electrode metal and the semiconductor material, an adhesive metal layer on the metal layer, and 'It4. A semiconductor device having a single pole portion formed by forming a metal layer for wiring.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56175668A JPS5877259A (en) | 1981-11-04 | 1981-11-04 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56175668A JPS5877259A (en) | 1981-11-04 | 1981-11-04 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5877259A true JPS5877259A (en) | 1983-05-10 |
Family
ID=16000133
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56175668A Pending JPS5877259A (en) | 1981-11-04 | 1981-11-04 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5877259A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60176232A (en) * | 1984-02-22 | 1985-09-10 | Sanyo Electric Co Ltd | Electrode forming process |
JPS60196937A (en) * | 1984-03-07 | 1985-10-05 | Sumitomo Electric Ind Ltd | Semiconductor element and manufacture thereof |
JPH0766391A (en) * | 1993-08-31 | 1995-03-10 | Nec Corp | Ohmic electrode |
JP2006100369A (en) * | 2004-09-28 | 2006-04-13 | Sharp Corp | Semiconductor laser device and its manufacturing method |
-
1981
- 1981-11-04 JP JP56175668A patent/JPS5877259A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60176232A (en) * | 1984-02-22 | 1985-09-10 | Sanyo Electric Co Ltd | Electrode forming process |
JPS60196937A (en) * | 1984-03-07 | 1985-10-05 | Sumitomo Electric Ind Ltd | Semiconductor element and manufacture thereof |
JPH0766391A (en) * | 1993-08-31 | 1995-03-10 | Nec Corp | Ohmic electrode |
JP2006100369A (en) * | 2004-09-28 | 2006-04-13 | Sharp Corp | Semiconductor laser device and its manufacturing method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0752724B2 (en) | Method for forming ohmic contacts in a semiconductor device | |
JPH07263375A (en) | Manufacturing method of ohmic contact for compound semiconductor | |
JPS5877259A (en) | Semiconductor device | |
JPH01302763A (en) | Semiconductor device having an ohmic contact portion and method for forming the ohmic contact portion | |
JPS59165473A (en) | semiconductor light emitting device | |
JP2000307190A (en) | Manufacture of surface emitting semiconductor laser | |
JP3307186B2 (en) | Jig for semiconductor surface treatment | |
US6795480B1 (en) | Semiconductor laser device | |
JP3128165B2 (en) | Method for forming electrode of compound semiconductor device | |
JPH05267708A (en) | Electrode structure for optical semiconductor device | |
JPS6144492A (en) | semiconductor equipment | |
JPS5831751B2 (en) | Manufacturing method of semiconductor laser | |
JPS61187364A (en) | ohmic electrode | |
JPS5882587A (en) | Manufacture of buried hetero structure semiconductor laser | |
JPS6142175A (en) | semiconductor light emitting device | |
JPH01259587A (en) | Semiconductor laser mounting method | |
JPS59165418A (en) | Manufacture of semiconductor light emitting element | |
JPS57115864A (en) | Compound semiconductor device | |
JPS63110751A (en) | Formation of solder pad | |
JPS59155979A (en) | Manufacture of semiconductor laser | |
JPS59107510A (en) | Compound semiconductor ohmic electrode formation method | |
JP2633434B2 (en) | Method of forming ohmic contact in semiconductor device | |
JPH0423821B2 (en) | ||
JPH0362987A (en) | Semiconductor laser and its manufacturing method | |
JPH02194587A (en) | Manufacture of semiconductor laser |