JPS5859386U - Phase sequential switching device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

Fig. 1 is a specific circuit configuration diagram of a phase sequential switching device showing an embodiment of the present invention, and Fig. 2 shows its operation during forward rotation.
FIG. 4 is a timing chart of gate signals during reverse rotation. 1 is an input/output control section, 2 is a memory circuit, 3 is an address control circuit, 4 is a forward rotation buffer, 5 is a reverse rotation buffer, 6 is a pull-up resistor, 7 is a NOT gate, and 8 is a gate amplifier circuit.

Claims (1)

[Scope of utility model registration request] A memory circuit that stores a signal group obtained by inverting the gate signal group supplied during normal rotation or reverse rotation, and an input circuit that automatically processes the read of the gate signal group stored in the memory circuit based on externally input signals. An output control section, a normal rotation buffer, an inversion buffer that sequentially outputs a gate signal group that is selected by the signal output from this control section and input only when selected, and a gate year group output from these buffers. A phase-sequence switching device comprising an inverting NOT gate and a gate amplification circuit that amplifies a group of gate signals led from the gate.