JPS5854714B2 - Network disconnection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a network disconnection method in a time division switch.

The time division switch is T-8-T, which is a combination of a time switch T that switches time slots and a space switch S that connects highways.

Structures such as S-T-8 and T-8-T-8 are known.

The time switch T has a path memory for writing and reading call information using the data written in the time switch control memory from the common control device and the output of the channel counter as addresses, respectively. It is common to place a time switch equipped with a path memory for random writing and sequential reading, with the data written to the channel counter as the write address and the output of the channel counter as the read address, on the output side of the time division switch. However, the following problem occurs when the call path is disconnected.

When a call path is disconnected due to the end of a call, etc., the address data written in the time switch control memory is erased. As a result, the address written in the pass memory during the call is deleted, so new call information cannot be stored. will no longer be written to that address G, and transmission of call information will be stopped.

However, since the read address from the channel counter is continuously supplied, reading from the path memory continues.

Therefore, the call information immediately before disconnection remains in the path memory and is read out repeatedly.

By repeatedly reading out the residual data in the path memory, when decoded by the decoding circuit, a DC output is generated at a level determined by the residual data.

If a signaling device, for example a conference trunk, which is disturbed by this DC output is connected, it is necessary to provide DC interrupting means.

A conference trunk in a time-division switch is a device in which the digital call signals input from multiple input terminals are converted into analog signals by a decoding circuit, mixed, and then distributed to the conference participants connected to the conference trunk. If a high-level DC signal due to residual data is input as described above, it will interfere with the conference call.

In addition, when connected to a digital trunk line, the residual data is continuously transmitted as is, so depending on the pattern of the residual data, for example, if the pattern is all "0", the clock may be changed at the other station. Reproduction may become impossible, and in the case of all "011", an erroneous operation will occur if it is assumed that there is a fault in the space switch.

Furthermore, when switching the connection of the communication path, there is a drawback that the residual data described above is superimposed on the signal to be newly transmitted, causing noise.

The present invention eliminates the above-mentioned conventional drawbacks, and aims to facilitate the removal of residual data in the path memory when the network is disconnected, and to prevent various disturbances.

Examples will be described in detail below.

FIG. 1 is a block diagram of essential parts of an example of a time division switch according to an embodiment of the present invention, in which MPXl to MPXm are multiplexers, ■HW1 to IHWm are input highways, and TS1□ to T
81m is a 1 hour switch, 5PAIfF1~SPMFm
is a path memory, TsM1-TSMm is a time switch control memory, SS is a space switch, G11-Gmn is a gate, H8M1-H8Mm is a highway control memory, G
HWa□~GHWam, GHWb1~GHWbm are intermediate highways, CTR is channel counter, PADG□~
PADGm is a variable transmission loss insertion and no call signal pattern generator, TS2. ~TS2m is a secondary time switch,
SPMEl ~ SPMBm are path memories, DMPX1
~DMPXm is a demultiplexer, 0HW1~OHWm
It's on the exit highway.

The above configuration is of the T-8-T type, and the primary time switch T
S1□ to T S1m are for sequential writing and random reading, and secondary time switches TS2□ to T82m are for random writing and sequential reading, and are of a paired control type.

For example, when transmitting call information in time slot ta of inbound highway I HWl to time slot tb of outbound highway 0HWrn, path memo IJ SPMF1 to S PMF m is sent by the output of channel counter CTR.
The call information of each time slot of the incoming highways IHW1 to IHWrn is written sequentially, and the address information ta is written by a common control device (not shown) to the address corresponding to the time slot ti of the time switch control memory TSM1. , time sweetener control memory TS
Address information tb is written to the address corresponding to time slot ti of Mm.

Therefore, the call information written in the 7 addresses of the path memory SPMF 1 is stored in the time switch control memory (TSM).
The signal is read from time slot til and sent to intermediate highway GHWa1.

That is, the call information in the time slot ta of the incoming highway I HW is the time slot t of the intermediate highway GHWa1.
It is input to the space switch SS at i.

1 Highway control memory H8M of space switch SS
Control information for gates G1□-Gmn is written in 1-H8Mm. For example, in time slot ti, control information 1m specifying gate 01m is written in highway control memo IJH8M14, and control information specifying gate Gm1. Information m1 is written respectively, and timethrone lti
At this point, the intermediate highway GHWa 1 on the entrance side and the intermediate highway GHWb on the exit side are connected via a gate G1m.

Variable transmission loss insertion and no call signal pattern generator PA
DG to PADGrn impart a predetermined transmission loss to call information and generate a no-call signal pattern when the network is disconnected, and the details will be described later.

In the secondary time switches TS2□ to T82m, the call information of the intermediate highways GHWb1 to GHWbm is sent to the path memo IJ SPMB1 according to the address information from the time switch control memo IJTSM1 to TSMm.
SPMBrn & This is to read the output of the channel counter CTR as address information.The call information of the time slot ti of the intermediate highway GHWbm is the time switch control memo! Address information tbl read out in time slot ti of JTSMm is accordingly written into path memory SPMBm, and read out when the output of channel counter CTR indicates time slot tb to output highway OHWm.

will be sent to.

Conventionally, when the network is disconnected, the address information ta and tb of the common control device ζ and time switch control memo') TSMI and TSMm are erased, so the path memory SP
No call information will be written to the address tb< of Mm, and the call information immediately before the network is disconnected will remain.

However, in the present invention, since a no-call signal pattern is generated and written from the variable transmission loss insertion and no-call signal pattern generator, what is read by the output of the channel counter CTR is not the residual data. This becomes a no-call signal pattern, and after writing, writing to that address is prohibited by the control signal, so erasing the address information ta, tb of the time switch control memories TSM, . . . TSMm is not necessarily necessary.

FIG. 2 is a block diagram of main parts of an embodiment of the present invention, and H
Win is an incoming highway corresponding to the intermediate highway in Figure 1, HWOut is an outgoing highway, and PAD and PG are variable transmission loss insertion and no-call signal pattern generators PADG.
a variable transmission loss insertion section and a no-call signal pattern generation section;
CTR is a channel counter, SPM is a path memory corresponding to path memories SPMB and ~SPMBrn in FIG. 1, and T
SM is time switch control memory TSM1 to TSMm
Time switch control memory corresponding to , DL is path memo I
JSPM write enable inhibit signal delay bit area,
WE is the write signal of the pass memo IJsPM, G is the gate, and C
TR is a channel counter, PM is a control memory, 5ELa
, 5ELb is an address selector, CC is a common control device, and according to the address from the common control device CC, attenuation control data or network disconnection information is written in the control memory PM corresponding to the time slot. In TSMζ, the write address to the path memory SPM is written as data.

Control memo! JPM, time switch control memory TSM and path memory SPM store the output of channel counter CTH at 7
Reading is performed as a address.

Address selectors 5ELa and 5ELb are used to switch between the write address from the aforementioned common control device CC and the read address from channel counter CTR.

FIG. 3 is a block diagram of an example of the variable transmission loss insertion and no-call signal pattern generation device PADG, in which ROM1.
ROM2 has, for example, -3 dB for call information.

This is a read-only memory for providing attenuation of -7 dB, and the selector SEL selects terminals +-0 to #3 according to data read from the control memory PM.

For example, if you select the red 3 terminal, the call information will be input to the path memory SPM without attenuation, and if you select the 41.2 terminal, the call information (generally PCM signal) from the incoming highway HW in will be input to the path memory SPM without attenuation. Information that has been attenuated by -3 dB is input from the read-only memory ROM1 to the path memory SPM.

Also, if you select the +O terminal, the no-call signal pattern generation section P
The no-call signal pattern from G is input to the pass memo IJsPM, and the control signal is input to the time switch control memory TSM.
is written to the delay bit area DL.

When disconnecting the network, the control memory PM is first rewritten from the common control unit CC. For example, if a call is being made in time slot t1 of the incoming highway HWin, 0 corresponds to that time slot ti. The disconnection information is written to the address l.

This disconnection information is read out at time slot Xi (variable transmission loss insertion and no call signal pattern generator P).
When applied to the selector SEL of ADG, it selects the 4I-0 terminal and outputs a control signal.

No-call signal pattern generation part PG by selecting 4I-0 terminal
The no-call signal pattern from the path memory SPM (this input write signal WE is sent to the gate G for each time slot)
Pass memo IJsPM via? The call information is written to the address of the pass memo IJsPM based on the address information G from the time sweetener control memo IJTSM, and when the no-call signal pattern is input as described above, the write signal is At the timing of WE, the address information is written to the path memory SPM in accordance with the address information read out from the time switch control memory TSM at the time slot ti.

Also, the control signal output by selecting the #00 terminal of the selector SEL is written to the delay bit area DL of the time switch control memory IJTSM, and the control signal is written to the delay bit area DL of the time switch control memory IJTSM.
In SM, reading goes through one cycle in one frame time, so in the next frame, the control signal must be read from the delay bit area DL. Therefore, the write signal WE in time slot ti is not added to the path memory SPM (and is not added to the path memory SPM in which the no-call signal pattern is written).
No further writing will be performed to the PM address.

After writing the above-mentioned no-call signal pattern into the path memory SPM, the network is disconnected.

Therefore, the no-call signal pattern is repeatedly read out from the pass memo IJsPM, and harmful high-level DC signals are no longer generated.

In the embodiment described above, the selector SEL of the variable transmission loss insertion section PAD is used to generate the no-call signal pattern generation section P.
Although the no-call signal pattern from G is added to the path memory SPM, the no-call signal pattern generator PG may be provided independently.

As explained above, in the present invention, when disconnecting the network, the no-call signal pattern from the no-call signal pattern generator PG is written to the path memory SPM, so the residual data becomes the no-call signal and is decoded. The possibility that the output becomes a DC high level signal is completely suppressed, and therefore the switching noise of the network is also reduced.

Also, to write the no-call signal pattern, a control signal is written in a part of the delay bit area DL of the time switch control memo IJTSM, and the control signal read out after one frame is used as a write enable prohibition signal. Therefore, writing to the path memo IJsPM will not be performed after the network is disconnected for one frame.

Such control is limited to the control order of the disconnection control circuit,
That is, the control memo from the common control device CC in the embodiment'
It is possible to achieve this by simply rewriting JPM.

[Brief Description of the Drawings] Fig. 1 is a block diagram of a time division switch according to an embodiment of the present invention, Fig. 2 is a block diagram of main parts of an embodiment of the present invention, and Fig. 3 is a block diagram of a time division switch according to an embodiment of the present invention. FIG. 2 is a block diagram of an example of a no-call signal pattern generation device. TS11 to T81m are primary time switches, SS is a space switch, TS2□ to TS2ml are secondary time switches,
PADG1 to PADGm are variable transmission loss insertion and no call signal pattern generators, SPMF1 to SPMFm, SP
M81~SPMBm, SPM is path memory, T8M1
~T S Mm, T S M is time switch control memory, CTR is channel counter, PM is control memory, P
G is a no-call signal pattern generation section, and DL is a delay bit area.

Claims (1)

[Claims] 1. In a time-division exchange equipped with a time switch on the output side having a path memory for writing and reading call information by random writing and sequential reading, a no-call signal pattern generation section is provided, and the writing address of the path memory is A bit area for delaying the path memory write enable signal is provided in a part of the time switch control memory that holds the path memory write enable signal, and when the network is disconnected, the no-call signal pattern from the no-call signal pattern generator is transferred to the path memory ( At the same time, a control signal is written in the delay bit area, and the written control signal in the delay bit area is read out after one frame time and becomes a write enable prohibition signal for the path memory. The network disconnection method is characterized in that a control is performed to prohibit writing of the no-call signal pattern to the write address.