JPS5853227A - Logical circuit - Google Patents

Abstract

PURPOSE:To obtain a logical circuit which has a high speed of operation and a small level of power consumption, by performing the switching after turning off two transisors connected in series in the on-off or off-on switching mode. CONSTITUTION:For the on-off threshold voltage of the 1st and 2nd phase splitting transistors TR12 and 13, the TR12 is set at a higher level of the TR13. When the signal of an input part 11 is set at a low level, the voltage of an output terminal 26 is set at a high level of output. When the signal of the part 11 is shifted to a high level, the TR13 is turned on and an output TR15 is turned off. Then the TR12 is turned on and an output TR14 is turned on respectively. Thus the output voltage is set at an earth potential. The output TRs are switched after they have been turned off even if the input is set at a low level. The speed of operation is accelerated, and the level of power consumption is lowered both in the transient and steady modes. This can decrease the current capacity of a power supply.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is based on a first 7A-split transistor and a second phase-split transistor! , 12
This invention relates to a logic circuit that turns two output transistors on and off.

A transistor-transistor logic circuit that has been improved to produce high output voltage levels is shown in FIG. In this circuit, a non-inverting gate (3) is connected between the negative phase output of the phase splitter (2) and the base of the transistor (1) to control on-off of the second transistor (1). There is. As can be seen from the inspection, the non-inverting gate (3) uses a large number of elements, which not only lowers the integration density when integrating the above circuit, but also reduces the phase splitter (2)'s negative phase. The time it takes for the output signal to propagate to the base of transistor (1) is long. This is because NPN transistors (4) and (5) turn on (off), and
This is because the transistor (1) can only be turned on (off) by turning off (on) the N-type transistor (7). This causes a time delay and slows down the operating speed of the logic circuit. This also means that the transistor (
8) is turned on, it also emits a sound that the NPN transistor (1) is on. A transient current flows through the transistors (1) and (8) that are on, resulting in an increase in current consumption.

These are unsavory matters.

The present invention was devised in order to solve the above-mentioned drawbacks of the conventional circuit, and its purpose is to use phase split transistors for in-phase and anti-phase, and to solve the problem when switching between on-off or off-on. The object of the present invention is to provide a logic circuit in which the above-mentioned drawbacks of the conventional circuit are solved as much as possible by causing the switching after turning off both of the two output transistors connected in series.

Hereinafter, one embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 2 shows an embodiment circuit of the present invention. This logic circuit (1
0), the control inputs of the first and second phase splitting transistors (12) and (13) are connected to the output of the input section (11)! 16 71-1 These transistors (12),
The configuration is such that first and second output transistors (14) and (15) connected in series are on-off controlled by each output of (13).

In the illustrated example, the input section (11) has a terminal (
Connect the cathodes of diodes (18) and (19) to 16) and (17), connect their anodes in common, connect this to the power supply (V c c) via the resistor (20), and perform the above control. It consists of 7 connected to the input.

The first phase splitting transistor (12) is
In the illustrated example, the N type transistor (12) has its base as a control input, the collector is connected to the power supply (Vcc) via the resistor (21), and the emitter is connected to the resistor (22).
It is connected to a reference potential, e.g., the ground level, through the terminal, and to the base of a first output l/synthesistor, e.g., an NPN transistor (14). Under this configuration, this transistor (12) is turned on. -Off/(L/Near short voltage idi Set higher than the on-off threshold voltage of the phase splitting transistor (13) of 2.

The second phase split transistor (13
) is an NPN transistor (13) in the illustrated example, the base of which is connected to the input section (11) through the resistor (23), the connection end of which is the control power, and the collector is connected to the power supply through the resistor (24). (VcC) and
It is connected to the base of said second output transistor, for example an NPN transistor (15), while its emitter is connected to a reference potential, for example ground potential, via a diode, for example a Schottky diode (25). Under this configuration, the on-off threshold voltage of transistor (13) is set to be significantly lower than the on-off threshold voltage of transistor (12), as described above.

The emitter of the first output transistor (14) is connected to a reference potential, for example earth potential, and its collector and the second
The emitter of the output transistor (15) is connected to the output terminal (2
6). Second output transistor (15
) is connected to the power supply (Vcc) via a resistor (27).

Next, the operation of the circuit of the present invention having the above configuration will be explained.

When the output signal of the input section (11) is at a low level, the first and second phase splitting transistors (12),
(13) is off, so the output transistor (14) of ml is off, and the output transistor (15) of @2 is off.
) is on. As a result, the voltage at the output terminal (26) is at a relatively high voltage that is lower than the voltage at the power supply ('Vcc) by the VBE of the transistor (15), and a high output voltage is obtained.

When the output signal level of the input section (11) is caused to transition from the state to the high voltage level, during the transition process, the output signal level of the input section (11) is changed to the second phase split voltage level where the output signal level is relatively low. When passing the on-threshold voltage of the transistor (13), the transistor (
13) is switched on and the second output transistor (1
5) switch off. Furthermore, when the output signal level of the input section (11) rises by a moment, the first 7A-split transistor (11) has a higher on-threshold voltage than the on-threshold voltage of the transistor (1-3).
12). In response, the first output transistor (14) is switched on and the output terminal (26
) to the 11-so reference potential, for example, ground potential.

In fact, even when the output signal level of the input section (11) changes from a high level to a low level, first the transistor (14) that is on is turned off, and the transistor (15) that is off is turned on. become,.

In this way, when the output signal level of the input section (11) transitions from a low level to a high level, and also when it transitions from a high level to a low level, the two output transistors (
14), (15) it: both f+Mt must be turned off prior to their switching on or off. Therefore, no large transient current flows through the double transistors (1.4) and (15). This means that the power consumption of the logic circuit is small during transient periods. Also,
The fact that excessive current does not flow also means that the power supply capacity can be reduced and the operation of other integrated circuits will not be adversely affected.

In addition, the number of elements from the output of the input section (11) to the second output transistor (15) t is small, and therefore, the signal propagation delay from the output to the base of the transistor (15) is small, so the operation speed is high. Become. Furthermore, the smaller the number of elements, the smaller the tW power consumption, which is useful for increasing the integration density of integrated circuits.

As is clear from the above description, the following effects can be obtained according to the present invention.

(2) Power consumption and signal propagation delay can be reduced by reducing the number of elements. Therefore, the integration density in the integrated circuit can be increased to increase the operating speed.

■ After turning off both output transistors,
Since only one transistor is turned on, no transient current flows through both transistors, and power consumption is small both during transient and steady states.

■ It is possible to reduce the current capacity of the power supply and prevent adverse effects on other circuits. .

[Brief explanation of the drawing]

FIG. 1 is a conventional logic circuit diagram, and FIG. 2 is a logic circuit diagram of the present invention. In the figure, (11) is the input section, (12) is the first 7A-split transistor, (13) is the second phase split transistor, (14) is the first output transistor, and (15) is the second This is the output transistor of Figure 1 CC

Claims (1)

[Claims] an input section that receives an input signal; first and second phase splitting transistors that are turned on and off in response to the output of the input section; and responsive to the in-phase output of the first 7-Aze splitting transistor; a first output transistor that is controlled on and off; and a second output transistor that is connected to the output together with the first output transistor and that is controlled on and off in response to the negative phase output of the second phase splitting transistor. an output transistor, configured such that the on-off threshold voltage of the first phase-splitting transistor is higher than the on-off threshold voltage of the second phase-splitting transistor. A logic circuit characterized by ~.