JPS5851719B2 - Television receiver color signal circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a color signal circuit for a television receiver.

The conventional color signal circuit, as shown in Figure 1, generates a composite color signal (
A band transformer 1 that covers a band (including burst signals), a first band pass amplifier 2 connected to the band transformer 1, a second band pass amplifier 3 that follows, and a saturation adjuster 4 that includes a gain adjustment volume. , R-Y demodulator 5 and B-Y to which the composite color signal is applied through 1.2 and 3.4.
A demodulator 6, a G-Y reproducing circuit 7 that generates a G-Y signal from the outputs of the above-mentioned 5 and 6, a carrier oscillator 8 that generates a 3.58 MHz carrier, and a hue adjustment volume 1.
0, and the carrier oscillator 8.
A main circuit consists of a line 11 that directly leads the output from the carrier oscillator 8 to the B-Y demodulator 6, and a line 13 that shifts the output of the carrier oscillator 8 by 900 degrees using a 900 phase shifter 12 and leads it to the R-Y demodulator 5. On the other hand, a burst gate circuit 14 gates the output of the first band-pass amplifier 2 with a burst gate pulse, a detector 15 detects the burst signal, and a line 16 that guides the detected output as a bias control signal for the first band-pass amplifier 2. Automatic saturation control (hereinafter referred to as “A”) consisting of
In addition, a color killer circuit 17 is added that uses the signal on the line 16 to control activation/deactivation of the second bandpass amplifier 3 depending on the presence or absence of a burst signal, and furthermore, a color killer circuit 17 is added that uses the signal on the line 16 to control activation/deactivation of the second bandpass amplifier 3, and furthermore, the hue is automatically adjusted. 90° for precise control
A phase detector 19 compares the phase of the output given from the carrier oscillator 8 via the phase shifter 18 with the burst signal from the burst gate circuit 14, and the detected output is amplified as a control signal for the voltage-controlled carrier oscillator 8. automatic hue control (hereinafter referred to as "APC") consisting of a closed loop of an amplifier 20 that
Since the circuit shown in FIG. 1 is well known, a detailed explanation of its operation will be omitted.
In FIG. 1, the output of the carrier oscillator 8 is given to the burst signal detector 15.
It should be added that this is because is a synchronous detector.

As mentioned above, in the conventional color signal circuit, first, the output of the first bandpass amplifier 2 is burst gated with 14, the phase of the gated burst signal is detected using the output of the carrier oscillator 8, and this output is converted into a voltage. Controlled carrier oscillator 8
However, this method is completely defenseless against phase drift in the hue adjuster 9, demodulators 5 and 6, second bandpass amplifier 3, and saturation adjuster 4, and the APC method is It could not be said that the strengths of the system were fully utilized.

In order to eliminate the effects of each of the above-mentioned drifts, conventionally various measures have been taken to suppress the phase drift of individual circuits as much as possible. 6 etc. is not included, it is natural that a phase correction circuit 21 is required to match the phases of the carrier and color signals.

As described above, the conventional circuit requires unnecessary adjustment points, and does not fully exhibit the characteristic of the APC system, which has little temperature drift.

Similarly, regarding saturation (color saturation), in the conventional circuit, the second
Since the bandpass amplifier 3, saturation adjuster 4, and demodulators 5 and 6 are not included in the ACC loop, naturally the gain drift of the above circuits is not automatically corrected, and the drift of each of these circuits is caused by changes in saturation. It appears.

The present invention proposes a color signal circuit that eliminates the above-mentioned drawbacks.

The color signal circuit of the present invention will be explained below according to the embodiment shown in the drawings.

In FIG. 2, for convenience of explanation, the same symbols are attached to the same parts as in FIG. This is a T flip-flop that generates an inverted output (see Figure 3, Figure 3) at the Q terminal, Q terminal.

Reference numerals 23 and 24 designate first and second AND circuits in which the Q output and Q output of the T flip-flop 22 are one of the AND inputs, and the burst gate pulse is the other input; 3 Figure 2.

As shown in E, pulses are generated at a rate of one every two horizontal periods, and when one outputs a pulse, the other does not output a pulse.

The output of the first AND circuit 23 is connected to the R-Y demodulator 5 and the first
The signal is applied to the sample and hold circuit 25.

As a result, the R-Y demodulator 5 is cut off only during the pulse period shown in FIG.
5 is turned on only during this pulse period.

Similarly, the output of the second AND circuit 24 is supplied to the B-Y demodulator 6 and the second sample-and-hold circuit 26, and cuts off the B-Y demodulator 6 only during the pulse period shown in the third diagram.
The second sample and hold circuit 26 is turned on.

The outputs of the R-Y demodulator 5 and the B-Y demodulator 6 during the burst period are both sent to the first and second sample-and-hold circuits 2.
5.26 given to both sides.

Note that the outputs of the demodulators 5 and 6 during the scanning period are also applied to the first and second sample-and-hold circuits 25 and 26;
．． 26 is off, the demodulator output during this period,
That is, the color signal [see Figure 3].

The shaded portion] is not accepted by the eleventh and second sample-and-hold circuits 25 and 26.

When the R-Y demodulator 5 is turned off only during a burst period at regular intervals by the pulse shown in FIG.
As <RY demodulation axis (therefore, the phase of R-Y carrier)
It produces an output according to the phase difference between the burst signal and the burst signal.

That is, as shown in FIG. 4, the R-Y demodulation axis 27 and the burst signal 28 should originally have a phase difference of 90 degrees, but due to phase shifts caused by the carrier oscillator 8, phase drift in each circuit, etc. , 90' collapses, the level fluctuation occurs from the RY demodulator 5 in accordance with the shift.

For example, when the phase difference is 900, no burst signal component is obtained on the R-Y demodulation axis, so the reference level E
1 itself, but when it becomes larger than 900, a negative output pulse occurs as shown at 29 in FIG. 3, and when it becomes smaller than 900, a positive output pulse occurs.

Therefore, it will be understood that the APC can be controlled by using this output.

When the output is used as a control signal, the second sample-and-hold circuit 26 converts the output of the B-Y demodulator 6 in the corresponding period (i.e., the reference Lemel E2 of the B-Y demodulator) into the APC control signal. It is configured to be used as a reference signal.

Next, the state of the B-Y demodulator 6 during the burst period is at the reference level E2 in the part where the B-Y demodulator 6 is cut off by the pulse shown in FIG. A negative pulse 30 is generated.

This pulse output is applied to the first sample and hold circuit 25 and used as an ACC control signal.

At that time, the reference level output E1 of the R-Y demodulator 5 is
Used as a reference signal for control signals.

Incidentally, the eleventh second sample/hold circuit 25.26
Needless to say, outputs a smoothed control signal.

The output of the second sample-and-hold circuit 26 is applied to a voltage-controlled carrier oscillator 8 to control the phase of the carrier.

Similarly, the output of the first sample and hold circuit 25 is applied to the first bandpass amplifier 2 and serves to control its bias.

At the same time, the output of the first sample and hold circuit 25 is also applied to the color killer circuit 17.

In FIG. 2, the burst gate pulse is set to saturation adjuster 4.
is added to the hue adjuster 9, but as mentioned above, this is R-
Since the outputs of the Y demodulator 5 and the B-Y demodulator 6 are used, the respective circuits are designed to prevent the levels manually set in 4 and 9 from affecting phase and saturation variation detection. This is to temporarily release the set level of 4°9 only during the burst period.

Such an adjuster will be explained with reference to FIG. 6, which specifically shows the hue adjuster 9.

In FIG. 6, the voltage-controlled carrier oscillator 8 of FIG.
Carriers A and A' (with a phase difference of 90' from each other) are added to the base of transistors Q34 + Q35, but if transistor Q40 is saturated, Qae
t Q37Q38 t No matter what state the base potential of Q39 is, Q41 t Q4□t Q43 y
Since the resistor R359R36 is set so that the base potential of Q44 is sufficiently lower than the base potential of Qae to Q39 and Q,1 to Q44 are cut off, the carriers A and A' are transferred to the emitter follower via Qaa to Qso. It is combined and added to the base of Q4H and output to the output terminal 38.

Since the signal in this case is influenced by the volume 10, the hue can be arbitrarily adjusted by the volume 10, and the output set by the volume 10 will appear at the terminal 38.

However, when transistor Q40 is cut off, the base potential of Q41 to Q44 becomes higher than the base potential of Q36 to Q39 by FBI, so Qsa to
Qso is the cutoff and A and A' are Q41 to Q4
4 to the base of Q45 and output to the output terminal 38.

Therefore, in this case, the phase of the output signal is exclusively Q4 t~
It is determined only by the division ratio of Q44 and is not affected by the volume 10.

In other words, the output signal is obtained by canceling the state adjusted and set by the volume 10.

As shown in the figure, a negative voltage is applied to the base of the transistor Q40 during the burst gate time t1, and a negative voltage is applied to the base of the transistor Q40 during the other period t2.
Since it is designed to apply a positive voltage, it is not affected by the volume 10 when obtaining the automatic hue control signal using the outputs of the R-y demodulator 5 and the B-Y demodulator 6 during the burst gate period. The carrier oscillator 8 can be controlled as desired.

On the other hand, since the setting state of the volume 10 is activated during the scanning period, the hue can be automatically adjusted from the volume 10.

The output of the output terminal 38 is applied to the terminal 36 in FIG.
The terminal 37f in the figure is supplied.

Although FIG. 6 shows only hue adjustment, a similar configuration can be used for manual saturation adjustment a4t.

FIG. 5 shows the demodulators 5 and 6 in FIG. 2 and the first and second samples.
A specific example is shown in which the hold circuits 25 and 26 are configured with ICs, and here, a constant current source transistor Q3,
Railway line 11. differential pair transistors Q4, Q'r to which chrominance signals are differentially applied from h;
Transistor Qs = Q9 and Qlo, whose emitters are commonly connected to the collector of Q7.

It is configured in a double-balanced type centering around Qll and the Q8.
For the BY demodulator 6 in which the BY carrier CW1 is applied to the base of Q11 and the demodulated output, that is, the BY signal, -(BY) signal is obtained at both ends of the load resistor R131R14, the Q4, Switching transistors Q5 and Qa are inserted in parallel between the collector and emitter of Q7, and Q5. A pulse signal shown in the third diagram is applied from the line 13 to the base of Q6, and during the pulse signal period Q5, Qe
Q4. becomes fully conductive. By passing Q7 through the cut-off and Q5-Q6 being off during the rest of the period, Q4. I am trying to turn on Q7.

When Q4 and Q7 are operating without being cut off, normal demodulation operation is performed, and the color signal shown by the diagonal line l in Figure 3G is generated during the scanning period, and during the burst period, the color signal is
A negative pulse such as 0 is generated depending on the gain of the burst signal.

Conversely, when Q4-Q7 is cut off by Q5-Qa, a constant current flows through the collector-emitter of Q5-Qe, so the detection output generated at both ends of Itia e R14 has a constant level potential [see E2 in Figure 3].
becomes.

Next, the same goes for the R-Y demodulator 5, and the chrominance signal is differentially applied from the constant current source transistor Q1□ and the line 11.12.
Qla, and a transistor Q1□ whose emitter is commonly connected to the collector of Q13>Qla.

It is configured in a double balanced type with Q18p Q19 p Q20 as the center, and R-Y on the base of Q17 t Q20.
Carrier CW2 [CWl shifted by 90°] is applied to R-Y which generates demodulated outputs, that is, R-Y signal and -(R-Y) signal, at both ends of load resistors R19 and R1, R1, respectively. For the demodulator quantity, switching transistors Q14 * Q15 are inserted in parallel between the collector and emitter of each of the Qts e Qta, and this Q14
The pulse signal shown in FIG. 3 2 is applied from the line I4 to the base of Q15 to control the on/off state of Q13 s Qla.

As a result, a signal as shown in FIG. 3 is generated on the output side of the R-Y demodulator quantity in the same manner as explained in connection with FIG.

In addition, since the demodulator 5.6 in FIG. 5 is configured as a double balanced type, if the signal shown in FIG. 3 is obtained at both ends of the load resistor R1 of the R-Y demodulator 5, R14 , R1, a signal that is 180° different from that shown in FIG. 3 is generated, and similarly, the signal shown in FIG. Signals with 1800 different phases can be obtained.

The signals obtained at both ends of the load resistors R13t and R19 are respectively led out from the emitter side of the next stage Q21 and Q23 to the output terminals 3L32I and t via the emitter followers Q2 and Q24. Applied to both second sample and hold circuits 25,26.

On the other hand, the -(B-Y) signal generated at both ends of the resistor R14 and the -(RY) signal generated at both ends of R141R15 are appropriately added to generate a G-Y signal.

This G-Y signal is led out from the emitter side of the transistor Q25 in the next stage to the output terminal 33, and is connected to the 4° first sample-and-hold circuit-E5. is constant current source transistor Q26
The external components connected to differential pair transistors Q2□, Q28 and terminal 34 are mainly composed of one capacitor 0, and the constant current source transistor Q26 is supplied with a pulse 2 from the line 14, so that only the pulse period is It is designed to be activated.

At this time, the output 30 from the B-Y demodulator applied to the base of the differential pair transistor Q27 is at a constant potential based on the reference level output from the R-Y demodulator applied to the base of the other differential pair transistor Q28. The emitter potential of Q24 acts to produce an output across the load resistor R26 with a magnitude and direction corresponding to the difference therebetween.
A pulse-like signal generated across the resistor R26 is connected to an external capacitor C1 via a transistor Q29 and a terminal 34.
It is smoothed by D.

The voltage signal smoothed by this capacitor C1 is given to the first bandpass amplifier 2 and color killer circuit 17 as shown in FIG. The collector of the transistor Q29 can be directly connected to 2°17.

The second sample-and-hold circuit U is configured in the same way, and a pulse signal is applied from the base line 13 of the constant current source transistor Qso to turn on Q30 only during the pulse period, and turn off the rest of the time. shall be.

Also, R-Y is connected to the base of one Q3□ of the differential pair transistor.
The output of the demodulator is led to the base of Q31, and the output of the B-Y demodulator is led to the base of Q31, and the APC control signal is passed from the load resistor R31 to the transistor Q33, and the external terminal 35 is connected to the capacitor C2. It is designed to be smoothed with .

As explained above, the color signal circuit of the present invention includes the R-Y demodulator 5.
and the predetermined burst period output of the B-Y demodulator 6 as A
It is designed to be used as a control signal for CC and APC. In other words, since the demodulators 5 and 6 are included in each of the ACC and APC circuits, all of the conventional drawbacks mentioned in the introduction are eliminated. It has the effect of being canceled.

Moreover, in the present invention, the demodulator is periodically set to operate during the burst period and to not operate, and the output of the demodulator that is not activated is set as a reference in each of the APC and ACC sample and hold circuits. Since the outputs are compared and the difference is used as a control signal, it is possible to generate an accurate control signal.

Further, according to the present invention, even if manual hue adjusters and saturation adjusters are provided, the states set by these adjusters are used as the basis for the signal detection period for creating control signals for the ACC and APC. Since some of them are strained to release the signal, there is an effect that the desired ACC and APC operations can be realized.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram showing the configuration of a conventional color signal circuit. FIG. 2 is a block circuit diagram of a color signal circuit embodying the present invention, FIG. 3 is a signal waveform diagram for explaining the same, and FIG. 4 is a vector diagram of the same. 5 and 6 are circuit diagrams specifically showing the main parts of FIG. 2. FIG. 2...First bandpass amplifier, 4...
Saturation adjuster, 5...RY demodulator (first color demodulator), 6...B-Y demodulator (second color demodulator),
8...Carrier oscillator, 9...Hue adjuster, 22...T flip-flop, 23,2
4...AND circuit, 25...1st sample/hold circuit, 26...2nd sample/hold circuit
hold circuit.

Claims (1)

[Claims] 1 The R-Y demodulator operates during the burst period, and the B-Y
A first state in which the demodulator is inactive and outputs an output signal where the B-Y signal is at zero level, and a first state where the R-Y demodulator is inactive during the burst period and outputs an output signal in which the R-Y signal is at zero level. output and the second state in which the B-Y demodulator operates are alternately switched every horizontal period or multiple horizontal periods, and the first sample-hold circuit is configured to switch the second state in which the R-Y demodulator operates. The burst period output of the B-Y demodulator in the second state is compared with the burst period output in the second state as a reference, and a signal corresponding to the difference is applied to the bandpass amplifier as an automatic control signal for saturation adjustment. , the burst period output of the R-Y demodulator in the first state is compared with the burst period output of the B-Y demodulator in the first state in the second sample-hold circuit, and the difference is determined according to the difference. The signal is applied to the carrier oscillator as an automatic control signal for subcarrier phase adjustment, and a regulator that manually adjusts the signal controlled by the automatic control signal releases the manually set state for a burst period. A color signal circuit for a television receiver, characterized in that: