JPS5844842U - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPS5844842U JPS5844842U JP13997981U JP13997981U JPS5844842U JP S5844842 U JPS5844842 U JP S5844842U JP 13997981 U JP13997981 U JP 13997981U JP 13997981 U JP13997981 U JP 13997981U JP S5844842 U JPS5844842 U JP S5844842U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor equipment
- mount portion
- abstract
- lead frame
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 5
- 238000005219 brazing Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図a、 bはそれぞれ従来の半導体装置を示す部
分断面図、第2図は本考案の一実施例を示す部分断面図
である。
1・・・・・・リードフレーム、2・・・・・・ろう材
、3−−−−−−半導体チップ、4・・・・・・スルー
ホール。1A and 1B are partial sectional views showing a conventional semiconductor device, respectively, and FIG. 2 is a partial sectional view showing an embodiment of the present invention. 1...Lead frame, 2...Brazing material, 3---Semiconductor chip, 4...Through hole.
Claims (1)
介して接着固定された半導体装置において、上記マウン
ト部にスルーホールが形成されていることを特徴とする
半導体装置。1. A semiconductor device in which a semiconductor chip is adhesively fixed to a mount portion of a lead frame via a brazing material, characterized in that a through hole is formed in the mount portion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13997981U JPS5844842U (en) | 1981-09-21 | 1981-09-21 | semiconductor equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13997981U JPS5844842U (en) | 1981-09-21 | 1981-09-21 | semiconductor equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5844842U true JPS5844842U (en) | 1983-03-25 |
Family
ID=29933154
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13997981U Pending JPS5844842U (en) | 1981-09-21 | 1981-09-21 | semiconductor equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5844842U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6413903U (en) * | 1987-07-17 | 1989-01-24 |
-
1981
- 1981-09-21 JP JP13997981U patent/JPS5844842U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6413903U (en) * | 1987-07-17 | 1989-01-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5844842U (en) | semiconductor equipment | |
JPS6117751U (en) | Tape carrier semiconductor device | |
JPS59145047U (en) | semiconductor equipment | |
JPS60181051U (en) | Structure of lead frame | |
JPS6094834U (en) | semiconductor equipment | |
JPS5844843U (en) | semiconductor equipment | |
JPS583038U (en) | lead frame | |
JPS6142855U (en) | semiconductor equipment | |
JPS58120661U (en) | semiconductor equipment | |
JPS6094835U (en) | semiconductor equipment | |
JPS5822740U (en) | semiconductor equipment | |
JPS6113399U (en) | semiconductor equipment | |
JPS59107157U (en) | GaAs semiconductor device | |
JPS60101755U (en) | semiconductor equipment | |
JPS5872844U (en) | LSI package | |
JPS5851448U (en) | Power transistor mounting structure | |
JPS587350U (en) | Cooling structure for lead type semiconductor devices | |
JPS587354U (en) | semiconductor equipment | |
JPS60181048U (en) | Lead frame for semiconductor devices | |
JPS5874395U (en) | taping parts | |
JPS6061740U (en) | Hybrid integrated circuit device | |
JPS5991741U (en) | Semiconductor element mounting equipment | |
JPS6035547U (en) | lead frame | |
JPS6068656U (en) | Semiconductor device with heat sink | |
JPS59138241U (en) | semiconductor equipment |