JPS5844552A - Equivalently decentralized information process system - Google Patents

Abstract

PURPOSE:To prevent an evil effect of a faulty state from inflicting to other information processors, by providing a time monitor means and a storage device which stores a monopolized using state of a shared storage device of the information processors in correspondence to each information processor. CONSTITUTION:An information processor 2 has an infinite loop owing to a programming error, etc. while a message writing or reading instruction is carried out to a shared storage device. In such case, the timer value of a time monitor device 4 is set at 0 before a cancel signal arrives. Then an interruption signal produced on the basis of the excessive monitor time is fed to an interruption control circuit 29. The circuit 29 compares the level of the interruption signal with the working level and sets the designated address and the designated value at a program counter 22 and a state register 28 when the level of the interruption signal is higher than the working level to then check whether the location within a data storing region is 0 or not. If the location is not 0, the contents are forcibly set at 0. Then the fact that the relevant information processor has a fault is informed to other information processors, and the working of the relevant processor is discontinued.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing system in which a plurality of information processing devices exchange messages using a shared storage device jt as a medium, and in particular, when one information processing device is in the middle of message communication, The present invention relates to an information escape system that prevents adverse effects on remaining information processing devices when the system enters a runaway state or a stopped state.

FIG. 1 shows one configuration example of an information processing system.

In this figure, 2A, 2B, and 2C are customer information processing devices;
is a shared storage device used as a medium for message communication between the information processing devices 12A, 2B, and 2C; and 3 is an interrupt signal sending bus for sending an interrupt signal from one information processing device to another. It is.

FIG. 2 shows the internal structure of each of the information processing devices 2A, 2B, and 2C.

In the subordinate storage device 21, an instruction sequence that instructs the data processing procedure of the information processing device 2 is stored at an instruction sequence address 21A, and data used during data processing is secured in a data storage area 218. . A log counter (PC) 22 indicates the address of the instruction sequence currently being executed, and an address register (AR) 23 indicates the address of data to be read or written.

The arithmetic control unit 24 takes in the Atomy command indicated by the program counter 22 via the signal 51t, and, if necessary, sends the address to the address register 23 via the signal line 52 and the selector 25, and then selects the location indicated by it. Data is taken in through the signal line 53 to perform one step of data processing.

Thereafter, the address of the next instruction to be executed is set in the program counter 22 via the signal line 54 and the selector 26. Data processing is accomplished by repeating the above instruction execution cycle.

The following are the main types of instructions supplied to the arithmetic control unit 24 via the signal -51.

a) Transfer command CMOVE) Specified location of subordinate storage device 21 and shared storage device l
The data is transferred from the designated location of the shared memory vcIIil to the designated location of the subordinate storage device 21(2) via the signal #50.

Q) Update command (INC, DEC) Updates (INC) '4t-glass 1 in the specified location of the dependent storage device 21. Or update minus 1 (D
EC).

6) Zero check jump command (BCZ, BCNZ) Checks whether the contents of the specified location in the dependent storage device 21 is zero, and if it is zero, sets the specified address in the log counter 22 via the signal a53f (BCZ); Or, conversely, when it is not zero, it is similarly set in the program counter 22. (BCNZ).

(4) Check update command (CAB) 'Check whether the contents of the specified location /' of the shared storage device l are equal to the first specified value, and if they are equal, set the second specified value to this specified location. do.

If not, it is set in the program counter 22 via the designated address t-signal edge 54.

(5) Operation status change command (LDP8W) 'Signal the specified value! #A55: Set in status register 28 via selector 27. Also, set another specified value to the signal line 54.
is set in the program counter 22 via.

The operating state of the information processing device 2 is expressed in a state register 28. There is a field in the status register 28 that indicates the operating level of the information processing device 2.The contents of this field are transmitted to the interrupt control circuit 2 via the signal $56t.
Supplied to 9.

The interrupt control circuit 29 monitors interrupt signals generated inside and outside the information processing device 2. The 0 interrupt signal is sent to the 1r line 57.
are supplied from the arithmetic controller 24 and the storage device 21 in the processing device, or via the interrupt signal sending bus 3,
It is supplied from another information processing device via the signal line 58. The interrupt control circuit 29 is connected to the signal line 58 or the signal line 5.
When an interrupt signal is supplied from 7, ・First, latch the signal. Next, the interrupt level predetermined based on the type of the interrupt signal is compared with the operating level of the information processing device sent via the signal line 56. As a result of the comparison, the interrupt level is higher. When there is no interrupt signal, execute the interrupt processing based on the interrupt signal, and when the interrupt level is higher, execute the interrupt processing based on the interrupt signal at the boundary of the instruction execution cycle. . That is, first turn off the latch information', then turn off the latch information'
The contents of the program 2/22 are saved to a specific location in the subordinate storage device via the signal line 59. Note that the interrupt control circuit 29 sends the save address as a signal! 63t- is set in the address register 23 via the address register 23. Also, the contents of the status register 28 are transmitted to the slave storage device 2 via a signal line 60.
1. Evacuate to another specific location.

Next, address t-signal line 61 based on the interrupt level.
It is set in the program counter 22 via the selector 26. Further, a value based on the interrupt level is set in the status register 28 via the signal -62 and the selector 27. This completes the execution of the interrupt process, and the normal instruction execution cycle resumes.

FIG. 3 shows the internal structure of a shared storage device l used as a medium for message communication.

In the figure, a shared data storage area 11 is an area for storing data shared among a plurality of information processing devices.

signal -50 from lit salt processing equipment 2AB, 2C)
Control signals and the like are sent to the storage side #612 via people (50B, 50C). The following types of control signals are considered.

(1) d output request tiaEAn) (2) Write request (WRITE) (3) Ill request (RESERVE) (4) Exclusive release (FREE) The storage controller 12 receives signals from multiple information processing devices to the dam 27. Since there is a possibility that a message will be sent, a mechanism is provided to adjust the contention. That is, when control number 1g is sent from multiple information processing devices at the same time, a predetermined selector is selected from one information processing device (2A).
I'll leave it as that. ). In other words, requests from other information processing devices are not immediately accepted.

Then, in response to a request from the selected information processing device 1112A, processing is executed as follows.

α) Send a continuous print command to the shared data storage area 11 via the signal line 1311 along with the location designation information sent through the signal line 501A at the time of a continuous print request. The shared data storage area 11 transmits the contents of the specified location by a signal 11114t-
The data is sent to the storage controller i2 via the storage controller i2. The storage controller 12 sends the information on the signal line 14 to the two information processing devices via the signal line 502A'. In other words, the information processing device [2
In response to the continuation request from A, the storage controller 12 sends the contents of the designated location to the two information processing devices.

(2) At the time of a write request, the information sent from the two information processing devices is set in the designated location using the same procedure as the start request.

0) After the request for exclusive use, never miss a request from an information processing device other than the information processing device that requested exclusive use.

(4) When requesting exclusive release Release exclusive status.

Of these, % (1) and (2) are mechanisms that are also included in general storage devices. This allows the arithmetic control unit 24 to correctly execute the process corresponding to the transfer command.

(3) and (4) are essential functions for correct execution of the arithmetic control $24 of the process diagram m2 corresponding to the inspection update command CA8.

When the arithmetic control unit 24 executes processing in response to a test update command, it operates in the following order. Ma,zu, moromi Mtake signal 1
'Issue LE8ERVE and send it to shared storage device 1. Then, after establishing the exclusive right of the shared storage device [11], the content of the specified location/is checked to see if it is equal to the target;
If they are equal, the designated setting button is set in the designated location 7 above.0 If they are not equal, the designated address is set in the program counter 22 via the signal -541. Finally, by issuing the exclusive release signal FREE, the exclusive use IIi of the shared storage device i1 is released. By operating in the above order, the process corresponding to the test update command can be executed correctly. By using this calibration update command, the fixed partial area of the shared data storage area 1lLD#l can be given exclusive mt to only one information processing device.

This is achieved, for example, as follows. First, one location (hereinafter referred to as a lock location) is assigned in correspondence to a specific partial area within the shared data storage area.

This lock location may be the first location of the eel in the specific partial area. Then, the information processing device t (2A) attempts to exclusively access this specific partial area.

) accesses the partial area according to the procedure shown in FIG.

First, an attempt is made to set a setting button (generally a value other than 0, which may be a value that does not specify the own information processing device d2A) in the lock location using the inspection update command C and AS in step 71. . When the content of the lock location is equal to the calibration button (in this case 0), the setting button can be set to the lock location. This is nothing but securing the vvm of the specific partial area. The problem is that another information processing device B 111 (referred to as 2B) attempts to exclusively access a specific partial area, resulting in a loss of $4.
Even if an attempt is made to execute the procedure shown in the figure, the contents of the lock location are other than 0, so the instruction at step 71 cannot be passed through.

Now, after the two information processing devices have passed the command in step 71, they access a specific partial area exclusively in the command group in step 72, and in the command in step 73, they set 0 to the lock location. By setting this, the exclusive right to a specific partial area is released. Kon
This makes it possible for another information processing device (for example, 2B) to secure exclusive rights to the same specific partial area.

Similarly, the information processing device 12mu executes the command in step 71.
When trying to secure the exclusive fIi for the specific partial area, even if another information processing device (2C) has already secured the exclusive right, the information processing device 2C issues the command corresponding to step 73 within a limited time. In general, it can be expected that the exclusive use n1t- will be released by executing the command in step 71 multiple times by two information processing devices, and finally the exclusive use n1t- will be released. We can expect to secure 1iliwo.

The general structure of a conventional information processing system has been described above.

Next, a description will be given of how messages are exchanged in the conventional information processing system.

It is assumed that each of the information processing devices 2A, 2B, and 2C in FIG. 1 is operating at a lower execution level.

Assume that it becomes necessary for two information processing devices to communicate messages to 2B. At this time, the information processing device t2A
A message is sent by sequentially executing the command sequence shown in FIG. First, the inspection update command CA8 of step 74 is executed.

The lock location appearing in this command is a location for locking the shared partial area for message communication. Next, a message is written to the command group in step 75. Then, according to Stella 176's command, the lock location is set to 0 and exclusive use is canceled. Also, step 7
7, an interrupt signal instructing the information processing device 12B to take in a message is sent out via the interrupt signal sending bus 3.

The information processing device 2B responds to the interrupt signal sent from the interrupt signal sending bus 3 and interrupts the process currently being executed. Then, the instruction sequence address for performing the desired processing on the interrupt signal, that is, the message capture processing, is set to the second address.
Set it in the program counter 22 shown in the figure.

After the newly set address, the instruction sequence shown in FIG. 6 is stored.

Among these, the lock location appearing in the check update command CAS in step 78 is a location for locking the shared partial area for message exchange.

After completing the command processing in step 78, step 7 in FIG.
By sequentially executing the instructions in steps 79 and 80 corresponding to 5.76, the message capture process is completed,
By executing the operating state change command LDP8W in step 81, the interrupted process is restarted. That is, the contents before the interruption are returned to the status register 28 and the program counter 22, and the processing that was being performed before the interruption is resumed.

The above has shown how messages are exchanged in conventional information processing systems.

With this message communication system, when each information processing apparatus is operating normally, messages can be exchanged freely between any information processing apparatuses.

However, when one information processing device suddenly falls into an abnormal state, there is a possibility that all other information processing devices will be adversely affected. More precisely, all other information processing devices may become unable to perform effective processing.

Is this the situation below? ytt-explain. information processing equipment (
2A) follows the procedure shown in the rs diagram when transmitting a message to another information processing device. That is, following the instructions in step 74, exclusive use sr of the shared partial area for message exchange is first established. Then, execution of the next set of instructions at step 75 (D) begins. Let us assume that during the execution of this set of instructions, due to some programming problem, an infinite loop has occurred.To be precise, step 76 Suppose that you have fallen into an infinite loop without executing the instruction.

Then, other information processing devices that tried to send the message end up falling into an infinite loop one after another. For example, consider a situation in which the information processing device 2c attempts to send a message. At this time, the procedure shown in FIG. 5 is followed, but since the contents of the lock location checked by the command in step 74 will not become 0 forever, the information processing device 2C returns the command in step 74 as a permanent KID. In other words, you will end up in an infinite loop. In short, when one fHi processing device suddenly falls into an abnormal state, there is a possibility that all other information processing devices will become infinitely loose without executing any effective processing. Become.

In order to avoid such an infinitely loose state, an information processing apparatus that attempts to establish an exclusive right to use a shared partial area has conventionally been known to perform processing as shown in FIG. There is.

That is, first, in step 82, the value of the counter set in the subordinate storage device 22 of FIG. 2 is set to a predetermined monitoring value, and the process moves to the next step No. 7, test update command CA8. In step 74, when the content of the lock location is not equal to the test pattern, the process moves to update command DEC in step 83, and the content of the counter is updated by minus 1, and the content is determined to be non-zero by the zero check Janob command BCNZ in step 84. If it is not zero, the process returns to step 74. If it is detected by the instruction in step 74 that the contents of the lock location are equal to the test pattern, step 75 similar to the diagram s5,
Move to 76.77.

If it is detected again that it is not equal to the test pattern, the instructions in steps 83 and 84 are executed again.

As a result of repeating these operations, if the contents of the counter become O, the contents of the lock location are forcibly set to 0 with the instruction in step 85, and the jump destination address is set with the jump instruction JUMP in step 86. 10 ghum counter is set, and the process returns to step 82. At this time, the lock location inspection pattern is 0, so that p
Set the setting pattern for the application, and proceed to steps 75 and 7.
The processing moves on to the instruction 6°77.

In such conventional information processing systems, when an attempt is made to establish an exclusive right to use a shared storage area, the possession is forcibly released, and this was achieved purely by modification of the 7 software. ing.

By the way, the purpose of configuring multiple information processing devices f/It into a composite structure is to enable the other information processing devices to operate normally even if some of the information processing devices fail or become abnormal. There are measures to improve the reliability of the system. In this case, the most desirable form is
There is a so-called equal distributed information processing system in which each information processing device is not dependent on other information processing devices, that is, each information processing device operates equally, autonomously, and organically. In such an equally distributed information processing system, one information processing device is not allowed to monitor another information processing device. Performing the process shown in FIG. 7 is nothing but one information processing device monitoring another information processing device. Therefore, in a peer-distributed information processing system, it is not allowed to perform the process shown in Figure #I7, so in a peer-distributed information processing system, it is impossible to avoid the infinite loop state described above. Met.

An object of the present invention is to prevent an adverse effect on the remaining information processing devices in a peer-distributed information processing system when one information processing device enters a runaway state or a stopped state for some reason during message communication. It's because I did it.

In order to achieve such an object, the present invention is provided with a time monitoring means and a storage means for storing the exclusive usage state of the shared storage device by the information processing device for the customer information processing device. When using exclusively, the state is stored in the storage means and the time is monitored by the time monitoring means, and when the time is detected to be over, the contents of the storage means are rewritten and the exclusive use state is forcibly removed. I decided to do so.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 8 shows the configuration of an embodiment of an information processing system according to the present invention.

In FIG. 8, the difference in configuration from the conventional system shown in FIG. A first location 211 stores a locking flag indicating exclusive use of the shared storage area of the shared storage device l in 21B.A second location 212 stores the 5 address of the lock location. Further, a signal line 64 is provided for sending a signal representing the monitoring time and a start signal from the arithmetic control unit 24 to the time monitoring device 4, and a signal fIiA 65 is provided for sending an interrupt signal from the time monitoring device fil:4 to the interrupt control circuit 29. This is because we have established the following.

9 to 11 show an example of a sequence of instructions executed by the arithmetic control unit 24 in the present invention.

Of these, FIG. 9 corresponds to FIG. 5.1) The difference from FIG. 5 is that between the command of step 74 and the command of step 75, the state of exclusive use of the shared partial area is entered. Hill and t - Step 8 of storing in the first location 211
7, an instruction in step 88 to store the lock address in the second location 212, and an instruction in step 89 to specify the entire monitoring time to the time monitoring device 4 and start it up. Furthermore, between the command of step 75 and the command of step 76 in FIG. A step 91 instruction for storing the information is inserted.

- Also, FIG. 10 corresponds to FIG. 6, and between the instructions in steps 78 and 79, steps 87 to 87 in FIG.
The instructions in steps 92 to 94 corresponding to the instruction in step 89 are inserted, and the instructions in step 95 and 96, which correspond to the instruction in steps 90 and 91 in FIG. 9, are inserted between the instructions in steps 79 and 80. .

FIG. 11 shows an -nfc instruction sequence added according to the present invention, which is executed based on an interrupt signal sent to the interrupt control circuit 29 when the time monitoring device [4 detects a time overage.

In the figure, step 97 is an instruction to check whether the shared storage area is being used exclusively, step 98 is an instruction to cancel exclusive use, and step 99 is a process to notify other information processing devices of the occurrence of an abnormality. The command group to be executed, step 100, respectively corresponds to the command to strag the own information processing device.

Next, with the above-described configuration and instruction sequence, one information processing device (2A) is connected to another information processing device (2A).
Let it be B. ) will be explained in detail.

First, in order to send a message, the two information processing devices execute the test update command CA8 in step 74.

That is, it is checked whether the contents of the designated location in the shared storage device I are equal to the test pattern, and if they are equal, the designated setting pattern is set in the designated location. If they are not equal, the designated address is set in the log counter 22.

When it is detected that the content of the designated location is equal to the test pattern and the setting pattern is set to the designated location, in the next step 87 command, 1 is written to the first port 211 in the data storage area 21B. The locking flag is set to indicate that the shared storage area has entered the exclusive use state, and the address of the lock location is set in the second location 212 in the data storage area 21B by the instruction in step 88.

Next, according to the command in step 89, time monitoring! ! 114
Sends the monitoring time to set it in the timer, and also sends a start signal to start the timer.

In the command of step 75, the message from the information processing device t2A is sent to the common storage device i11 according to the data transfer command, and the message is written on the common chopstick part pm monument. When the writing of the message is completed, the command of step 90 A cancel signal is sent to the time monitoring device 14 to cancel the timer. The command at step 91 sets the contents of the first location of the data storage area 21B to t-0, lowers the locked flag, and stores 1 indicating that the shared storage device is in a state of exclusive use. Next, in step 76, the lock location is set to 0 (corresponding to detection f'<turn),
Terminating exclusive use. In response to the instruction in step 77, an interrupt signal instructing message capture is sent to the information storage device 2B.
Send to.

The information processing device 12B responds to the interrupt signal from the information processing device IItZA, and executes interrupt processing when the interrupt level is higher than or becomes higher than the operating level. That is, the contents of the program register 22 and the status register 28 are saved to a specific location in the subordinate storage device g21, and the processing currently being executed is interrupted. Then, values based on the designated address and interrupt level are set in the program counter 22 and status register 28, respectively.

As a result, the instruction series shown in FIG. 10 is sequentially processed. Steps 78 to 80 in FIG. 1θ correspond to steps 74 to 76 in FIG. 9, and in step 79,
Both perform the same processing except that they send messages from the shared storage device l to the information processing device 28.

In this way, in step 80, when the content of the lock location is set to 0 and the exclusive use state is released,
The process moves to the operating state change command LDP8W in step 81, returns the saved execution state to the state register 28 and program counter 22, and resumes the process that was being performed before the interruption.

Next, during the execution of the instructions in steps 75 and 79,
Assuming that an infinite loop has occurred due to a programming error, steps 76 and 80 for setting the lock location to 0 and releasing the exclusive use state cannot be executed as scheduled. The processing in this case will be explained.

In that case, the value of the timer of the time monitoring device m4 becomes 0 before the cancellation signal is input, and the interrupt signal based on the exceeding of the monitoring time is transmitted to the interrupt control circuit 2 via line i '65.
9, compare the level of this interrupt signal with the operating level, and when the level of the interrupt signal is higher than or becomes higher than the operating level, set the fixed address and specified value in the program counter 22 and the status register 28; The instruction sequence shown in FIG. 11 is executed.

First, in step 97, the zero checking command BCZ checks whether the contents of the 10th case in the data storage area 21B is 0. If it is not 0, step 98
- Set the contents of the lock location in the shared storage area to 0.

When it is detected in step 97 that the content of the 10th case is 0, and when the processing of the instruction in step 98 is completed, processing of the instruction in step 99 is started, and the own information processing device falls into an abnormal state. is transmitted to other information processing devices, and the own information processing device is stopped according to the command in step 10G.

Therefore, while sending or receiving a message,
Even if an information processing device suddenly falls into an abnormal state, other information processing devices can be prevented from falling into an infinite loop one after another.

The interrupt control # circuit 29 itself accepts interrupt signals of various levels, compares the level with the operation level of the currently executing instruction, and when the level is higher than the operating level or when the level is higher than the operating level, the specified value is set. Program counter 22 and status register 28
It has a function such as setting the value to , and can be realized using a commercially available interrupt controller AM9519 or the like.

Further, FIG. 12 shows an example of a specific configuration of the time monitoring device 4, where 41 is a clock generator, and 42 is a clock from the clock generator 41, which is a counter that counts down.

This counter 42 receives the monitoring time signal RIG set 11 from the calculation control unit 24 in FIG.
Clock generation due to startup bias @ from 4! 41 is started and a clock is generated! The contents of the counter 42 are counted down one by one by the clock from 41. Then, when the cancel signal S3 is sent from the calculation control section,
The contents of the counter 42 are cleared and the operation of the clock generator 41 is stopped. Also, when the contents of the counter 42 become ot or negative, an interrupt signal S4 is sent to the interrupt control circuit 29. The clock generator 41
stop the operation.

In the above embodiment, the time monitoring device viL4 is provided outside the information processing device 2, but it may be provided inside the information processing device t2.

As described above, according to the present invention, in a peer-to-peer distributed information processing system, when one information processing device enters a runaway state or a stopped state for some reason during message exchange, residual information is transmitted. This can prevent the process from falling into an infinite loop.

[Brief explanation of drawings]

Figure 1 is a configuration diagram of a conventional information processing system, Figure 2 is a configuration diagram of a conventional information processing device, Figure 3 is a configuration diagram of a shared storage device, and Figures 4 to 6 are conventional information processing devices. FIG. 7 is a flowchart showing another example of a command sequence executed by a conventional information processing device, and FIG. A configuration diagram of one embodiment of the central information processing system, FIGS. 9 to s11 are flowcharts showing an example of a command sequence executed by the information processing device according to the present invention, and FIG. 12 is a diagram showing the time monitoring device 4 according to the present invention. FIG. 2 is a configuration diagram showing an example of a specific configuration. l... shared storage device, 2... information processing device, 4...
・Time ¥11 figure 2nd eye 'f33 figure 14 figure YJ5 figure 7f' (7r+ ¥J6 figure Tq figure'¥31θ figure ¥'311TfA High 12 figure

Claims (1)

[Claims] 1. Completely equipped with a plurality of information processing devices and a shared storage device shared by the information processing devices, each information processing device can exclusively use a predetermined area of the shared storage device. In such a peer-to-peer distributed information processing system, at least a time monitoring means and a signal indicating whether or not the information processing device is exclusively using a predetermined area of the shared storage device are provided for each information processing device. When the information processing device exclusively uses the predetermined area, the signal f is stored in the storage means, and the time monitoring means starts monitoring the time +14. , If the time monitoring means detects that a predetermined time has elapsed before canceling the exclusive use of the predetermined area, the signal t of the storage means is replaced to cancel the exclusive use of the predetermined area. A peer-to-peer distributed information processing system characterized by: 2. The equal distributed fine information processing system according to claim 1, wherein the storage means includes means for storing an address corresponding to the predetermined area.