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JPS5837719A - Constant current generator - Google Patents

Constant current generator

Info

Publication number
JPS5837719A
JPS5837719A JP13641081A JP13641081A JPS5837719A JP S5837719 A JPS5837719 A JP S5837719A JP 13641081 A JP13641081 A JP 13641081A JP 13641081 A JP13641081 A JP 13641081A JP S5837719 A JPS5837719 A JP S5837719A
Authority
JP
Japan
Prior art keywords
current
input
terminal
voltage
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13641081A
Other languages
Japanese (ja)
Inventor
Kazuo Hamasato
和雄 浜里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP13641081A priority Critical patent/JPS5837719A/en
Publication of JPS5837719A publication Critical patent/JPS5837719A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • G05F3/10Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors
    • G05F3/265Current mirrors using bipolar transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

PURPOSE:To highly make a mirror ratio accurate and to highly make an output current stable, by taking one of outputs of a current mirror circuit as a reference signal and providing a negative feedback loop controlling an input power supply so that this reference signal can become a prescribed value. CONSTITUTION:The emitter of a transistor (TR) Qf for reference current generation is connected to a power supply 11 and the base is connected to the base of other TRs Q1-Q3. A collector current of the TRQf is a reference current and inputted to an input terminal 15 of a control circuit 14. The control circuit 14 compares a reference input If of a terminal 15 with a reference input II of a terminal 16 and controls an output of a terminal 17, i.e., an input current IOT of a current mirror circuit so that both the inputs are made coincident. In using an element of the same characteristics as those of the TRs Q2 and Q3 for the TRQf, the reference current If and output currents I01 and I02 of the current mirror are equal to each other, and an output current of a constant value proportional to the input current II or an input voltage VI.

Description

【発明の詳細な説明】 この発W14は入力電圧ないし入力電流に比例した一定
電流を発生する定電流発生器に関する%Oである。
DETAILED DESCRIPTION OF THE INVENTION This output W14 is %O for a constant current generator that generates a constant current proportional to the input voltage or input current.

従来この種定電流発生器にはカレント(ツー1路がらり
、そ01p1成を第1図に示す。カレンドイツ−回W&
O動作原理については例えばCQ出販社発行の「トラン
ジスタ技術J (1980年1月号249〜251ペー
ジ、東京電気大学出鷹局尭行「アナログICO基本回路
」@2章等に詳述されていhため詳細な説明は行なわな
い。pnp)ツンジスタ偽、伽、Qao各エイツタは電
圧VO@の電源11に接続され、トランジスタ−,Qs
の各プレクーは負荷ム、IJにそれぞれI!続され、ト
ランジスタQs OHレクタは抵抗R,O抵抗all!
を通じて入力111子I 54C1llfiiiれ、各
トラフジX I Ql @ Ql*偽のベース61トツ
yt)スタ伽の;レタタに接続されていゐ、cO従朱O
カレンドイツ−回路において番1トツンジスタOベース
電RO影響により十分な一ツー比、即ちカレンドイツ−
の入力電流と出力電流とO比0111度を得る仁とが困
難で6つ六〇つまpトツyジスタ偽〜QIの各ベースに
はibt〜bs&Aベース電流が流れ、各トランジスタ
の諧しIり側にはそ04)ベース電流が対応する各トラ
yジスIO電流増幅率倍され九電流が出力1れる。ζζ
で各トランジスタの特性が等しいものとすれば各)?y
ジスタO−レタタ電流は等しいもOとなるが、力v)/
)−ツーtm*o入力端子13にはトランジスター#伽
の各ベース電fi1ms〜1b−も流れhため、実際O
トランジス!−及びQjのコレクタ電流即ちカレント(
2−の各出力電流Io1. I・1(負荷Lt @ L
@に供給される)が各トランジスタのコレクタ電流に等
しいのに対し、入力端子13に流れる入力電流lKは対
応するトランジス/Q1のコレツ/[[に加えて各トラ
ンジスタQ1〜Qaのペースに流れるベース電流1b1
〜1b・が加わって流れるため、イラー比の高N度化が
困―な欠点を有していた。
Conventionally, this type of constant current generator has a current (two circuits), and its configuration is shown in Figure 1.
The operating principle is explained in detail in, for example, "Transistor Technology J" (January 1980 issue, pp. 249-251, published by CQ Publishing Co., Ltd., "Analog ICO Basic Circuit" @Chapter 2, published by Tokyo Electric University, Idataka Bureau, etc.). Therefore, a detailed explanation will not be given.pnp) Each of the transistors (pnp), ka, and Qao is connected to the power supply 11 of voltage VO@, and the transistors -, Qs
Each pre-coupling is a load, and each IJ is I! The transistor Qs OH collector is connected to the resistors R, O resistors all!
Input through 111 child I 54C1llfiiii, each trafuji
Karen Germany - The number 1 in the circuit is a sufficient one-to-two ratio due to the influence of the RO base current, that is, Karen Germany -
It is difficult to obtain an input current, output current, and O ratio of 0111 degrees, and a base current flows through each base of the six 60 p to On the side, the base current is multiplied by the corresponding tri-diode IO current amplification factor and nine currents are output. ζζ
Assuming that the characteristics of each transistor are the same, what are the characteristics of each transistor? y
The resistor O - retata current is equal to O, but the force v)/
)-2 tm*o Since each base electric current fi1ms~1b- of the transistor #a also flows to the input terminal 13, the actual O
Transis! - and the collector current of Qj, that is, the current (
2- each output current Io1. I・1 (Load Lt @L
While the input current lK flowing to the input terminal 13 is equal to the collector current of each transistor, the input current lK flowing to the input terminal 13 is equal to the collector current of the corresponding transistor current 1b1
Since ~1b. is added to the flow, it has a disadvantage that it is difficult to increase the N content of the Iller ratio.

tたcO従来のカレン) (2−1IINの入力はダイ
オードと同様の特性を有する几め、トランジスタQ1の
コレクタ・エイツタ間電圧をvo・Q1電置11の電圧
をva。電fi設定抵抗[7120抵抗をR,入力端子
130入力端子をvlで表わすと、カレント−2−回路
の入力電流IIは(1)式となあ。
(Conventional Karen) (2-1 The input of IIN has the same characteristics as a diode, and the voltage between the collector and the transistor of transistor Q1 is vo. The voltage of Q1 voltage 11 is va. The voltage fi setting resistor [7120 If the resistance is represented by R and the input terminal 130 is represented by vl, the input current II of the current-2-circuit is expressed by equation (1).

Iw  =  (Vae    V  (1@Ql  
−Vl  )/ B@   ”・・・・=(1)従って
入力電流1.が電源電圧v6゜の変動の影響を受ける他
・ トツ/ジスIQhOコレクメ・工(ツタ間電圧V@
・ql が温度特性を有するため出力電諷もこの影響を
受けて変動し、安屍な電流が得られない欠点を有してい
た・ この発明はこれらの欠点を除去するため・カレント−ツ
ー回路の出力の内の1)’j−参照信号とじそO参照信
号が所定の値となるようにカレンドイツ−vsvso入
力電ett制御する負帰還ループを付加することによ9
%(ツー比を高精度化し、かつ出力型mt高安定化した
4のである・ 第2図はζO尭明の第1の実施例を示し、第1図と対応
する部分には同一符号を付けである。この発明において
は参照電流発生用のトランジスタ史が設けられ、七O工
(ツタは電源11に、ベースtz他oトランジスタQt
〜伽のベースと接続される。トランジスタ史のコレクタ
電流は参照電流であって制御回路14の入力端子15に
入力される。
Iw = (Vae V (1@Ql
-Vl ) / B@ ”...=(1) Therefore, the input current 1. is affected by fluctuations in the power supply voltage v6゜.
・Since ql has temperature characteristics, the output voltage also fluctuates due to this influence, which has the disadvantage that stable current cannot be obtained. ・This invention aims to eliminate these disadvantages. ・Current-to-circuit By adding a negative feedback loop that controls the input voltage so that the outputs of 1)'j-reference signal and JisoO reference signal become predetermined values,
% (2 ratio is highly accurate and the output type mt is highly stabilized.) Figure 2 shows the first embodiment of ζO Yamei, and parts corresponding to those in Figure 1 are given the same symbols. In this invention, a transistor for generating a reference current is provided, and seven transistors (ivy is connected to the power supply 11, base tz and other transistors Qt) are provided.
~ Connected to the base of the fairy tale. The collector current of the transistor is a reference current and is input to the input terminal 15 of the control circuit 14.

制御回路14は端子1Bの参照入力と端子160基準入
力とを比較し1両入力が一致するようにその端子17の
出力、つ★9カレントイラー回路の入力電#IX・!を
制御する0 以下ζO動作を説明すあと、制御回路14は入力端子I
SO入力電111x(ないし入力電圧Vt)と参照電R
Ifとを比較し、入力電fiIr(ないし入力電圧Vt
)が参照電流Ifよp4大きい場合は制御回M14の出
力端子17に吸収する出力電流l・!を増加せしめ、そ
の制御の結果として参照電流Ifが増加し、逆に入力電
流!!(ないし入力電圧V1)が参照電流!!よりも小
さい場合は制御vA賂140出力端子17に吸収する出
力電流Iotを減少せしめその制御の結果として参照電
流!滓減少し、結局入力電fiIt(tいし入力電圧V
t )と参照電流!fとは一致するように制御される。
The control circuit 14 compares the reference input of the terminal 1B and the reference input of the terminal 160, and outputs the output of the terminal 17 so that both inputs match, and inputs the input voltage of the current error circuit #IX.! After explaining the ζO operation below, the control circuit 14 controls the input terminal I
SO input voltage 111x (or input voltage Vt) and reference voltage R
If, the input voltage fiIr (or input voltage Vt
) is larger than the reference current If by p4, the output current l·! is absorbed by the output terminal 17 of the control circuit M14. As a result of this control, the reference current If increases, and conversely, the input current ! ! (or input voltage V1) is the reference current! ! If it is smaller than , the control vA voltage 140 reduces the output current Iot absorbed by the output terminal 17, and as a result of the control, the reference current ! The slag decreases, and eventually the input voltage fiIt (t or input voltage V
t) and the reference current! f is controlled to match.

ここでトランジスタQfにトランジスタQ麿eQsと同
一特性の素子を使用すると、第1図の説明においてトラ
ンジスタQ1とQ愈OHレクタ電流即ちカレ/トイラー
の出力室RI@s e Ionが等しくなったのと同様
の原理によpトランジスメQf、Qs、QsOコレタタ
電流、即ち参照電流If、カレント電ツーの出力電流I
os e Ionは等しくなp、結局トランジスタQ1
の特性、並びにトランジスタQf 、 Qs = Ql
のベース電流の影響を受ける仁となく入力電111tな
いし入力電圧v■に比例した一定電[0出力電流I@I
 e Its  を得る仁とができる0以下制御回路1
4の具体的構成を示してこの発@O定電流発生at説明
する0 第3図において番1制御回路14内に演算増幅器18が
設けられ、その非反転入力側は抵抗Rfの帰還抵抗器を
通じて接地され、出力側は必要に応じて抵抗R1の電流
開議抵抗@21を通じて端子17に接続され1反転入力
1mは端子16にwk続される。
Here, if an element with the same characteristics as the transistor Qs is used for the transistor Qf, then in the explanation of FIG. Based on the same principle, the collector currents of the p transistors Qf, Qs, and QsO, that is, the reference current If, and the output current I of the current transistor
os e Ion is equal to p, eventually transistor Q1
characteristics, as well as the transistor Qf, Qs = Ql
The input voltage 111t or the constant voltage proportional to the input voltage v [0 output current I@I
Zero or less control circuit 1 that can obtain e Its
4, the constant current generation will be explained. In FIG. It is grounded, the output side is connected to the terminal 17 through the current initiation resistor @21 of the resistor R1 as required, and the 1 inverting input 1m is connected to the terminal 16 wk.

次に動作を説明すゐと制御回路14C)端子16に入力
端子13から入力電圧Viが印加され、一方参照電RI
fは制御a賂14参照入力端子15に供給され、制御t
m回路4内O帰量抵抗器19を経由して地気に終端1れ
る。その帰還抵抗器19の両端に生じる電圧降下は演算
増幅器18の非反転入力側に入力1れるoVht仮に入
力電圧Vtが帰還抵抗器19の電圧降下より高い場合は
演算増幅器18の出力は低下し、トランジスタQ1のコ
レクタ・エイツタ間に印加される電圧が増加し、結局制
御(ロ)I114の出力室I! ITは増大し、これに
伴なってトランジスタQf e Qs * Qs O:
xレクタ電流も増加し、トランジスタQfC)コレクタ
電流、即ち帰還電流1f(D増加によって帰還抵抗@1
90両両端型圧降下も増加し、従って演算増幅器14の
非反転入力側O電位が増加し、この動作は負帰還になる
ので演算増幅器180利得が十分大きければ入力電圧v
1と帰還抵抗器19の両端の電圧降下が等しくなった点
で平衡する。この平I11秦件を数式で表わすと Vi関Rf−If  ・−・・・・・・・・・・・・・
−・・・・・・・・・・・・・−・−・−・・・・・・
・−・・・(2)となり、これを変形すると、 If −Vi / Rf  ・−・−・−・・−・−・
−・−・−・−・・−−−−−−−・・・・−・・−・
−+3)となり、(1Iat )が係数で入力電圧当に
比例した一定電流O帰還電流並びにカレンドイツ−の出
力電@Iat及び!@麿が得られる。
Next, the operation will be explained.The control circuit 14C) The input voltage Vi is applied from the input terminal 13 to the terminal 16, while the reference voltage RI
f is supplied to the control a input terminal 14 and reference input terminal 15, and the control t
The terminal terminal 1 is connected to the earth via the O return resistor 19 in the m circuit 4. The voltage drop generated across the feedback resistor 19 is inputted to the non-inverting input side of the operational amplifier 18. If the input voltage Vt is higher than the voltage drop across the feedback resistor 19, the output of the operational amplifier 18 will decrease. The voltage applied between the collector and the output terminal of the transistor Q1 increases, and eventually the output chamber I! of the control (b) I114 increases. IT increases and with this the transistor Qf e Qs * Qs O:
x collector current also increases, and the collector current of transistor QfC), that is, the feedback current 1f (D increases, the feedback resistance @1
90 also increases the voltage drop across both ends, and therefore the O potential on the non-inverting input side of the operational amplifier 14 increases, and this operation becomes negative feedback, so if the gain of the operational amplifier 180 is large enough, the input voltage v
Equilibrium occurs at the point where the voltage drops across 1 and feedback resistor 19 are equal. This Heisei 111 Qin case can be expressed mathematically as Vi Kan Rf-If ・・・・・・・・・・・・・・・・・・
−・・・・・・・・・・・・・・・−・−・−・・・・・・・
・−・(2) becomes, and if you transform this, If −Vi / Rf ・−・−・−・・−・−・
−・−・−・−・・−−−−−−−・・・・−・・−・
-+3), and (1Iat) is a constant constant current proportional to the input voltage O feedback current and the output voltage @Iat and! @Maro is obtained.

3式よpfIらかなように参照電RIfはトランジスI
Q>の;レタタ・エイツタ関電圧vc@の項が入らない
ため従来回路で問題となった前記VaeQt O変動に
伴なう出力電Rの変動が生じないことがわかる。
The reference voltage RIf is transistor I so that the pfI is clear according to formula 3.
It can be seen that since the term of the retata/eitzta related voltage vc@ of Q> is not included, the fluctuation of the output power R due to the fluctuation of VaeQtO, which was a problem in the conventional circuit, does not occur.

このIK箇例では演算増幅器1ll)両入力電位が等し
くなるように制御されるため制御回路14の入力インピ
ーダンスを非常に高くすることができる。
In this IK example, since both input potentials of the operational amplifier 1ll) are controlled to be equal, the input impedance of the control circuit 14 can be made very high.

第4図は第5lIllO集施例の入力が電圧であったO
に対し電流に応動するよう構成した例であり、入力端子
130入力電[Itt終熾抵抗器22で終端することに
より電圧に変換して演算増幅[11Bに印加するように
した点板外は第3図の実施例と同様でToる・ 第S図並びに第6図はトランジスタが単一電流方向01
1号の+しか扱先ない仁とから交流の入力信号を扱える
ようにカレンドイツ−回路に所定のバイアス電流を流す
手段を追加した4のである。
FIG. 4 shows the case where the input of the embodiment is voltage
This is an example in which the input voltage at the input terminal 130 is converted to a voltage by terminating it with the termination resistor 22 and applied to the operational amplifier [11B. It is similar to the embodiment shown in Fig. 3. In Fig. S and Fig. 6, the transistor is in a single current direction.
In order to be able to handle alternating current input signals from No. 1 +, which can only be handled by the circuit, a means for passing a predetermined bias current through the Cullen German circuit was added.

即ち第6図では帰還抵抗器19C>接地側を負の電圧V
・・O電源23に終端したものでTop%第9%の実施
例における入力電圧v1と参照電流Ifとの関係式はv
1■Rf・xl −v・・ となp、これを変形すると If = (1/Rf)  (vt + V** ) 
 ・−−=”−・(4)となる。従ってV・・/Rfな
るバイアス電流の重畳が実現できる。第6図では帰還抵
抗器19に供給する電流を参照電流Ifから定電流源2
4によって発生した一定電流Inだけ減じたものとした
ものであり、入力電圧v1と参照電流Ifとの関係式は
v4−Rt (If−In )  となり、これを変形
するとIf ” (Vi / Rf ) + In  
・=””−・・=”・・・・(5)となり・何れの実施
例も所定のバイアス電流を供給することができる。
That is, in FIG. 6, the feedback resistor 19C>the ground side is connected to the negative voltage V.
...The relational expression between the input voltage v1 and the reference current If in the embodiment of the 9th % of the top % which is terminated to the O power supply 23 is v
1■Rf・xl −v・・ If we transform this, If = (1/Rf) (vt + V**)
・−=”−・(4) Therefore, it is possible to realize the superposition of the bias current V··/Rf. In FIG. 6, the current supplied to the feedback resistor 19 is changed from the reference current If to the constant current source 2.
4, and the relational expression between the input voltage v1 and the reference current If is v4-Rt (If-In), and if this is transformed, If'' (Vi/Rf) + In
.=””− .=” . . . (5) Both embodiments can supply a predetermined bias current.

第7図は低入力インピーダンスを有する電流入力形とし
て構成した例を示す・各トランジスIQ1〜Qs、 Q
ft !l P n形とし、そのエイツメは接地しコレ
クタを電源側とし、制御回路14内で端子16は演算増
幅器18の非反転入力側′に接続され、反転入力側には
一定電位が与えられ、帰還抵抗器19は省略されている
0入力端子13に入力電流!!が流入し、その入力電流
I!がそのと11流れている参照電流Ifより大きい場
合には演算増幅器180弗反転入力端子O電位が上昇し
、その結果演算轡幅器180出力電位が上昇し、トラン
ジスタQ1に流れる電流が増大し、これに応動してトラ
ンジスタQt 、Q鵞、Qs O:2レクタ電流が増大
し、トランジスタQ+の;レタタに流れゐ電流裔1、参
照電流として制御興隆14内O演算増幅器180非反転
入力熾子に入力端子13に与えられる入力電流から電流
を引抜く方向に作用し、Cれは負帰還動作となゐ口従っ
て演算増幅6618の利得が十分大音ければ入力電流!
Xと参照電流!fとが等しくなった点で平衡状態となり
、トランジスタQf4露、Qs O特性が等しければ、
電流IH* If* Iat qIosの電流値が等し
くなる・演算増幅16180反転入力端子に接続された
電8250電圧Vaは制御回路14の入力端子160電
位を決める電圧源であり、トランジスタQfの動作電圧
を保証すゐために必要となる場合がToム第8図に訃い
ては負の電源電圧v0.の電源26をカレンドイツ−の
共通端子、即ち各トツンジスタO:I−建ツタ側に接続
することによってトランジスタQtO動作電圧を保証し
九−のでるる。
Figure 7 shows an example configured as a current input type with low input impedance - Each transistor IQ1 to Qs, Q
ft! The terminal 16 is connected to the non-inverting input side of the operational amplifier 18 within the control circuit 14, and a constant potential is given to the inverting input side, and the feedback The resistor 19 inputs the input current to the omitted input terminal 13! ! flows in, and its input current I! If is larger than the reference current If flowing through the reference current If, the potential of the inverting input terminal O of the operational amplifier 180 increases, and as a result, the output potential of the operational amplifier 180 increases, and the current flowing through the transistor Q1 increases. In response to this, the collector current of transistors Qt, Q and Qs increases, and the current flowing through the collector of transistor Q+ is applied as a reference current to the non-inverting input of operational amplifier 180 in control circuit 14. It acts in the direction of drawing out the current from the input current applied to the input terminal 13, and C becomes a negative feedback operation. Therefore, if the gain of the operational amplifier 6618 is sufficiently loud, the input current!
X and reference current! An equilibrium state occurs at the point where f is equal, and if the transistors Qf4 and QsO characteristics are equal,
The current values of the currents IH* If* Iat qIos become equal. The voltage Va connected to the inverting input terminal of the operational amplifier 16180 is a voltage source that determines the potential of the input terminal 160 of the control circuit 14, and the operating voltage of the transistor Qf. In the case shown in FIG. 8, when it is necessary to guarantee the negative power supply voltage v0. The operating voltage of the transistor QtO is guaranteed by connecting the power supply 26 of the transistor QtO to the common terminal of the current transistor, that is, to the terminal side of each transistor.

第7図並びに第8図に示した実施例では入力インピーダ
ンスは演算増幅6180非反転入力端子の電位が仮8?
11地の櫃念によp演算増@41180反転入力端子の
電圧に固定されるため非常に低いものと碌る。従って例
えば第9図に示すように制御回路14の入力端子16と
演算増幅器18の被反転入力端子との間に抵抗がR1の
抵抗8627を挿入する仁とによp電圧入力にも対応す
ることも可能である・更には周知の演算増幅−を用いた
反転増幅器における加算上同様に、第9図に破線で示す
ように演算増幅Ill 8t)被反転入力端子に電圧(
Adlマ)又は/及び電流(Addl)  を加算する
ことも可能で6る・eの加算機能を利用して第10図に
示すように定電流源28からバイアス電RIlを演算増
幅器18C)被反転入力端子に供給することlこより各
トランジスタにバイアス電流を設定することも可能でめ
る〇 以上の説明から4明らかな如く、こoia@によればカ
レントイツー回路の入力部OトランジスIQ1の特性に
依存しないため、第11図に示すように第5EOfA施
例においてトランジスタQ1を削除して制御Vm絡14
0端子1フ及び電源11間に接続し、その接続点をトラ
ンジスタQs 、 Qs 、 Qfのベースに置替える
ことも可能である・この改JILは第4図乃至第101
1に示し**施流側総てに適用することも可能である。
In the embodiments shown in FIGS. 7 and 8, the input impedance is 8? if the potential of the non-inverting input terminal of the operational amplifier 6180 is 8?
11 Due to the power of the earth, p operation increases @41180 Since it is fixed to the voltage of the inverting input terminal, it is very low. Therefore, for example, as shown in FIG. 9, by inserting a resistor 8627 with a resistance of R1 between the input terminal 16 of the control circuit 14 and the inverted input terminal of the operational amplifier 18, it is possible to cope with the p voltage input. In addition, in the same way as in the addition in an inverting amplifier using a well-known operational amplifier, as shown by the broken line in FIG.
It is also possible to add the bias voltage RIl from the constant current source 28 to the operational amplifier 18C) by using the addition function of 6 and e as shown in Fig. 10. It is also possible to set a bias current to each transistor by supplying it to the input terminal.〇As is clear from the above explanation, according to Kooia@, the characteristics of the input O transistor IQ1 of the current I2 circuit Therefore, as shown in FIG. 11, in the fifth EOfA embodiment, the transistor Q1 is removed and the control Vm
It is also possible to connect between the 0 terminal 1 terminal and the power supply 11, and replace the connection point with the bases of the transistors Qs, Qs, and Qf.
1** It is also possible to apply it to all of the discharge side.

尚抵抗幅29は周波数特性に対する要求桑件等に応じて
取捨選択可能なものである・ 以上の説明におけるトランジスタはバイポーラ素子に限
らず電界効果素子等を用いることも可能でhり、t*通
常のカレント(ツー回路における改良接衝、例えばエイ
ツタ側への抵抗器の挿入、出力トランジスタへのパツ7
アトツンジスタの付加等をこの発明に適用することも可
能で1)9・又入出力の電流比の設定をトランジスタの
面積比で行なう郷の技術も同様に適用できる。
Note that the resistance width 29 can be selected depending on the requirements for frequency characteristics, etc. The transistor in the above explanation is not limited to bipolar elements, but it is also possible to use field effect elements, etc. current (improved connection in the two circuits, e.g. inserting a resistor on the side of the output transistor, connecting the plug to the output transistor
It is also possible to apply the addition of an atto-tuned transistor to the present invention, and 1) Go's technique of setting the input/output current ratio based on the area ratio of transistors can also be applied in the same way.

以上説明したようにこの発明によれば入力信号に正確に
比例し、しかも安定に動作する定電流を発生で1する利
点が6る―更に各種実施例に応じて次O効来がhゐ・ 第3図O実施例は入力電圧に比例し*、定電流を発生で
きかつ高い入力イン・ビーダンスが得られる利点が6p
、第4図の実施例は入力電流に比例した定電流を発生で
きる。第5図01!施例は各トランジスIに所定Oバイ
アスを与えたもOで両極性O入力信号が扱かえ、纂6図
OS鉋例はIg4図O実施例と同様の効果が得られる他
の手段を提供するもので6る0第7図O実施例は入力電
流に比例した定電Rを発生できかつ低い入力インピーダ
ンスが得られる利点がめゐ・第8図の実施例は入力端子
の電位をアースレペλに固定できる利点が6る・第s 
rlAo*施例は複流側入力信号の和に比例した定電a
t発生できる利点がめゐ・M10図O実施例はトランジ
スタに所足Oバイアス電RtRす第2の手段を提供する
%Oであり・第11図の実施例はトランジスタO数を制
波できる利点がある0
As explained above, the present invention has the advantage of generating a constant current that is accurately proportional to the input signal and operates stably. The O embodiment in Figure 3 has the advantage that it is proportional to the input voltage*, can generate a constant current, and can obtain a high input impedance.
, the embodiment of FIG. 4 can generate a constant current proportional to the input current. Figure 5 01! In this embodiment, a predetermined O bias is applied to each transistor I, but the bipolar O input signal can be handled by O, and the OS example shown in Figure 6 provides another means for obtaining the same effect as the Ig4 Figure O embodiment. The advantage of the embodiment shown in Fig. 7 is that it can generate a constant current R proportional to the input current and provide a low input impedance.The embodiment shown in Fig. 8 fixes the potential of the input terminal to the earth ratio λ. There are 6 advantages that can be achieved・Part s
rlAo*The example is a constant current a proportional to the sum of the double-flow side input signals.
・The embodiment shown in FIG. 11 has the advantage of being able to control the number of transistors. Some 0

【図面の簡単な説明】[Brief explanation of the drawing]

[1図は従来のカレントイツー回路を示す接続図#g2
図はこの弗例の基本構成own例を示す接続図、第3図
〜第11図はそれぞれこの発明の具体的実施例を示す接
続図であゐ。 14;制御回路、15:制御回路の参照入力。 16:制御回路の基準入力、17:制御回路の出力、!
f:参照電R* Qs e Qse Qse Qf: 
)ッンジスタ、18:演算増a器、19:帰還抵抗。 22:終111抵抗% 11.23.25.26:電源
電圧4 Iot @ Iot :出力電流、!4.28
:jlij電流源s Lt @ L@ :負荷。 特許出願人 日本電信電話会社 代理人草野 卓
[Figure 1 is a connection diagram #g2 showing a conventional current two circuit.
The figure is a connection diagram showing an example of the basic configuration of this example, and FIGS. 3 to 11 are connection diagrams showing specific embodiments of the invention. 14: Control circuit, 15: Reference input of the control circuit. 16: Reference input of the control circuit, 17: Output of the control circuit,!
f: Reference voltage R* Qse Qse Qse Qf:
) register, 18: operational amplifier, 19: feedback resistor. 22: Final 111 resistance% 11.23.25.26: Power supply voltage 4 IoT @ IoT: Output current,! 4.28
:jlij current source s Lt @ L@ : Load. Patent applicant: Takashi Kusano, agent of Nippon Telegraph and Telephone Company

Claims (1)

【特許請求の範囲】[Claims] (1)複数出力を有するカレントずツー@路と、そのカ
レントイラー回IIO出力の1つを参照信号として入力
し、そO参照信号と入力信号とを比較し。 両信号が一致する方向に前rカレン)(ツー1cllI
IO入力電流tm−する制御回路とを真備する定電流発
生器。
(1) Input a current Z2@ path having multiple outputs and one of its current error circuit IIO outputs as a reference signal, and compare the SoO reference signal and the input signal. In the direction where both signals match
A constant current generator equipped with a control circuit for controlling the IO input current tm.
JP13641081A 1981-08-31 1981-08-31 Constant current generator Pending JPS5837719A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13641081A JPS5837719A (en) 1981-08-31 1981-08-31 Constant current generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13641081A JPS5837719A (en) 1981-08-31 1981-08-31 Constant current generator

Publications (1)

Publication Number Publication Date
JPS5837719A true JPS5837719A (en) 1983-03-05

Family

ID=15174506

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13641081A Pending JPS5837719A (en) 1981-08-31 1981-08-31 Constant current generator

Country Status (1)

Country Link
JP (1) JPS5837719A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6047505A (en) * 1983-08-26 1985-03-14 Fuji Electric Corp Res & Dev Ltd Constant current circuit
JPS60152230A (en) * 1984-01-14 1985-08-10 ロ−ム株式会社 Charging circuit
JPS60152229A (en) * 1984-01-14 1985-08-10 ロ−ム株式会社 Charging circuit
US4574233A (en) * 1984-03-30 1986-03-04 Tektronix, Inc. High impedance current source
JPS62224815A (en) * 1986-03-26 1987-10-02 Hitachi Ltd Constant voltage supply circuit
JPS63100519A (en) * 1986-10-17 1988-05-02 Hitachi Ltd Constant current source circuit
JPS63251820A (en) * 1987-04-08 1988-10-19 Hitachi Ltd constant current source circuit
JPH02138608A (en) * 1988-11-18 1990-05-28 Sanyo Electric Co Ltd Driver array

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6047505A (en) * 1983-08-26 1985-03-14 Fuji Electric Corp Res & Dev Ltd Constant current circuit
JPS60152230A (en) * 1984-01-14 1985-08-10 ロ−ム株式会社 Charging circuit
JPS60152229A (en) * 1984-01-14 1985-08-10 ロ−ム株式会社 Charging circuit
US4574233A (en) * 1984-03-30 1986-03-04 Tektronix, Inc. High impedance current source
JPS62224815A (en) * 1986-03-26 1987-10-02 Hitachi Ltd Constant voltage supply circuit
JPS63100519A (en) * 1986-10-17 1988-05-02 Hitachi Ltd Constant current source circuit
JPS63251820A (en) * 1987-04-08 1988-10-19 Hitachi Ltd constant current source circuit
JPH02138608A (en) * 1988-11-18 1990-05-28 Sanyo Electric Co Ltd Driver array

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