JPS5831077B2 - white balance adjustment circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a white balance adjustment circuit in a color television camera or the like.

In the above color television camera and the like, in order to reproduce a color image that is faithful to the subject image, it is necessary to precisely adjust the white balance in response to changes in the color temperature of the illumination light source, etc.

For example, one way to adjust this white balance is to digitally digitally use the G (green) signal of the three primary color signals of R (red), G (green), and B (blue) as a reference. blue)
By controlling the gain of the amplifier for each signal, the average voltage value of the G (green) signal is matched with the average voltage values of the R (red) and B (blue) signals to achieve white balance. There is a digital gain control method.

This allows the gain of each amplifier for R (red) and B (blue) signals to be made variable, and the amplifiers are predetermined so as to have a gain control range necessary for achieving white balance. By sequentially combining and selectively using a plurality of load resistors installed in the amplifier, the gain of each of the amplifiers is sequentially varied to achieve white balance in accordance with the average voltage value of the G (green) signal. It is something.

However, in the above, the problem is the accuracy, that is, to what extent the average voltage values of the R (red) and B (blue) signals can be approximated to the above average voltage value of the G (green) signal. Furthermore, in order to improve this accuracy, the difference between one step within the gain control range must be made small.

In addition, the white balance adjustment of a color television camera must be able to handle a wide range of color temperature changes, and the gain must be adjusted over a wide range.
Good control is difficult.

Further, as described above, adding a variable gain circuit to the amplifier to satisfy the gain control range complicates the structure of the practical circuit and increases the cost.

Furthermore, in digitally controlled devices, it is inconvenient that even when the white balance automatic gain control circuit reaches the maximum gain, the above-mentioned control signal is still generated and circulates from the maximum gain to the minimum gain. It gives rise to

The present invention has been made in view of the above-mentioned points, and the amount of change between one step of the gain in the gain control range of the above-mentioned digital white balance is determined based on the actual allowable white balance adjustment. Maintain a good white balance within the planned color temperature change range, and maintain the above gain at the maximum or minimum to maintain an approximate white balance in other color temperature ranges that are less frequently used. It is an object of the present invention to provide a white balance adjustment circuit that takes on various states.

Hereinafter, an actual case according to the present invention will be explained with reference to the drawings.

The figure shows the average output voltage value of the G (green) signal, R (red) and B
(Blue) R above so as to match the average output voltage value of the signal.
This figure shows a circuit that controls the gain of the amplifier for the (red) and B (blue) signals.

Note that the main parts are shown only for the R (red) signal, and the B (blue) signal is controlled in the same manner as the R (red) signal above. ) The circuit for the signal is shown in a dotted line frame, and its internal connections are omitted.

In the figure, Rin, Bin, and Gin indicate R (red), B (blue), and G (green) signal inputs, respectively.
These signals have each been passed through a preamplifier of a television camera and have been corrected for dark current.

and Rou t 2 B out are R (red) and B (blue) signals each having an average voltage value that matches or approximately matches the average voltage value of the G (green) signal output.
The output of each signal is transmitted to a color processor.

The process of gain control of the R (red) signal with respect to the G (green) signal will now be described.

R (red) signal Rin is connected to transistors TR1 and T
After passing through an amplifier 1 consisting of R2, it is clamped by a clamp pulse P for a blanking period via a coupling capacitor C1, and is further connected to a resistor R5 and a capacitor C.
It is applied to the inverting input terminal (→) of an operational amplifier (operational amplifier) 2 consisting of a differential amplifier through an integrating circuit consisting of 2.

Note that 85 in the figure is a control switch that is closed only during the period by the clamp pulse P, and clamps the potential of the output Rout of the input signal Rin only during the period described above.

In addition, the first stage transistor T constituting the above amplifier 1
The load circuit of R1 includes RQ JRl tFt2tR3,
A load resistor R4 is connected in series, and control switches S1 . S2. S3. S4 is connected, and the opening/closing of the control switches 81 to S4 is controlled by an output signal from a binary counter described later, and the load resistor R1
.about.R4 are selectively connected to the load circuit of the transistor TR1, thereby controlling the gain of the amplifier 1 variably.

On the other hand, the G (green) signal, which serves as a reference signal for both the R (red) and B (blue) signals, is connected to the non-inverting input terminal (G) of the operational amplifier 2, via the coupling capacitor C3. After being clamped for a blanking period by a control switch S6 which is similarly closed by a clamp pulse P, it is applied via an integrating circuit consisting of a resistor R6 and a capacitor C4.

Therefore, the operational amplifier 2 operates as a comparator, and a G (green) signal, which is a reference signal, is applied to the non-inverting input terminal (1), and an R (red) signal is applied to the inverting input terminal (→). The comparison result of the average voltage value is outputted to drive the next Ft-S flip-flop 3.

The output signal from the R-S flip-flop 3 is applied to the ENABLE terminal of the binary counter 6 to be sent as a control signal to control the operating state of the binary counter 6, and is also applied to a gate formed of a NOR circuit. Sent to circuit 4.

The output from the gate circuit 4 is sent to the clock pulse generator 5, from which the C of the binary counter 6 is input.
Clock pulses of a predetermined frequency are sequentially sent to the LOCK terminal.

The binary counter 6 has four output terminals Q, ,
Q2. Q3. Q4, and sequentially performs 16 types of counting based on clock pulses from the clock pulse generator 5.

That is, Ql, Q2. Q3. The output mode of Q4 is (0,
0,0,0) , (1,0,0,0) , (0,1
,0,0).

(0, 0, 0, 1)... (1, 1, 1, 1).

Also, as mentioned above, the control switch s1) S27
S3 j s4 is the output mode Q1. of the binary counter 6. Q2. Q3. Q4i? For example, Ql, Q2.Q3.Q4 are (0, 0,
0,0), the control switch 81
~S4 are all open, and the load circuit of transistor TR1 includes the load resistor ROJ R1J R21R.
3J R4 are all connected and the gain of amplifier 1 is maximum.

In addition, in the case of the mode (1, 1, 1.1), all the control switches 81 to S4 are closed, and only R8 is used as the load resistance of the transistor TR1, and at this time, the gain of the amplifier 1 is the minimum. Become.

In addition, the above load resistances R6, R1°R2, R3, R4 are as follows:
For example, each is weighted twice as much as 1, 2, 4, 8, and 16.

As described above, the gain of the amplifier 1 is varied by sequentially switching the load resistors R8-R4 using the outputs Q1-Q4 of the binary counter 6, and the average voltage value of the R (red) signal output is used as the reference signal. As is well known, the output of the operational amplifier 2 becomes positive when it first becomes lower than the average voltage value of the G (green) signal output.
The NABLE terminal becomes O potential, the operation of the binary counter 6 is stopped, and the white balance state at that point is maintained.

At the same time, as is well known, the output of the gate circuit 4 shifts to a positive potential, so that the clock pulse generator 5 stops operating.

Also, even if the gain of the amplifier 1 reaches the predetermined minimum gain point, ie the output Q1.
Q2. Q3. Even when the state of Q4 reaches the point where it becomes (1, 1, 1, 1), the average voltage value of the R (red) signal output is larger than the average voltage value of the G (green) signal output, which is the reference signal. At that point, the operation of the binary counter 6 is stopped, and the circulation is stopped without being able to find the white balance point.

That is, the output Q1. of the binary counter 6 mentioned above. Q2
．． Q3. Q4 is the control switch S1.
S2. S3. S4 to perform opening/closing control, and are also sent to the NAND circuit 7, which receives four input signals and has a so-called fan-in number of four.

Therefore, the output Q1. of the binary counter 6 at which the gain of the amplifier 1 is the minimum. Q2. Q3. When the mode of Q4 is (1, 1, 1, 1), NkND 7 times output 7 becomes O potential as is well known, so the output of the operational amplifier 2 becomes a positive potential, and as in the above case, it becomes a binary - When the counter 6 stops operating, the clock pulse generator 5 stops operating, and this point is taken as a balance point.

In addition, SW in the figure is a reset switch, which applies a reset pulse to the FtESET terminals of the R-S flip-flop 3 and the binary counter 6 when, for example, white balance is to be re-established.

In the above explanation, the gain of the amplifier 1 that is controlled to match the average voltage value of the R (red) signal output to the average voltage value of the G (green) signal output, which is a reference signal, is changed from high to low. Although the explanation has been given using an example in which the values are changed sequentially, it will be easily understood that this can be similarly performed even if the values are changed sequentially from a low value to a high value.

In this case, if the white balance point cannot be found even when the gain of the amplifier 1 reaches the predetermined maximum gain point, it goes without saying that the gain of the amplifier 1 is intercepted to maintain the maximum gain.

Further, although the description has been made mainly of adjusting the average voltage value of the R (red) signal, adjustment can also be made for the B (blue) signal in the same manner as described above.

As described above, according to the present invention, even when the best balance point cannot be found, even when the best balance point cannot be found, the digital control can adjust the white balance using digital control. Accordingly, it is possible to provide a white balance adjustment circuit designed to stop the operation of the gain adjustment circuit and maintain a white balance state most similar to the white balance point.

[Brief explanation of drawings]

The figure is a circuit diagram showing one embodiment of a white balance adjustment circuit according to the present invention. 1... Amplifier, 2... Operational amplifier, 3
...RS flip-flop, 4...
Gate circuit, 5... Clock pulse generator, 6... Binary Karan 7...
~V circuit, pull, R1, R2, R3°R4...
Load resistance, Sl, S2. S3. S4゜S6...
control switch. 52

Claims (1)

[Claims] A white balance adjustment circuit that uses one of the three primary color signals of I R (red), G (green), and B (blue) as a reference includes a counter that counts clock pulses, and a reset means that resets the counter. , detection means for detecting that the count value of the clock pulses in the counter is set as the final count value of the counter; and a detection means for detecting that the count value of the clock pulses in the counter is set as the final count value of the counter; a variable gain amplifier that amplifies a signal other than the reference signal among the three primary color signals that can be varied from a gain of 1 to a second gain that is set when the counter reaches the final count value;
The variable gain is changed in the process in which the output voltage value of the variable gain amplifier and the average voltage value of the reference signal are compared to change the gain of the variable gain amplifier from the first gain to the second gain. A signal is output that causes the counter to count the clock pulses until the output voltage value of the amplifier reaches the average voltage value of the reference signal, and the output voltage value of the variable gain amplifier reaches the average voltage value of the reference signal. output means for outputting a signal for causing the counter to stop counting the clock pulses when the count value reaches the final count value; A white balance adjustment circuit comprising: holding means for holding the gain of the variable gain amplifier at the second gain.