JPS58218227A - Digital to analog converter - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a digital-to-analog converter, particularly a digital-to-analog converter (hereinafter referred to as a D/A converter) that converts a digital code signal to an analog signal via a load resistance circuit. ).

[Background of the invention]

In communication, measurement, control equipment, etc., mutual conversion between digital and analog signals is often performed. In the case of such conversion, it is important to convert the signal accurately, to increase the signal-to-noise ratio (S/N ratio), and at the same time to make the signal converter inexpensive.

Theoretically, by increasing the number of bits in the digital code signal, mutual conversion between analog and digital signals can be performed accurately, but in the actual configuration of the signal conversion circuit,
If the accuracy of the component circuit elements is not high, even if the number of bits of the digital code is large, the desired conversion accuracy cannot be obtained, and improving the accuracy of the circuit elements will lead to higher product costs. .

In particular, in a commonly used D/A converter that uses a digital code signal to switch the switch circuit of a loaded resistor (Dollar resistor) network, even if the quantization step is only a small step, the switch circuit will drive the changeover switch of the resistor section, which has a large load, and the level fluctuation error that occurs at that time will exceed the predetermined signal change, which will defeat the purpose of increasing the number of bits to improve accuracy. In order to reduce the fluctuation error, it is necessary to significantly improve the accuracy of the circuit components, resulting in a serious disadvantage of increased cost of the device.

[Purpose of the invention]

Therefore, an object of the present invention is to improve the signal-to-noise ratio of a DA converter. Another object of the present invention is to realize a DA converter with substantially improved accuracy by using circuit elements with ordinary accuracy.

[Summary of the invention]

In order to achieve the above object, the present invention obtains a digital signal of the difference between digital input signals, converts the digital signal of the difference into an analog quantity using a DA converter, and converts the analog quantity into an analog output signal by integrating the analog quantity. It is configured to do so.

That is, for signals with the same frequency component, a signal with a large amplitude will have a large voltage change for each sample by 4.1', which reduces the resolution of the DA converter. Field for weak signals, ′
11"・Based on the fact that the signal-to-noise ratio does not deteriorate even if the voltage drops below the peak value, the signal-to-noise ratio is kept constant against changes in the signal level of the DA converter when the voltage change for each sample is small. It is.

The present invention will be described in detail below using the drawings. First, in order to facilitate understanding of the present invention, the basic configuration of a conventional DA converter will be shown using FIG. 1, and its operation and problems will be explained. explain.

The DA converter 1 has a basic configuration including a high-precision constant current circuit 3 subjected to binary weighting using a resistor ladder 2, a current switch 4, and a reference voltage source 5 and an output amplifier 6 added thereto. Note that 7 is a digital code signal input terminal, and 8 is a digital code signal input terminal.
is an analog signal output terminal. When converting a digital input into an analog output using this circuit, for example, the digital input is an 8-bit binary code 01111111 (10
If you increase by 1 from base number 255), it becomes 10000000.
(decimal number 256). At this time, the current sum of the constant current circuit of the lower 7 bits with binary weighting and the current of the upper 1 bit, tl
, J The difference between the current values must correspond to the current value of the lower i bits. For this reason, the accuracy of the resistance ladder and constant current circuit determines the effective number of bits, and simply increasing the number of bits does not improve the resolution of the overall signal level.

Furthermore, when the magnitude of the signal changes slowly, a small change in the lower bit activates the current switch of the most significant bit, generating switching noise that cannot be ignored compared to the amount of change in the signal. Therefore.

Conventional DA converters cannot achieve low noise unless switching noise countermeasures are taken.

FIG. 3 is a block diagram showing the basic configuration of the DA converter according to the present invention.

The DA converter has a register 9, a subtracter 10, and a difference DA
It is composed of a converter 11 and an integrator 12.

When a digital signal is input from the input terminal 7, the register 9i etc. stores the digital signal input from one sample period before, and the subtracter IO calculates the difference between the digital signal inputs. The digital signal of the difference obtained is held together with the sign for determining whether the difference is positive or negative, and is applied to the next difference DA converter-11 using a clock signal. 12.1
3 is a clock signal input terminal. Differential DA converter 11
outputs a positive or negative analog signal depending on the positive or negative difference, but this signal plus a constant reference voltage is input/output. Also, at this time, the data in the register 9 is updated by the clock signal applied from the terminal 13.

The output of the differential DA converter 11 is applied to the integrator 12,
A signal approximated by a broken line is extracted as an analog signal. In order to reduce noise, it is sufficient to turn off the input when switching the current switch of the DA converter.

FIG. 4 shows the output signal waveform of the DA converter according to the present invention. Curve 14 indicates that the digital signal input is a conventional DA.
The ideal waveform when converted into an analog signal by a converter, song #jl15 indicated by a dotted line, is a signal waveform when the ODA converter of the present invention is used.

The signal waveform is approximated by a broken line, and the slope of the straight line for each clock pulse is proportional to the increase in the digital signal waveform. When the time constant of the integrator is changed, the amplitude of the analog output changes as shown by curve 16, but the waveform is exactly the same. Note that the analog signal output is delayed by the period of the clock signal.

Since the DA converter of the present invention can apply the effective digits of the differential DA converter to the amount of change for each sample,
At the same time, it is possible to dramatically increase the definition, and at the same time, it is possible to reproduce faithful and smooth signals using broken lines instead of step changes even for the smallest bit change amount.The feature of the present invention is to determine the slope of the broken lines. In this case, for signals with large amplitude, or more precisely, signals with a large amount of voltage change per sample, a large absolute error is allowed during DA conversion.
For weak signals, the absolute error is reduced and the signal-to-noise ratio is improved.

FIG. 5 shows a circuit diagram of an embodiment of a DA converter according to the present invention.

This DA converter is a high-precision device that converts 16-bit digital input into analog output, and consists of two 8-bit DA converters with normal precision. . 7□, 2
．． J.,, -h*-qhsh:yn+a. 1 through 7
6-bit register 9 and subtracter 10, DA converter 11-2 for upper 8 bits and DA converter 11-1 for lower 8 bits, voltage divider 14 consisting of resistors R1 and R2,
Adder 15, integrator 8, differential amplifiers 16 and 19 for compensating the DC output drift of the integrator, reference voltage generation circuit 24, low pass filter 25 (composed of R4 and 02). Pass filter 18 (consisting of R6 and 03), low pass filter 21 (consisting of R7 and 04)
), an adder circuit 20, and a DC regeneration DA converter 22.

The resistive voltage divider 14 divides the output voltage of the lower bit DA converter 11-1 into 1/256. To be more precise, the voltage step of the most significant bit of the DA converter 11-1 is The voltage step is made to be one-half of the voltage step of the least significant bit of the upper pitch I-DA converters 11--2.

11. With this, 1. ;1:,,,DA converter 1! -1,1
Reference numeral 1-2 constitutes a 16-bit differential DA converter having a bit number greater than the resolution for the maximum voltage. This 8
The differential DA converter constructed from bit-accurate parts has only 8-bit resolution with respect to the maximum output voltage as a single unit, but when used in the differential DA conversion integration method of this embodiment, the upper Since the bit current switch does not operate, the amount of change has a maximum accuracy of 8 bits.

That is, this DA converter operates correctly with substantially 16 bits for the alternating current portion of the signal. For example, when reproducing DC components up to 10 Hz or less, each filter 21 (R7 (!: composed of C4) and DA
By adding a converter 22 and an adder circuit 20, it is possible to reproduce the DC component with 8-bit accuracy.

Note that in the case of a signal used for communication, the DC component is not necessary, and the D/A converter, filter 21, and addition circuit 20 may be omitted.

In addition, in the above embodiment, the signal output of the lower bit is as follows.
Although the configuration is such that the voltage is passed through the voltage divider 14 of 1/256, the input time may be made isometrically equal to the pulse.

In these cases, the upper bits (or upper and lower bits)
Step changes in the output voltage can be avoided by using a hold circuit and increasing the integration time of the analog output.

In the above embodiment, two 8-bit DA converters were used, but it is of course possible to use a 16-bit differential DA converter, which has the same precision components from the beginning but has an increased number of bits. .

Furthermore, according to this method, if the sampling time is made faster, the amount of change in signal voltage generally decreases, and it is possible to reduce the number of bits of the differential DA converter to a greater extent than the number of bits of the register.

Furthermore, instead of using two DA converters in this embodiment, the upper bits and lower bits of the digital signal input may be sequentially processed in a time-division manner and inputted to the integrators.

Furthermore, the DA converter according to the present invention is of course also used as a partial decoding circuit of an AD converter, and FIG. 6 shows the DA converter according to the present invention.
An example in which an AD converter is configured using a converter will be shown.

The AD converter 1 is composed of a DA converter 1, a register and control logic circuit 26 for sequential comparison, and a comparator 27.

The operation is generally well known, and involves operating a DA converter bit by bit, comparing its output with an unknown input analog signal using a comparator, and performing conversion. Note that 28 is an analog signal input terminal, and 29 is a converted digital output terminal.

In the case of signals generally used for communication, a DC component is not required, and as mentioned above, the DA converter according to the present invention can be used with the existing inexpensive 4
~ Using circuit components used in 8-bit DA converters, DA or A with twice or more high integration density
A D converter can be constructed, and a highly integrated AD or DA converter can be realized.

Brief explanation of the drawings □ Fig. 1 is a block diagram of a conventional DA converter, Fig. 21' is an explanatory diagram of a digital signal to explain the DAA conversion operation, and Fig. 3 is a DA converter according to the present invention 12. Block-1 showing the basic configuration of the converter Fig. 4 is a waveform diagram for explaining the operation of the present invention, Fig. 5 is a circuit diagram of an embodiment of the DA converter according to the present invention, and Fig. 6 is a diagram of the present invention. AD using a DA converter by
Converter block diagram 1... DA converter, 2... Resistance ladder, 3... Constant current circuit, 4... Switch, 5...
...Reference voltage source, 6...Amplifier, 7...Digital signal input terminal, 8...Analog signal output terminal, 9...
・Register, 10...Subtractor, 11...Figure 1
Figure 62 Figure 3 Tomi 5 Mouth'VJ 6 Figure

Claims (1)

[Claims] a first circuit that calculates a change in the digital input signal;
A digital circuit comprising: a second circuit that converts the digital output signal of the above circuit into an analog signal; and a circuit that integrates the output of the second circuit.
analog converter.