JPS58206121A - Manufacture of thin-film semiconductor device - Google Patents

Abstract

PURPOSE:To promote an increase in crystal grain size of silicon and electrical activation of impurity atoms by a method wherein an island-like silicon region formed on a substrate through deposition is subjected to the ion implanting process, and an energy beam is then irradiated onto the substrate. CONSTITUTION:A silicon thin film 2 deposited on a glass substrate 1 is etched, and an SiO2 film 3 is then coated all over the surface to form an insulating film. Source and drain regions 6, 7 are selectively subjected to ion implantation 5. After removing a resist mask 4, a laser beam 8 is irradiated onto the island-like silicon region. A source electrode 9, drain electrode 10 and a gate electrode 11 are formed on the SiO2 film 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a four-film semiconductor device using a silicon mil film deposited on a substrate as an active region.

[Technical backbone of the invention and its problems]

The biggest difficulty in putting thin-film silicon semiconductor devices on an amorphous substrate into practical use is that their electrical characteristics are significantly inferior to those of single-crystal silicon semiconductor devices. The reason for this is the crystallinity of the silicon thin film. A silicon thin film using an amorphous substrate, especially a positive substrate, is in a non-I# crystalline, microcrystalline, or polycrystalline state with a grain size of X. The electrical properties of such a silicon thin film are significantly worse than those of single crystal silicon, and the carrier mobility is 1 crr? It is less than 1 de lee, which is only several hundred times lower than that of single crystal silicon.

A method of improving the electrical properties of a silicon thin film is to make it into a polycrystalline state with a large crystal grain size, and ideally, to make it into a single crystal state with an even larger crystal grain size. For this purpose, a thin silicon film must be deposited! I#: It is possible to make the gold more expensive or to somehow supply energy to the silicon being deposited.

However, when glass is used as the amorphous substrate, there is an upper limit to the deposition temperature; for example, for Corning A059, the deposition temperature is approximately 5
50°C is the maximum deposition temperature. If silicon is deposited above this temperature, the glass plate will be deformed and the photolithography in the subsequent manufacturing process will be poor.

The carrier mobility required for a thin-film silicon matrix is at least 10 ri/ma. Even if you use the method, it is difficult to lower the temperature to below 700°C. Therefore, the thin lI# deposited on a positive wick at low temperatures must be converted into silicon with a large grain size by some method.

[Komai's purpose]

SUMMARY OF THE INVENTION The present invention addresses the above-mentioned points and aims to provide a manufacturing method capable of achieving all the characteristic characteristics of a silicon semiconductor device.

[Summary of the Invention] 1. The present invention promotes the increase in the MA grain size of silicon by irradiating an energy beam through an ion implantation mask to island-shaped silicon sulfur formed on a substrate. At the same time, it promotes electrical activation of impurity atoms implanted into silicon.

〔Effect of the invention〕

The present invention has made it possible to significantly improve the electrical characteristics of thin film silicon semiconductor devices formed on amorphous substrates.

For example, channel length (L) is 20tun, channel I
II! (W) is 20 am, r-to oxide film thickness 1500X
The characteristics of the n-channel enhancement type MO8FET are that the threshold voltage (7 pins) is 18 when irradiated with laser light.
V to 2.5 V, the effective mobility (μeff) is
0.1 ctn2/Y'l@e to 16 CIIL"/
It showed a 160-fold increase in v·s*e. Furthermore, the average crystal grain size of the silicon film was 300 to 500X, but after irradiation with Raded light, it increased to 0.5 to 1.0 μm. The source/drain region contains phosphorus ions at 2×1015/cIIL.
2, the sheet resistance value after irradiation with Rede light is 15
0-250 Q10, low resistance n with activation rate 80-90%
+ It was made of polycrystalline silicon.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings. In this example, the amorphous substrate was deposited by the normal pressure←#→ method using thermal decomposition of Konin SiH4.

The substrate temperature at that time was 530°C, and the film thickness was 0.6~0.
7 tm, an average crystal grain size of 300 to 500X, and a carrier mobility of 0.15 c3n2/v·lee.

FIG. 1 shows that after a silicon thin film 2 deposited on a glass substrate 1 is etched into the shape required for an FET, a silicon dioxide (SiO2) film 3 is deposited as an insulating film by the atmospheric pressure separation method. , the substrate temperature at that time was 430℃, and the film thickness was 1500X.
Met. This silicon dioxide film 3 is the y-
The mat is left as an insulating film.

In Figure 2, ion implantation 5 is selectively applied to the source and drain regions 6 and 7 through the silicon dioxide 3 film! I14 is shown. For the ion implantation mask into the FgT channel region, a Rennost mask 4 with a thickness of about 1 μm was used.
Historically used. The resistance of the source and drain regions must be sufficiently low. In this case, phosphorus (P) is
Ions were implanted at an acceleration energy of sV so that the implantation density in silicon was approximately 2 x 10 /crn''.

FIG. 3 shows that after the resist mask 4 has been peeled off, a laser beam 8 is applied to the island-like silicon region where the ion implantation process has been completed.
This shows the state in which the light is being irradiated. The laser irradiation conditions are a wavelength of 51 emitted from a CWAr radar with an output of 6W.
A 45X light beam was focused on approximately 200 μmφ (approximately 2 mmφ at the end of the laser tube), and the scanning speed was 60 cmAn.
In, the overlap of the scanning lights was set to 10 μ%/5top.

As a result, crystal growth is promoted in the silicon thin film,
The average crystal grain size of the film ranges from 300 to 500X microcrystals to 0.
．． The size increases to 5 to 1 μm, and the silicon film becomes thick (
220) Transforms into an oriented polycrystalline silicon thin film.

In addition, in the source and drain regions 6 and 7 into which phosphorus (P) ions are implanted, phosphorus atoms move to silicon lattice positions at the same time as crystal growth, and the activation rate is 80 to 90.
A low-resistance polycrystalline silicon having a sheet resistance of 150 to 250 rVO was formed.

FIG. 4 shows that after the laser beam irradiation, the source, drain and y
- Each of the electrodes 9 to 1 has a diameter of approximately 0.8 μm after opening a contact hole in the silicon dioxide*WXJ covering the source and drain regions. It is made by vacuum evaporation of aluminum to a thickness of ft.

The characteristics of the MOSFET of this example are as follows: threshold voltage (Vt
) is $'! -t2.5V, effective mobility (part)
Fi approximately 16crF? /v・■c got 6.

In the above example, a plastic plate was used as an example of the amorphous substrate, but the same results can be obtained by using a single crystal silicon plate on which various ceramics, ceramic plates, and individual insulating films are deposited as the substrate. can get.

It is preferable to raise the temperature of the amorphous substrate to about 400° C. during radar light irradiation in order to promote crystal growth of the silicon thin film.

Further, instead of the radar beam, the same effect as in the above embodiment can be obtained by using other energy beam irradiation such as a single beam or an Xs flash slung beam.

The present invention can of course be applied not only to the production of FETs but also to the production of universal transistors.

[Brief explanation of drawings]

1 to 4 are diagrams showing the manufacturing process of an MDSFET according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Amorphous substrate (plus), 2... Silicon 4 region, 7... Drain region, 8... Radar light, 9°10.11... Electrode. Applicant's agent Patent attorney Takehiko Suzue 1st 2nd 3rd = B/7

Claims (1)

[Claims] When manufacturing a thin film semiconductor device using a silicon thin film deposited on a substrate as an active region, after forming an island-like silicon region, the entire surface of the substrate including the island-like silicon region is covered with an insulating film. A trowel is used to selectively implant impurity ions into the island-like silicon region through a film, and an energy beam is irradiated onto the island-like silicon region to simultaneously increase the silicon crystal grain size and electrically activate the ion-implanted impurity. A method for manufacturing a thin film semiconductor device, characterized in that: