JPS58204617A - Signal level converting circuit - Google Patents

Abstract

PURPOSE:To reduce the pattern area by constituting two transistors (TRs) whose potentials are connected to a potential supply source having prescribed voltage so that the conduction is set at a potential of the potential supply source between the prescribed voltage and 0V. CONSTITUTION:A series circuit comprising p-channel MOSFETs TR1, TR2 and an n-channel MOSFETTR3 is provided between the potential supply sources V1 and V2, and in parallel with this series circuit, a series circuit comprising p- channel MOSFETs TR4, TR5 and an n-channel MOSFETTR6 is connected. The conduction of FETTR1, TR4 is set with the potential of the supply source V3. The potential of the supply source V1 is set at 3V, the potential of the V2 at 0V, and the potential V3 at 1.5V, respectively. The drain-source currents of the FETs TR1, TR4 are decreased by settng the gate potentials of the FETTR1, TR4 higher. Thus, the total pattern area is reduced.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This investigation is based on, for example, one salt of each citron used in the electronic psalm 1.
It is connected to the signal level conversion circuit No. 8 which converts the level ti.

[Investigation B1. Ryoichiri 11'Sho] In general, the Oniko hour hand uses an oscillating 1g circuit that generates a reference signal,
A frequency dividing circuit that divides the frequency of the reference signal output from this oscillation circuit, a monosalt circuit that calculates the volume signal 'kir'l' divided by the frequency dividing circuit, and a 111 time or calculation result by the logic circuit. a driving circuit for causing the display device to blur;
And when IJJA movement of II' 2 and 6 ton iron via the upper fiber burial and unloading route is made, or when the two layer level of the calculation result is exposed and the two layers meet the IJJA movement. It has a signal level conversion circuit for converting the signal level.

By the way, as an electronic display device, a quasi-crystal display device (hereinafter referred to as an LCD) is widely used.

The drive voltage for the above-mentioned LCD is generally one in which the production voltage is 3 µm or more. On the other hand, since electronic time cod 1 is often used as a firefly [7], there is a strong demand for a small battery, and many convenient 'ili sources use one small battery. Therefore, in order to lengthen the 4-# of the 1iL pond and reduce the number of interactions, the demand for lowering the power of each sweetfish is 5 times higher. In order to achieve high li (γ11 power) in many electronic devices, it is necessary to reduce the operating voltage by using the above-mentioned test circuit, dividing circuit, logic circuit, etc.
．． The circuit definition and NatsuC are similar to those produced in 5■.

Therefore, at 1 or 1 according to the above logic circuit? This il'lj!
'- Or, by making a fox calculator and using the 1.5V thread's shadow buried in December, the logic signal of the thread can be used as a father's peace of mind. To achieve this, a signal level conversion circuit is provided.

The signal distribution and bell transducer circuit is constructed as shown in Figure 1. That is, the l-th potential difference V1
Between the potential supply #S source v3 of @2 and the 121st! Electric type (
P-channel 11th second MOS transistor T r
l # T rz, and the 24th electrical type (N channel) third rwsctS) Lannostar Tra or connected series circuit. 5th & 1st S Trannosta T
r4+'l'r5 and the 6th of N channel castle +Qs
L.Lancesta 1゛r6 is piled in series. Then, the transistors Trl+Tr4 are set to be conductive at the potential of the supply source v3 at #20'-, and the drainnoster Try is controlled four times by the potential at the connection point of the transistors rr1 and Tr6. Conduction can be controlled by the potential at the connection point between the transistors Try.

Furthermore, Saturday and Sunday c transistor Tr) is human power every issue Vinr
: 4 letters + tid both 'c! tL, ) The running star Tr6 has a third potential supply voltage v3 that increases the potential between the first voltage supply voltage v1 and the second potential supply source, and a second
The conduction is controlled by the output of the inverter li!I Ayumu voT (inverted output of the human input signal V, .) whose inverting level is 5 (MV*).Then, the transistor T
The connection point of r5 + Tr6, and the output number V. utk chew.

In the above configuration, the first potential 1 co-sum W V
The potential of t is 3v x the potential of second v2 is Ov
1 Third potential supply source V! The potential of is set to 1.5V.

At this time, the above-mentioned transistor 'prl*Tr4 is in the ON state when it is full, and when Irunotsuki L4 No. Vin is Ov, the transistor Tr31 'f' rB is in the ON state9, and the transistor 'f rz r '1' re becomes on state. Therefore, output signal ■. ut becomes Ov.

-* fC, human power 1B ”'i V r 11 is 1.5
When v, trannostar T rB 11' rB-pi
When the signal is on, T rz * T rB is in the on state, and the output is 1. A level ρ of 3V is obtained at ut. It is possible to convert the input number 1d Vl,) whose cooking levels are t#), ov and 1.5 V into a logic number 1g whose cooking levels are ~0■ and 3■.

[Problems with background technology]

However, the disadvantage of Issei's (G level) bell wave gray circuit like Asami's is that it occupies a large amount of chip space. L the chivalry circuit
When using it for driving a CD, the LCD's electric circuit is safe;
This causes an increase in the tyrannoplane lt*. Below, I will explain eC in detail. When the human input signal Vin changes from Ov to 15■, the transistor T rB + T
rB is on, transistor Tr! , Tr@ or from the on-state female addition fc-like formation, transistor Tr3 + Tr
6X+•on state, transistor i'rt+Tr• returns to on state. In order to make this transition tJV,
The on-resistance of transistor Tr3+Tr@ is transistor '1rleTr! It is safe to make the on-resistance tree 1 larger than the sum of the on-resistances of the transistors T r4 r T rB by an amount of light. This tL is the potential at the connection point of the transistor 'i' rz * i' rB when the transistor Tr3 changes from the on state to the on state V (when the transistor Tr23J changes to the on state e). Inverted from i3V to 0■, 72 &J #I
It's because it doesn't happen. And Tofunnosta Tr
When the potential at the contact point C of 2 r T rB is reversed to 0, the transistor 1 r5 is turned on, and the 2 state of the transistor 'rr5 turns the transistor Tr
y is turned off, resulting in a careless state. In the above transistor TrlnTrs&, J switching transistor, its on-resistance at m' is transistor Trl*T
The resistance is sufficiently small compared to the on-resistance of r4.

As a result, the on-state ratio of transistors 1lr3 and Trl and the on-resistance ratio of transistors Tr6 and Tr4 become dominant. -This resistance ratio is 10
6 fish per 1 u.

Next, taking as an example the anastomosis which is shortened by 1 to the resistance ratio 5016, calculate the pattern area of the circuit shown in FIG. It is difficult to think of it as the current ratio when the Botani transistor is in the on state, so if the current in the on state is I, then
,.

I ζ-K (Vf; 1 V16 ) 2 X μ
N(μP)X-'--41). In the above equation (1), K is proportional 1JIUz Vcs is the transistor gate-source voltage, t1° is the transistor threshold 1111 voltage, μN (μP) is Nnaya-nel1ll
cP channel type] Transistor carrier $1ktH
t, T is the ratio of channel width to channel length of the transistor. Now, assuming that the carrier movement in an N-channel transistor is approximately twice that of a gold P-channel transistor, and is sufficiently smaller than the threshold voltage vth of the transistor or the dirt-source voltage vcg, when the transistor is in the on state, The drain-source distance ηC is considered to be proportional to the dirt-source voltage. Therefore, the ratio between transistors Trs and Trl is approximately +100:IJ.

The minimum 1lll of the above gate length upper f-1- is 10μm
Assuming that, the τ ratio of the transistor Trl is “100:
10'', and the τ ratio of the transistor T rl is ``10:100''.
”.

Therefore, the total area of the circuit shown in Figure 1 above is rioox10X
2X2=4000μm, , J and z, b, i+ y Since the do-menko is r100X100=10000μm2Ji, -! It reaches about 40 inches in length. As mentioned above, the conventional signal level conversion circuit occupies II
IJ: There is always the disadvantage of becoming fat due to poverty.

[Purpose of the invention]

This invention vaguely avoids the 11t like the above B pi, and its purpose is...! The aim is to promote a No. 16 level lighting circuit with a narrow width around the main core.

[Plantation of invention]

That is, in this case, the 11th and 4th transistors Try in the circuit of FIG.

Tr4τ
This is necessary because it is made so that it conducts 6 squares at a potential of g.

[Example of invention husband]

Hereinafter, a 1'-kh example of this invention will be celebrated by highlighting it in the box -C1. Figure 2 shows the configuration for 2s<-j-,
The darts of the first and fortieth tonnostars T rl and T r4 in the circuit shown in FIG.
: m TJiA V 1 and the second potential m V
Between z and (,,l)'')r, the third point is allowed to have a constant potential.
'11 &! , iX
In Figure 0, which is a companion, the same components as in Figure 1 are given the same numerals (the explanation of ゛ is omitted).

Upper stand c 71: Same circuit as in Fig. 1 when picking.
Since the gate potential of transistors Trl+Tr4 is set high, the transistor i' r
l l T r4 drain/source voltage is low -1゛j
@V8Th1.5V and kk, the transistor Tr
W/L of 3 is 50/l O, W/L of transistor Trl
Since L is 10150, the total area is r50X10X2
X2=2000 μmJ. Therefore, it can be reduced to 1/2 of Zetaan. This is because the drain-to-source voltage ηC when the transistor is in the on state is proportional to W/■, and is proportional to 2 m to the dirt-source voltage.

By the way, the circuit shown in Figure 2 above is the same as the circuit shown in Figure 1.
) The transistors Try and T
The xi ratio with rl is r200: IJ people can add 1 to 1μ of 8. By this 7L, it is possible to shorten the state transition time due to the input signal Via Q) inversion, and the transistor T rl
The time during which eTrs6 or Tr4rTrl are simultaneously in the on state can be shortened. Therefore, transistor Trl + Tr3 b blue IJ, Tr 4 rT
The 14L flow that flows when r6 is in the on state can be lowered to the dog I-. Currently, the demand for low power consumption is extremely strong in electronic LSIs, and the total current consumption is 1μ.
The one that reverses downward to 8 is also 6j), a minute value of 0.1 μA @ degree'
- The forces of stream reduction have been made, and it is no wonder that this invention is used to expand signal level control circuits into electric power. Warrior 11, as the potential run between the potential supply 11a W V s in Figure 3 and the 8141 Ichiki Kuchoei becomes larger, the young fruit becomes larger. At t, the next 7J is on a narrow surface with more valleys, and the 41JI cheeks and drive method of the LCD are also different, and in this more LCD, the drive pressure and eyes are also required up to 4.5■ However, there is a limit to the number of LSI output terminals, so one output terminal can operate the entire MJA segment of the mantissa.
A loose noise knitting force type is used. Like this lol
A sea bream method glue, CL) requires Sudoku as the Nf'to voltage level, for example, OV, 15V, 3V, 4.5
Many of these I
, C1), it is necessary to set K to 1, for example, 1.5V level logic 8 to 4.5V level @ logic (9).In such a case, the transistor Tr
Since it is necessary to set w/L of 3+Trl and Tr6 r Tr4 closely, large young fruits can be obtained by applying the present invention.

[The young fruits of invention]

As explained above, according to Shiroaki, there are N paths of signal level conversion that can make the pattern smaller and smaller.

[Brief explanation of drawings]

1. Figure A41 shows a conventional signal level conversion circuit.
FIG. 2 is a diagram illustrating a signal level recovery circuit according to an embodiment of the present invention. ■M...first potential supply source, Vl...second potential m
bag, V @ - third potential supply 1 = TIAz T
rlyT r6...t, □O8) transistor, NOT
... Inverter circuit, fQ ... Input 1 mu number, vou
t...Output 1 horoscope. Applicant's agent La [Hatado -d Jiang Wu] Figure 211

Claims (1)

[Claims] The first potential supply W and the second approximately 1fL B (lij
A series circuit consisting of an 11th MOS transistor of the 1st conductivity type and a 3rd MOS transistor of the 2nd conductivity type, which are connected to the 1! ,! Iii6
)c Parallel connection of the 4th and 5th transistors of the 1st electric type and the 60th M0S transistor of the 224% type.
The LJ path and the sixth h10S transistor are
It is combined with an inverter circuit that supplies 6 inverted signals,
The first and 40th M0S transistors are the upper BC first'
At the same time, the 20th MO8) transistor is connected to the electric box at one end of the fifth 1V10s transistor. The conduction of the fifth MOS transistor is controlled by the potential at one end of the second MOS transistor, and the third MOS transistor is made conductive by the input signal. , top 1, 5th,
6th MOS) Output signal 11 from the connection point of the transistor
- A level conversion path characterized in that it is configured to obtain an Iba level conversion path.