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JPS58201436A - Scrambler - Google Patents

Scrambler

Info

Publication number
JPS58201436A
JPS58201436A JP57085967A JP8596782A JPS58201436A JP S58201436 A JPS58201436 A JP S58201436A JP 57085967 A JP57085967 A JP 57085967A JP 8596782 A JP8596782 A JP 8596782A JP S58201436 A JPS58201436 A JP S58201436A
Authority
JP
Japan
Prior art keywords
converter
output
key
code
converted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57085967A
Other languages
Japanese (ja)
Other versions
JPH0423854B2 (en
Inventor
Hiroshi Uno
宇野 裕志
Eiji Okamoto
栄司 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57085967A priority Critical patent/JPS58201436A/en
Publication of JPS58201436A publication Critical patent/JPS58201436A/en
Publication of JPH0423854B2 publication Critical patent/JPH0423854B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To obtain a scramble with simple constitution, by repeating the operation that input data is divided into plural small blocks, each block is converted linearly after the block is converted with respect to signal by a key signal. CONSTITUTION:The input data are divided into n-blocks comprising l bits each by an input buffer 101 and inputted to a linear converter 103 after the code conversion is done with a code converter group 102 consisting of n sets of code converters S11-S1n performing code conversion determined with a bit pattern K1 functioning as a key. An output of the said converter 103 is converted with respect to signal in the same way as the case of the converter group 102 via the n sets of the code converter groups using a key K2 and inputted to the next linear converter. Signals added plural times with the repeated operations like this operation are outputted via an output buffer 104 as scramble signals.

Description

【発明の詳細な説明】 本発明はディジタル・データを・齢もって定められ九キ
ーに依存してスクランブルし、該キーを持九ない者にも
とのデータを入手できないようにするスクランブラーに
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a scrambler that scrambles digital data in dependence on a well-defined key, making the original data unavailable to anyone who does not have the key.

ディンタル・う一夕を第三者に秘臂にtるためκスクラ
ンブルするh法においては、出力の各ビ、トは入力の全
ビットの影11をタけていること(こtlを今恢コ/プ
リートと呼ぶ)が値愛しい。
In the κ-scrambled method to transfer the digital signal to a third party, each bit of the output has a shadow 11 of all the bits of the input (this is now calculated). Called Ko/Preet) is valuable.

なぜなら、コンブリートでなけれa出力が入カビ、トの
1廓にのみ影響を受けるので避にその人力ビットの1部
が推定し+すくなるからである。促釆のスフランフラー
では文献アイ・イー・イー・イートランサクシ,ンス・
オン・コンビ.一ターズ( INIAlii Tran
sactions on Coi+puters ) 
絽Cー28舎lO号747負〜753貞に戦っているも
のかコンブリートである。しかし491m階にもわたっ
てデータをかきまぜなけれにならす、そのためIliL
が複雑すぎる欠点がある。
This is because unless it is composite, the a output will be affected only by mold and g, so it will be easy to estimate a part of the manual bit. In the promotion of Soufrenfleur, the literature I.E.E.
On Combi. Ichitarzu ( INIAlii Tran
actions on Coi+puters)
絽C-28 SH1O No. 747 - 753 It is a combination that is fighting Sada. However, data must be shuffled over 491m floors, so IliL
However, it has the disadvantage that it is too complicated.

本発明の目的は゜、上記の欠点を除いたスクランブラ−
を提供することにある。
The object of the present invention is to provide a scrambler which eliminates the above-mentioned drawbacks.
Our goal is to provide the following.

上記の目的は次の構成から成るスクランプ゛ラーによっ
て達成さわる.すなわちティンタル・データを.変換器
を1段もしくに複数段通過させてスクランブルするスフ
クンプラーにおいて#記変換器は、入力さtlだナイン
タル・データを^叙−の小フロ、りに分解し、各該小プ
ロ、りをキーと呼ばれる前もって定められたビアドパタ
ーンに依存して定まる符号変換器で各々を換し、μ置換
の出力を前もって定められ九鹸形度戻で変換して出方す
る変換器であることを特命とするスクランブラ−である
The above objective is achieved by a scrambler consisting of the following configuration. In other words, tinter data. In the Sufkumpler, which scrambles by passing through one or more stages of converters, the # converter decomposes the input tl ninetal data into ^^ small flows and ri. It is a converter that converts each with a sign converter determined depending on a predetermined bead pattern called a key, and converts the output of μ substitution with a predetermined nine-fold degree return. He is a scrambler with a special mission.

以ト杢発明r(ついて、爽抛偽忙不イ1t″用いて詳細
に説明する。
Hereinafter, the invention will be explained in detail using the phrase ``Sou 抛 false busy fui 1t''.

以)簡単のためティンタル・7一タ1ユバイナリ表現さ
れているものとする。
(hereinafter) For simplicity, it is assumed that it is expressed in Tintal 7-1-1 Binary.

第1図は本発明の実施例V小す回鮎1である。FIG. 1 shows Example V small fish sweetfish 1 of the present invention.

図において5IJri 13 (7,Fi正qpti>
人カl、出力の符号f換器である (n=1,2.・・
・、N、 n=1,2.・・・、n(へ、n は止幣数
))、以)簡単のためl@ =lt ”・=”ln =
/  として欽明する。
In the figure, 5IJri 13 (7, Fi positive qpti>
It is a sign converter for human power l and output sign f (n=1, 2...
・,N, n=1,2. ..., n (h, n is the banknote number)), hereafter) For simplicity, l@ = lt ”・=”ln =
/ I am honored as .

ティンタル・データ(l M :” HX /ビットご
とに地理される。人力され九aX/ビ、トのティンタル
・データは人カバ、ファ101 r lヒ、トすっm−
の)p、りに分けられる。該プロ、夕に各々、千−と呼
はれる藺もって定められたヒケドパターンに、  K位
イチして定まる1人力l出力のn鍮の符号f供養”+1
+8□、・・−+811  からなる符号変換器群11
02(7よって変換される。該変換結果全体は後に述べ
るmlv変侠^璽 を行なう縁形変換器103により更
にf挨される。該−形震侠結果は、前記に@ * 8I
S + ’11 + ”’ r ”In ”よひA、と
同株に定められるKl + ”!1 + ”ffi! 
+ ’・’ * ’言n bよひA、 を用いて史に波
挾場れる。以↑、これt置針N段杓なりfc鮎来管出カ
バ、ファ104に出力する。
Tintal data (lM: "HX / bit by bit.Tinttal data of nine a
) p, ri. Each professional, in the evening, performs a 1000-degree burn pattern called 1,000, with the sign of one person's output determined by 1,000 yen + 1.
Code converter group 11 consisting of +8□,...-+811
02 (7). The entire conversion result is further converted by the edge shape converter 103 which performs the mlv transformation described later. The -shape transformation result is converted as described above.
S + '11 + ``' r ``In `` Yohi A, and Kl + '' defined in the same stock! 1 + “ffi!
+ '・' * 'Word n b yohi A, is used to make waves in history. From then on, this is outputted to the t position needle N stage ladle, fc Ayu coming out pipe cover, and fa 104.

W 形i’−M AH(+−1、2、・−・、 N )
 H1人力をヘクトル憂、出力をベクトルテとすると、 y−:Al釜        (1) で嵌わゼる。ここで@算は2を法とする代叙上で足表す
る。このときA、  にnXj村nX7列の行列と同−
秋できる、ここで札 のヤJと列をj l1liすこの
とき、各Bjk(i”l r 2+”’+ n t k
=1 、2 。
W type i'-M AH (+-1, 2,..., N)
If H1 human power is Hector and the output is Vector, then y-: Al pot (1) will fit. Here, @arithmetic is expressed as a subscript modulo 2. In this case, A is the same as a matrix with nXj villages and nX7 columns.
Autumn, here, when the number J and column are j l1li, each Bjk(i"l r 2+"'+ n t k
=1,2.

・・・、n)  は1を1蘭ずつ含むように定める。こ
のよりなAi  は沢山あるr2第2図は岩形変挨の行
列の1tlWk、n=2 、n=8としたときのA1 
を不しだ凶でめる。vVこおいてuFi省いである。飄
2図の行列は正則でとする。全てのA1  を正則とし
、符号変換器5ij(n=1.2.山、N;j:1,2
゜・・・、n)kl対l質多とすると、本発明の実施例
は全体として1*」l変洪溢となり、僕号器かイチ在す
る。し力)L 、 A l  を正則に、ゴたaδ1t
l対1f換K11Mる必要はない。
. . . n) is determined to include one orchid of 1. There are many Ai's of this type, r2. Figure 2 shows the matrix of rock shape deformation, A1 when 1tlWk, n=2, and n=8.
I hate it. vV is omitted from uFi. The matrix in Figure 2 is regular. Assuming that all A1 are regular, code converter 5ij (n=1.2.mountain, N;j:1,2
゜..., n) If we consider kl vs. l quality, then the embodiments of the present invention will be 1*''l variable and overflowing as a whole, and there will be only one. force) L, A l regular, Gota aδ1t
There is no need to convert l to 1f.

第1図を用いて本発明の動作貯埋を獣明する。The operation of the present invention will be explained using FIG.

Si】(、=l 、2;>=l T21”’l”)は全
てコノブリー トとする。このときA、の定ぬ力から。
Si】(,=l,2;>=l T21"'l") are all conoblyte. At this time, from the undefined force of A.

2攻目のS21 + S!! +・・、S加 の出力バ
イ1す・データは入力バッファ101の各ヒツトの影I
Iを受けているのでコンブ替−トである。前記文献のス
フランフラーでFin = l以外ではフンブリートに
なれず、多くの段数を必要とじ友6従って本実施例は前
記奪形変侠(具体的には後で示すように排他的ms和素
子で構成できる)を用いることにより、前記文献のスフ
ランフラーよりも少ない段数でコンプリートなスフフン
プラーを構成できる。
Second attack S21 + S! ! +..., S addition output data is the shadow I of each hit in the input buffer 101
Since I have received I, I am switching to kelp. In the Suffrenfleur of the above-mentioned document, it is not possible to obtain Humblit except for Fin = l, and a large number of stages are required. Therefore, this embodiment uses the above-mentioned deprivation variant (specifically, as will be shown later, with an exclusive ms sum element). By using a suffen fleur (which can be configured), a complete suffen fleur can be constructed with a smaller number of stages than the sufuran fleur of the above-mentioned document.

本実−例においてコンプリートな!入力l出力符号変換
器に、例えば試行緒誤的に見い出すことができる。n=
4のときの例を4つ、第3区に示す。図において、fl
 は入力OK対して6を出力し、人力lに対しては15
を出力する。
Complete with real facts and examples! An input/output transcoder can be found, for example, experimentally. n=
4 examples are shown in the third section. In the figure, fl
outputs 6 for input OK, and outputs 15 for human power l
Output.

前記キーに、(1−1,2,・・・、N)K依存してれ
−のj入力l出力符号変換器を定めるh法は任意でよい
が%例えにへのようなh法がある。n=4゜n = 1
15として説明する。あらかじめ1blilの符号fl
lI器を定めておき、それを’@ +’+ +・・・、
f、。
The h-method that determines the j-input-l-output code converter depending on (1-1, 2, ..., N)K on the key may be arbitrary, but the h-method such as be. n=4゜n=1
This will be explained as 15. 1blil code fl in advance
Define the lI device and set it as '@+'+ +...
f.

とする、に、を4ビ、トずっ区切る。最初のりp、りの
4ビ、トを24aとしたとき、例えば3ならばS11を
fr3  とする。211目以下のブp、りについても
同様にして8.(J=1.2.・・・116)を定める
、 第4図は1豐形変換の実施例を示す回路図で、簡単のた
め第2図にボしfc竹列に対応する#Ii形変換の実施
例をボしである。前記式(11に第2図の行列を代入す
ると、例えばベクトルと参の第11k分!。
Divide , ni, into 4 bits and toz. If the first paste p, the 4 bits of the paste, and the g are 24a, for example, if it is 3, S11 is set as fr3. Similarly, 8. (J = 1.2...116). Figure 4 is a circuit diagram showing an example of the 1-type conversion. For simplicity, the #Ii type corresponding to the fc bamboo row is An example of the conversion is given below. Substituting the matrix shown in Figure 2 into the equation (11) yields, for example, the 11kth part of the vector and index!

は、ベクトル工の成分”1+”l+”’+”a t−用
いてyl=xle、IxBωx @     15)と
表わせる。ここでeに排他的−瑞相である。11に4図
の第1査目の出力Y+は人力”I+”t+’r”@を用
いて上記の式(5)と同じ式で与えられる、ベクトル蒼
の他の成分も同様である。
can be expressed as yl=xle, IxBωx @ 15) using the vector component "1+"l+"'+"a t-. Here, e is exclusive - auspicious. The output Y+ of the first scan in FIG. 11 and 4 is given by the same equation as the above equation (5) using the human power "I+"t+'r"@, and the other components of the vector A are also the same.

本発明の実施忰口Cおいて異なる1とjK文・1してA
1−λjとすることも町覗であり、またでのとき前1l
cN段のf供のうち1部に他の段で代用することも可能
である。さらに千−’ I + Kf r・・・、K 
 Kついては1つのキーに6からN−の任意の変換を施
してに、 、 K、 、・・・、に、を構成してもよい
0例えは第1図に不しだ構成において811 + 81
1 +・・・。
Implementation of the present invention Different 1 and jK sentences in mouth C・1 and A
1-λj is also a peek into the town, and 1l in front of the other
It is also possible to substitute one part of the f-supply of cN stages with another stage. Furthermore, 1,000-' I + Kf r..., K
For K, one key may be subjected to any conversion from 6 to N- to form , K, ,...0 For example, in the configuration shown in Figure 1, 811 + 81
1 +...

S、   、SNn をコンプリートを満すようケ(あ
ら −1 かじめ定めた装置を用意し、K、f入力としたときのI
Hk目の出力をKi  とする方法は、その1例である
。(fCだし、2 =fi  となるように定めておく
、)ま九符号変換器の入出力の大きさを、一定のlとし
て収用したが、一定でなくてもよい。
Make sure that S, , SNn are complete.
One example is a method in which the Hkth output is set to Ki. (Since it is fC, it is determined that 2 = fi.)Although the magnitude of the input and output of the code converter is assumed to be constant l, it does not have to be constant.

これらO蜜爽は単発f#に含まれる。These O honeysoos are included in the single-shot f#.

以上詳細KW5!、明したように、本発明を用いればデ
ィジタル・データtm*なI11成でフンブリートにス
クランブルすることができるので、データの*mや乱数
発生源に用いて効果が撓めて太きい。
More details KW5! As explained above, by using the present invention, it is possible to scramble digital data tm* in an I11 format, so that when used as a data *m or random number generation source, the effect is distorted and thick.

図l1iiO筒単な駈明 第1−は本発明の実施例を不す回路図であり、II!図
t′1線形変換の行列の1例を小す凶であり、縞3図r
i符号変侠器の一例を示す図であり、第4図は前t’、
*形変換の一実施例′Ik不す回路図である。
Figure l1iiO is a simple circuit diagram 1- is a circuit diagram that does not include an embodiment of the present invention, and II! Figure t'1 is an example of a linear transformation matrix, and the stripe 3 figure r
FIG. 4 is a diagram showing an example of an i code converter, and FIG.
*This is a circuit diagram of an example of form conversion.

図に1dいて、101は入カバ、ファ、102はl入力
−出力符号変換器群、103は線形変換器、104第7
図 1
1d in the figure, 101 is an input cover, 102 is a l input-output code converter group, 103 is a linear converter, 104 is a seventh
Figure 1

Claims (1)

【特許請求の範囲】[Claims] ディジタル・データを、変換6會1段もしくは複数段通
過させてスクランブルするスクランブラ−において、v
I配質換姦は、人力されたディジタル・データを複数−
の小グp、夕に分解し、各−牛プ′口、りをキーと呼ば
れる繭もってyめられたビアドパターンに依存して定ま
る符号変換器で各々変換し、葭変換の出力を前もって定
められた一形変換で変換して出力する変換器であること
を待機とするスクランプ゛ラー。
In a scrambler that scrambles digital data by passing it through one or more stages of six conversion stages, v
I-transformation involves multiple human-generated digital data.
The output of the transform is decomposed into small parts, each of which is converted by a code converter determined depending on the bead pattern called a key, and the output of the transform is A scrambler that waits to be a converter that converts and outputs a predetermined monomorphic conversion.
JP57085967A 1982-05-20 1982-05-20 Scrambler Granted JPS58201436A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57085967A JPS58201436A (en) 1982-05-20 1982-05-20 Scrambler

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57085967A JPS58201436A (en) 1982-05-20 1982-05-20 Scrambler

Publications (2)

Publication Number Publication Date
JPS58201436A true JPS58201436A (en) 1983-11-24
JPH0423854B2 JPH0423854B2 (en) 1992-04-23

Family

ID=13873498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57085967A Granted JPS58201436A (en) 1982-05-20 1982-05-20 Scrambler

Country Status (1)

Country Link
JP (1) JPS58201436A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03128572A (en) * 1989-07-13 1991-05-31 Sanyo Electric Co Ltd Transmitting and receiving method for facsimile broadcast
US5623549A (en) * 1995-01-30 1997-04-22 Ritter; Terry F. Cipher mechanisms with fencing and balanced block mixing
EP0719007A3 (en) * 1994-12-22 1999-06-09 Nec Corporation Small size product cipher apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10279383B2 (en) 2016-10-31 2019-05-07 SSAB Enterprises, LLC Apparatuses and methods for polishing a metal sheet or plate leveler

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4858734A (en) * 1971-11-02 1973-08-17 Ibm

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4858734A (en) * 1971-11-02 1973-08-17 Ibm

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03128572A (en) * 1989-07-13 1991-05-31 Sanyo Electric Co Ltd Transmitting and receiving method for facsimile broadcast
EP0719007A3 (en) * 1994-12-22 1999-06-09 Nec Corporation Small size product cipher apparatus
US5623549A (en) * 1995-01-30 1997-04-22 Ritter; Terry F. Cipher mechanisms with fencing and balanced block mixing

Also Published As

Publication number Publication date
JPH0423854B2 (en) 1992-04-23

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