JPS5818821B2 - PSK signal carrier synchronization method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION 1. Technical Field of the Invention The present invention relates to a carrier wave synchronization method in a demodulation circuit on the receiver side of a PSK (phase shift keying) signal.

2. Background of the technical field of the present invention In wireless telemeters and the like for transmitting measurement data and the like using wireless systems, signal modulation formats have traditionally been FM modulation, FM-FM multiplex modulation, and SS-P.
M modulation etc. are used.

However, in recent years, the digitization of measurement data has been promoted due to the demand for improved observation accuracy of telemeters, and with this, the transmitted signals have also become PCM, and the modulation format of the signals has also changed to PCM.
-PSK modulation has come into practice.

On the other hand, as the demand for radio waves is rapidly increasing, the effective use of radio frequency bands has become an urgent issue, and this issue has also led to an increase in the occupied frequency bandwidth. A modulation method is being considered as a promising method for narrow PCM-PS-.

3 General matters of PCM-PSK modulation system When a carrier wave is directly PSK modulated with a PCM signal, sidebands are generated and at the same time the carrier wave disappears.

5 with a relatively small capacity P-CM signal, for example, a P'CM signal of 10 kilofocus/second (KBIT/5ec).
For example, when a 00MHz carrier wave is modulated by 4-phase PSK,
Sideband waves are generated from around 1.25 KHz on both sides of the carrier wave in response to the PCM signal.

On the other hand, the frequency stability of the transmission frequency (carrier frequency) is generally about 1×10-5 to lXl0-6,
As mentioned above, if the carrier frequency is 500MHz,
The frequency drift in the transmission ladder is 5K) (Z~0.
It becomes 5KHz.

Furthermore, when a superheterodyne wireless receiver is used on the receiving side, the frequency stability of its local oscillator is also on the order of lXl0' to lXl0-6, and the frequency drift in the receiving ladder is 5KHz to 0.
5 KHz, and the total frequency drift of transmission and reception is 10 KHz to IKHz.

4 Description of Prior Art FIGS. 1A and 1B are diagrams 1177 showing the general configuration of a conventional PCM-PSK signal transmitter and receiver.

In FIG. 1A showing the configuration of a transmitter, 1 is a first transmission local oscillation section, 2 is a PSK modulation section, 3 is a second transmission local oscillation section, and 4 is a frequency mixing section (up converter).
, 5 is a transmitting antenna.

In FIG. 1B showing the configuration of the receiver, 6 is a receiving antenna, 7 is a first local oscillation section, 8 is a first frequency mixing section, 9 is a second local oscillation section, and 10 is a first local oscillation section. 2 is a frequency mixing section, and 11 is a PSK signal demodulating section.

The PCM-encoded measurement data is input to the PSK modulator 2 of the transmitter in the NRZ signal format.

A signal subjected to PSK modulation based on the measurement data is input from the first transmission local oscillator 1 to this PSK modulation unit 2, and from the PSK modulation unit 2, a signal PSK modulated using the measurement data, that is, the signal A PSK signal containing data is sent to the frequency mixer 4.

The frequency mixing unit 4 receives the above-mentioned PS from the second local oscillation unit.
A signal for increasing the frequency required for wireless transmission of the K signal is input, and the PSK signal is converted into a high frequency signal by the frequency mixing section 4 and then transmitted from the transmitting antenna 5. .

On the receiver side, the PSK of the radio frequency transmitted from the transmitter
The signal is received by the receiving antenna 6, and this PSK signal is
The frequency mixer 8 converts the signal sent from the first local oscillator 7 into a first intermediate frequency signal IIF, and the second frequency mixer 10 sends it out from the second local oscillator 9. a second intermediate frequency signal 2I based on the signal
After being converted into F, the signal is input to the P'SK signal demodulator 11 and demodulated.

If the carrier wave frequency is 500 MHz, the second intermediate frequency signal 2IF is 1 as described in Sections 3 and 3 above.
It is subject to frequency drift from 0KHz to IKHz.

Further, as mentioned above, in the PSK modulation step, there is no carrier wave, so it becomes necessary to regenerate the carrier wave on the receiver side when demodulating the PSK signal.

This carrier wave is then reproduced by the PSK signal signal section 11.

Next, the PSK signal demodulation section 11 will be explained.

The PSK signal sent from the transmitter side undergoes a phase change depending on the data input to the transmitter, and the PSK signal part 11 has a phase detection circuit, and this phase detection circuit detects the PSK signal. Detects the phase change of PS
It sends out an output that changes + or - depending on the phase of the K signal.

The phase detection function that detects this phase change requires a reference phase signal that is used as a reference for the phase change, but this reference phase signal must match the signal that has undergone PSK modulation on the transmitter side, that is, the carrier wave. However, in order to use it as the reference phase signal, it is necessary to regenerate the carrier wave on the receiver side as described above.

Regeneration of the carrier wave as the reference phase signal is performed based on the sideband wave of the PSK signal without carrier wave sent from the transmitter side.

This carrier wave regeneration circuit is hereinafter referred to as a carrier wave regeneration circuit.

The carrier wave regeneration circuit is usually PLL (phase locked loop)
Constructed using circuits.

A PLL circuit generally consists of a VCO (voltage controlled oscillator), a phase detection circuit, a loop filter circuit, etc.
V
This is a circuit that controls the phase of the output signal of the CO to be synchronized with the phase of the received signal.

Therefore, in this PLL circuit, the VC
The oscillation frequency of O follows.

That is, the range of the frequency change of the VCO is within the range of the frequency change of the received signal sent from the transmitter side and received by the receiver.

In the example given above, the frequency change (drift) of the received signal, that is, the signal input to the carrier wave regeneration circuit, is l0KH.
z ~ IKHz, and the sideband of the PSK signal is IKH
z to several KHz, and the frequency change range of the received signal and the frequency range of the sideband of the PSK signal overlap.

Now, when the receiver is operating and there is no input signal, that is, a transmission signal from the transmitter side, it is not determined which frequency the oscillation frequency of the VCO is within the frequency change range of the input signal.

Therefore, as described above, since the frequency change range of the received signal and the frequency range of the sideband of the PSK signal overlap, when the input signal is input to the PLL circuit,
At that point, a situation arises in which the PLL circuit becomes synchronized to one of the sidebands of the received input signal.

This means that on the receiving side, the frequency of the signal regenerated by the carrier regeneration circuit becomes the frequency of one of the sidebands of the input signal (so-called force lock), and the carrier wave of the correct frequency to be regenerated is not regenerated. If incorrect synchronization is performed, the detection of the PSK signal and the reproduction of input data at the receiving end due to this detection will be inaccurate.

5 Problems with the Prior Art As mentioned above, when the range of frequency changes due to the frequency stability of the local oscillation circuit used in the transmitter or receiver overlaps the frequency range of sideband waves generated by PSK modulation. , in detecting and reproducing PSK signals,
There is a risk that the carrier wave, which is the reference signal, will not be regenerated. To avoid this risk, improve the stability of the carrier wave frequency of the transmitter and the local frequency of the receiver, and reduce the frequency drift of the received signal. Do not fall within the frequency range of the sidebands of the PSK signal.

In the above example, it is necessary to improve the stability of the frequency by more than two orders of magnitude.

Improving frequency stability in this way not only makes the transmitter and receiver themselves very expensive, but also increases the cost of the transmitter and receiver due to high frequency stability.

The power consumed by the receiver becomes extremely large.

6. Purpose of the Invention The present invention was made in view of the problems of the prior art described above, and its object is to provide a receiver and a transmitter with a particularly stable oscillation interval.

Even if an oscillation circuit with normal stability is used without the need for a carrier wave, when the receiver receives a signal that has been PSK modulated by the transmitted wave, that is, data, it is possible to regenerate the normal carrier wave at any time, thereby making it possible to reproduce the data. An object of the present invention is to obtain a carrier wave synchronization method for PSK signals that can correctly demodulate PSK signals.

7 Detailed Description of the Present Invention FIG. 2 is a block diagram showing the main part (carrier regeneration circuit) of the PSK signal receiver according to the embodiment of the present invention, 21 is a first frequency mixing section, 22 is a local Oscillation section, 23 is a second frequency mixing section, 24 is an intermediate frequency amplification section, 25 is a frequency multiplication section, 26 is a frequency discrimination section, 27 is a first filter 28 is a first phase detection section, 29 is a loop filter ,
30 is an OR circuit section, 31 is a voltage controlled oscillation section VC0, 32
3 is a reference signal oscillation section, 33 is a phase shift circuit section, 34 is a second phase detection section, 35 is a second filter, 36 is a lock signal generation section, 37 is a gate circuit section, and 38 is a PSK signal demodulation section. .

PS transmitted wirelessly from a transmitter and whose carrier wave has disappeared
When the K signal is sent to the receiver side, the receiver side converts the above PSK
The signal is first input to the first frequency mixing section 21, and based on the signal from the local oscillation section 22, the PSK signal is converted into the first frequency mixer 21.
It is converted into an intermediate frequency signal 1■F, and further converted into a second intermediate frequency signal 2IF by the second frequency mixing section 23.

The PSK signal converted into the second intermediate frequency signal 2IF is amplified by the intermediate frequency amplification section 24 and then input to the frequency multiplication section 25.

The frequency multiplier 25 multiplies the 2-phase PSK signal by 2,
For 4-phase PSK signals, 4 times or 8 times, 8-phase PS
For example, 8 multiplication is selected for the K signal, and the multiplication number is PS.
It is determined by the number of phases of K modulation.

When the PSK signal is input to the frequency multiplier 25, its sideband wave is converted to a frequency close to the frequency of the carrier wave from which the PSK signal disappeared by the multiplication action of the frequency multiplier 25 corresponding to the phase number of the PSK signal, and the energy is increased. is concentrated near the carrier wave.

The signal output from the frequency multiplier 25 by the above action is input to the frequency discriminator 26, and this frequency discriminator 26 outputs a DC signal according to the deviation of the signal from the center frequency (frequency of the carrier wave to be reproduced). However, this DC signal is input to the voltage controlled oscillation section 31 via the first filter 27 and the OR circuit section 30.

The voltage-controlled oscillator 31 has its oscillation frequency controlled by the DC signal input through the above operation, and supplies its output signal to the second frequency mixer 23 .

As a result, the frequency of the second intermediate frequency signal 2IF of the PSK signal output from the second frequency mixer 23 is defined by the center frequency of the frequency discriminator 26, and is controlled to a frequency near the center frequency.

As understood from this operation, the voltage controlled oscillation section 31 functions as a local oscillation section of the second intermediate frequency signal 2IF.

Outputting from the second frequency mixing section 23, the intermediate frequency amplifying section 2
4. The loop returning to the second frequency mixing section 23 via the frequency multiplier 25, frequency discrimination section 26, first filter 27, OR circuit section 30 and voltage controlled oscillation section 31 is a kind of AFC circuit (frequency automatic control). circuit).

The AFC circuit of this embodiment differs from a normal AFC circuit in that a frequency multiplier 25 is inserted in the loop.

That is, while the frequency control of the conventional AFC circuit is an operation that reduces the frequency deviation to the center frequency, the frequency control of the AFC circuit in this embodiment is performed using a signal having the center frequency. That is, since the carrier wave has disappeared, the above-mentioned AFC circuit is used because it is necessary to assume a signal (carrier wave) with a frequency that should be the center and perform a control operation so that the frequency of the assumed signal is achieved.

Since the phase of a carrier wave in a PSK signal changes depending on a modulating code such as a PCM code, the instantaneous sideband waves of the PSK signal do not have equal energy on both sides of the frequency of the carrier wave, which is the center frequency.

In addition, the frequency discriminator 26 outputs a voltage determined by the sum of energy of sidebands appearing above and below the center frequency as an error voltage caused by deviation from the center frequency, so as described above, the energy distribution is distributed on both sides of the carrier wave frequency. For PSK signals with different characteristics, the AFC operation described above does not completely regenerate the reference carrier wave even though the energy is concentrated in the vicinity of the center frequency by the frequency multiplier 25, and as a result, the PSK signal
In the demodulation operation in the K signal demodulation section 38, the PS
There is a possibility that the PLL circuit inside the K signal demodulation section 38 may synchronize with the frequency of the sideband of the PSK signal and perform an erroneous demodulation operation.

In order to prevent this erroneous demodulation effect, in the embodiment of the present invention, a PLL circuit separate from the PLL circuit of the PSK signal demodulation section 38 is installed.
An LL circuit is configured.

That is, from the second frequency mixing section 23, the intermediate frequency amplification section 24, the frequency multiplication section 25, the first phase detection section 28,
The loop returning to the second frequency mixing section 23 via the loop filter 29, the OR circuit section 30, and the voltage controlled oscillation section 31 is a PLL circuit configured separately from that provided in the αSK signal demodulation section 38 mentioned above. be.

The second intermediate frequency signal 2IF, which is controlled to have a frequency close to the center frequency of the frequency discriminator 26 by the loop of the AFC circuit, is input from the first phase detector 28 into the loop of the PLL circuit.

By the way, the PLL circuit has a synchronized frequency pull-in range (
Hereinafter, it is called a pull-in range.

), and the frequency of the second intermediate frequency signal 2IF is controlled by the loop of the AFC circuit so that the frequency falls within the pull-in range.

Therefore, when the second intermediate frequency signal 2IF is input into the loop of the PLL circuit, the loop of the PLL circuit enters a synchronous state, and the frequency of the second intermediate frequency signal 2IF is supplied via the phase shift circuit section 33. The frequency is regulated by the frequency of the signal from the reference signal oscillator 32.

That is, the signal from the reference signal oscillation section 32 and the signal from the frequency multiplication section 25 are compared in the first phase detection section 28, and the signal from the first phase detection section 28 is determined according to the phase difference between the two signals. The voltage is connected to the loop filter 29 and the OR circuit section 3.
0 to the voltage controlled oscillation section 31, and the voltage controlled oscillation section 31 has its oscillation frequency controlled in a direction in which the output voltage of the first phase detection section 28 disappears.
In the L circuit, the frequency of the signal flowing through the loop is fixed when the second intermediate frequency signal 2IF is controlled to the correct center frequency.

When the phase of this loop is fixed, it is usually called "locked."

The reference signal oscillation section 32 is composed of an oscillation circuit using, for example, a crystal resonator, and has a frequency of 1 x 10-5 to 1 x 10
It sends out a good oscillation signal with a frequency stability of -6, and the oscillation frequency is the frequency of the second intermediate frequency signal x frequency multiplier.
is set to

As described above, the second intermediate frequency signal 2IF becomes a PSK signal centered on the signal that should be the center frequency.

When the PLL circuit is locked to the center frequency as described above, it is detected by the second phase detection section 34 and the second filter 3.
5 and the lock signal generating section 36, the gate circuit section 37 is turned on by the tank signal output from the lock signal generating section 36, and the second intermediate frequency signal 2IF is output to the PSK signal signal section 38. do.

Next, a circuit for detecting that the PLL circuit is locked to the center frequency will be described.

The phase difference between the two signals input to the first phase detection section 28, that is, the signal from the frequency multiplication section 25 (frequency multiplied second intermediate frequency signal) and the signal from the reference signal oscillation section 32, is determined by the PLL circuit. is π/2 when the loop is locked to the center frequency.

Therefore, the loop of the above PLL circuit has a center frequency r
To detect that the signal has been blocked, it is sufficient to detect that the phase difference between the two signals is π/2.

This detection operation is performed as follows.

That is, after the phase of the output signal of the reference signal oscillation section 32 is shifted by π/2 by the phase shift circuit section 33 (the phase shift circuit section 33 shifts the phase of the output signal of the reference signal oscillation section 32 by π/2), The signals supplied to 34 and 34 have a phase difference of π/2 from each other.

) The other signal supplied to the second phase detection section 34 and inputted to the second phase detection section 34, that is, the second intermediate frequency signal 2IF, is multiplied by the frequency multiplication section 25 and is inputted. The second phase detection section 34 detects that the phase matches the phase of the signal supplied from the reference signal oscillation section 32 via the phase shift circuit section 33.

While the phases of the two signals inputted to the second phase detection section 34 are different, that is, while the PLL circuit is not locked to the center frequency, the second phase detection section 34
The output signal is in the beat state of the difference in frequency between the two signals, and no signal is sent to the output side of the second filter 35.

When the phases of the two signals match, that is, the P
When the LL circuit is locked to the center frequency, the second phase detection section 34 outputs a DC voltage of a certain value.

The output of this DC voltage is supplied to a lock signal generator 36 through a second filter 35, and this lock signal generator 36 informs the gate circuit 37 that the loop of the PLL circuit has been clocked to the center frequency. This turns on the gate circuit section 37, and the second
At this point, the intermediate frequency signal 2IF is input to the PSK signal section 38 for the first time.

As mentioned above, the PSK signal signal adjustment unit 38 includes a PLL circuit, and the VCO included in this PLL circuit normally uses a crystal oscillation circuit, and the frequency control range of the VCO is within the PLL circuit according to the present invention. The frequency fluctuation range of the reference signal oscillation section 32, which is an oscillation circuit with the fundamental frequency of
The pull-in range of the LL circuit within 8 is the second intermediate frequency signal 2I.
It is set to a band near the center frequency of F.

To summarize the present invention based on the operation explanation of the above embodiments,
It will look like this:

When the receiver is in operation and a radio wave of a received signal is input, the frequency of this received signal and the local signal (in light of the embodiment, the signal output from the voltage controlled oscillator 31)
An intermediate frequency signal having a frequency that is the difference between the frequencies of is controlled to be near the center frequency of the input signal to.

This operation reduces the output error voltage of the AFC circuit.

As a result of the frequency control of the intermediate frequency signal by the AFC circuit, when the frequency power of the intermediate frequency signal is controlled to the pull-in range of the ψLL circuit, the PLL circuit enters a synchronous state, and the output error voltage of the AFC circuit becomes almost zero. Then, only the PLL circuit is operated by the OR circuit (OR circuit section 30 in the embodiment), and the intermediate frequency signal is regulated to the oscillation frequency of the reference signal oscillation section of the PLL circuit, and the intermediate frequency signal becomes the PSK signal. Controlled within the center frequency of the demodulator.

After controlling in this way, it is detected and the gate is turned on, and only then is the intermediate frequency signal inputted to the PSK signal demodulation section.

In the present invention, the intermediate frequency signal of the PSK signal is input to the AFC circuit and the PLL circuit to control its frequency before being output to the PSK signal modulation section, so that the frequency drift within the receiver is exclusively suppressed. This is due to the frequency drift of the reference signal oscillation section of the PLL circuit.

Now, set the frequency stability of the oscillation circuit in the receiver to 1xlO'
Assume that the frequency of the carrier wave of the PSK signal is 500 MHz, the frequency of the first intermediate frequency signal is 10 MHz, the frequency of the second intermediate frequency signal is 455 KHz, and a 4-phase PSK signal is handled, and the frequency drift is calculated by multiplying the frequency by 8. Let's talk about.

Among the local oscillation sections of the receiver, the first stage local oscillation section has the highest frequency, and in the above specific example, the frequency is 490 MHz.

In the conventional device, the drift in the oscillation frequency of the first-stage local oscillation section results in the drift of the entire device.In this case, the frequency stability of the local oscillation section is lXl0-', so the frequency drift is 5KHz. The drift is quite large.

For this reason, conventionally, a normal crystal oscillation circuit cannot be used in the local oscillation section, and it is necessary to use an oscillation circuit whose frequency stability has been further improved by about two orders of magnitude.

On the other hand, in the present invention, as described above, the frequency drift of the receiver is caused by the frequency drift of the reference signal oscillator related to the PLL circuit.

In the above specific example, the reference signal oscillator (
In the configuration of FIG. 2, the oscillation frequency of the reference signal oscillator 32) is 3640 KH2 because the frequency of the second intermediate frequency signal is 455 KHz and the frequency multiplication is 8 times.

Therefore, the frequency drift is about 36 Hz, which is extremely small, and no special consideration is required to reduce the drift in the oscillation circuit in the receiver.

8. Effects of the present invention As explained in detail, in the present invention, the intermediate frequency signal is
AF with frequency multiplier circuit before input to SK demodulator
By inputting the intermediate frequency signal into the C circuit and controlling the frequency near the center frequency by this AFC circuit to the PLL circuit, the frequency of the intermediate frequency signal is changed to the frequency of the above PS.
Since it can be easily controlled within the pull-in range of the PLL circuit for carrier synchronization of the K demodulator, there is no need to make the oscillation circuit in the receiver of the PSK signal particularly stable, and the frequency stability of a normal crystal oscillation circuit can be easily controlled. (1xlO-5~1xlO
-6) is fully satisfactory, and the power consumed is also reduced.

Furthermore, even in PSK transmitters, stable P on the receiver side
Due to the demodulation effect of the SK signal, there is no need to make the internal oscillation circuit particularly stable, just like in the receiver.
The present invention provides extremely significant effects in terms of stable demodulation of a data transmission system using the PSK modulation method, and in terms of inexpensive configuration and operation of the system.

[Brief explanation of drawings]

FIGS. 1A and 1B are block diagrams showing the configuration of a conventional PSK signal transmitter and receiver, and FIG. 2 is a block diagram showing the main parts of a PSK signal receiver according to an embodiment of the present invention.

Claims (1)

[Claims] 1 Multiply the intermediate frequency signal of the received signal to discriminate the frequency,
An AFC circuit loop that controls the oscillation frequency of the local oscillation section of the intermediate frequency signal using the frequency-discriminated output, compares the phase of the signal multiplied by the intermediate frequency signal with a reference signal, and uses the phase error signal to generate the intermediate frequency signal. A PLL circuit loop that controls the oscillation frequency of the local oscillation section of the signal is arranged between the intermediate frequency signal sending stage and the PSK signal demodulation section, and when the PLL circuit circuit loop is cut off, the intermediate frequency signal is switched to the PSK signal. A carrier wave synchronization method for PSK signals characterized in that the signal demodulation section is manually operated.