JPS58177571A - magnetic disk device - Google Patents
magnetic disk deviceInfo
- Publication number
- JPS58177571A JPS58177571A JP57058096A JP5809682A JPS58177571A JP S58177571 A JPS58177571 A JP S58177571A JP 57058096 A JP57058096 A JP 57058096A JP 5809682 A JP5809682 A JP 5809682A JP S58177571 A JPS58177571 A JP S58177571A
- Authority
- JP
- Japan
- Prior art keywords
- speed
- signal
- acceleration
- smoother
- cylinder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001133 acceleration Effects 0.000 claims abstract description 19
- 230000006870 function Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/48—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed
- G11B5/58—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
- G11B5/596—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks
Landscapes
- Moving Of Head For Track Selection And Changing (AREA)
- Control Of Position Or Direction (AREA)
- Control Of Velocity Or Acceleration (AREA)
- Control Of Electric Motors In General (AREA)
Abstract
Description
【発明の詳細な説明】
発明の対象
本発明は磁気ディスク装置に係り、特にアクセス可動部
の速度制御回路に関する。DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a magnetic disk drive, and more particularly to a speed control circuit for a movable access section.
従来技術
従来の磁気ディスク位置決め系における速度制御は、制
御しようとするアクセス可動部速度を目標点までの残り
シリンダ毎に前もって階段状に決めておき、これに現実
のキャリッジ速度信号あるいは定数値等から作ったシリ
ンダ毎にノコギリ状に変化するスムーズ信号を合成して
速度命令信号とした。しかしこの従来のスムーズ信号は
、速度制御後の現実キャリッジ速度あるいは定数値から
発生させているため階段状速度信号を連続的にできない
欠点があった。Prior Art In speed control in a conventional magnetic disk positioning system, the speed of the access movable part to be controlled is determined stepwise in advance for each remaining cylinder up to the target point, and then the speed is determined based on the actual carriage speed signal or constant value. The smooth signals that change in a sawtooth pattern for each cylinder were synthesized to create a speed command signal. However, since this conventional smooth signal is generated from the actual carriage speed after speed control or from a constant value, it has a drawback that it is not possible to generate a step-like speed signal continuously.
発明の目的
本発明の目的は、残りシリンダに応じて前もって記録あ
るいは決めである階段状速度命令信号および予定加速度
から、連続的に変化する円滑な速度命令信号を提供する
ことにある。OBJECTS OF THE INVENTION It is an object of the present invention to provide a smooth speed command signal that varies continuously from a stepped speed command signal and a predetermined acceleration that are previously recorded or determined depending on the remaining cylinders.
アクセス可動部の速度制御における速度命令はアクセス
糸の能力加速度にもとづいて階段状に決めである。従っ
てこの階段状速度命令を連続にするには、上記アクセス
糸の能力加速度の積分補正で可能であるということに注
目し、能力加速度を記録できるメモリーあるいはハード
ウェア回路を速度制御部に搭載した。The speed command for controlling the speed of the access movable part is determined stepwise based on the ability acceleration of the access thread. Therefore, in order to make this step-like speed command continuous, we focused on the fact that it is possible to make an integral correction of the capacity acceleration of the access yarn, and installed a memory or a hardware circuit in the speed control unit that can record the capacity acceleration.
発明の実施例
本発明の実施される磁気ディスク装置アクセス速度制御
部概要を第１図により説明する。Embodiments of the Invention An overview of a magnetic disk device access speed control section in which the present invention is implemented will be explained with reference to FIG.
磁気ディスク装置の読み書き用ヘッド及びサーボヘッド
（以降アクセス可動部と呼ぶ）を現在位置決めしている
シリンダから次の目標シリンダに移動（以降シークと呼
ぶ）させる時の速度制御たついて動作説明する。The operation of speed control when moving the read/write head and servo head (hereinafter referred to as the access movable part) of a magnetic disk device from the currently positioned cylinder to the next target cylinder (hereinafter referred to as seek) will be explained.
残りシリンダカウンタ１は、目標シリンダと現在シリン
ダの差つまり移動シリンダ量１２をカウンタに記録し、
アクセス可動部の運動開始後に発生するシリンダパルス
（ヘッドがシリンダを越す毎に発生されるパルス）１９
によってその内容を１つずつ減じ残りシリンダ量１３と
して出力する。速度変換器２は、残りシリンダ量１３を
受けて階段状速度命令信号１６を位置の関数として発生
させる。−１加速度変換器６は、残りシリンダ量１３を
受けて速度制御を行っている時の予定加速度信号１４を
位置の関数として発生する。The remaining cylinder counter 1 records the difference between the target cylinder and the current cylinder, that is, the moving cylinder amount 12, in the counter,
Cylinder pulse generated after the access movable part starts moving (pulse generated every time the head passes the cylinder) 19
The contents are subtracted by one and output as the remaining cylinder amount 13. The speed converter 2 receives the remaining cylinder quantity 13 and generates a stepped speed command signal 16 as a function of position. The -1 acceleration converter 6 receives the remaining cylinder amount 13 and generates a planned acceleration signal 14 as a function of position when performing speed control.
スムーザ回路４は、この予定加速度信号を受はシリンダ
パルス１９＠に積分を繰返し、シリンダパルス間の速度
変化つまりスムーザ信号１５を発生する。階段状速度命
令信号１６は、速度命令合成器１７によりスムーザ信号
１５と合成され速度命令アンプ５によって増巾された後
、アクセス可動部を制御する速度命令、信号１８となる
。The smoother circuit 4 receives this planned acceleration signal and repeats integration into the cylinder pulse 19 to generate a speed change between cylinder pulses, that is, a smoother signal 15. The stepped speed command signal 16 is combined with the smoother signal 15 by a speed command synthesizer 17 and amplified by a speed command amplifier 5, and then becomes a speed command signal 18 for controlling the access movable part.
この速度命令信号１８は、エラー了ンブ６．パワーアン
プ７、アクセス可動部の駆動要素であるＶＣＭ（ボイス
コイルモータ）８．速度検出器９及び速度フィードバッ
ク回路１０からなる速度制御ループに供給され可動部速
度２０を決める。This speed command signal 18 is the error signal 6. Power amplifier 7, VCM (voice coil motor) which is the driving element of the access movable part 8. It is supplied to a speed control loop consisting of a speed detector 9 and a speed feedback circuit 10 to determine the moving part speed 20.
以下１本発明の一実施例を第２図により説明する。なお
その動作波形を第３図に示す。An embodiment of the present invention will be described below with reference to FIG. The operating waveforms are shown in FIG.
本回路の主要部は１０２４ビツトのリードオンリーメモ
リー５０．４チヤンネルのアナログスイッチ５１．メモ
リーバッファ用の演算増巾器５２．積分回路を構成する
アナログスイッチ５３．演算増巾器５４及び速度命令ア
ンプ用演算増巾器５５から成立つ。The main parts of this circuit are 1024-bit read-only memory 50.4-channel analog switch 51. Arithmetic amplifier 52 for memory buffer. Analog switch 53 constituting an integrating circuit. It consists of an operational amplifier 54 and an operational amplifier 55 for speed command amplifier.
残りシリンダ量１３は、１０２４ビツトのリードオンリ
ーメモリー５０のアドレス選択を行う。そのアドレスの
内容は２°〜２３の出力を通してアナログスイッチ５１
を開閉する。アナログスイッチ５１は、２°に対してｉ
アンペア、２１に対して２１アンペア、２２に対して４
１アンペア、２５に対して８ｉアンヘアノ電流を出力す
る。メモリーバッファ用演算増巾器５２は、この電流を
電圧に変換する。The remaining cylinder amount 13 selects the address of the 1024-bit read-only memory 50. The content of that address is passed through the outputs of 2° to 23 to the analog switch 51.
Open and close. The analog switch 51
Amps, 21 amps for 21, 4 for 22
Outputs 8i Ancheano current for 1 amp, 25. The memory buffer operational amplifier 52 converts this current into voltage.
以上の動作により残りシリンダ量１３に対応した予定加
速度信号１４が得られる。By the above-described operation, a planned acceleration signal 14 corresponding to the remaining cylinder amount 13 is obtained.
予定加速度信号１４は、演算増巾器５４．積分用キャパ
シタ５６から成る積分器及びアナログスイッチ５３によ
ってシリンダパルス１９ 毎にイニシャライズする放電
回路を通してシリンダ量（シス間の速度変化量つまりス
ムーザ信号１５に変換される。The planned acceleration signal 14 is transmitted to an operational amplifier 54 . It is converted into a cylinder amount (amount of speed change between cis, that is, a smoother signal 15) through a discharge circuit that is initialized every cylinder pulse 19 by an integrator consisting of an integrating capacitor 56 and an analog switch 53.
ここでスムーザ信号１５は１階段状速度信号１６と演算
増巾器５５によって合成され速度命令信号１８になる。Here, the smoother signal 15 is combined with the one-step speed signal 16 by the operational amplifier 55 to become the speed command signal 18.
本実施例によれば、残り・シリンダ位置に対応した既知
加速度を積分して得られた速度変化量を−１これまた同
上既知加速度でもって減速変化している階段状速度信号
と合成することにより連続した円滑な速度信号が得られ
る。この結果１／ ｔ’ Ｍ駆動電流は滑らかとなり、
アクセス可動部に誘起される異常振動を低下させるのに
効果がある。According to this embodiment, the amount of speed change obtained by integrating the known acceleration corresponding to the remaining/cylinder position is combined by -1 with a step-like speed signal that is decelerating and changing with the same known acceleration. A continuous and smooth speed signal is obtained. As a result, the 1/t'M drive current becomes smooth,
This is effective in reducing abnormal vibrations induced in the access movable part.
発明の効果
本発明によれば、速度命令が連続・円滑になるのでパワ
ーアンプ電流に含まれる高周波成分を低下させることが
出来、その結果アクセス可動部の異常振動を低下し得た
。Effects of the Invention According to the present invention, since the speed command becomes continuous and smooth, it is possible to reduce the high frequency component contained in the power amplifier current, and as a result, it is possible to reduce abnormal vibration of the access movable part.
第１図は、速度制御系全体ブロック図、第２図は、加速
度変換器とスムーザ回路部分図、第３図は、スムーザ回
路動作図である。
１・・・残りシリンダカウンタ、２・・・速度変換器。
６・・・加速度変換器、４・・・スムーザ回路、５・・
・速度命令アンプ、６・・・エラーアンプ、７・・・パ
ワーアンプ、８・・・ＶＣＭ（ボイスコイルモータ）。
９・・・速度検出器、１０・・・速度フィードバック回
路。
１１・・・速度フィードバック信号、１２・・・移動シ
リンダ量（ディジタル量）、１３・・・残りシリンダ量
（デジタル量）、１４・・・予定加速度信号、１５・・
・スムーザ信号、１６・・・階段状速度命令信号、１７
・・・速度命令合成器、１８・・・速度命令信号、１９
・・・シリンダパルス、２０・・・可動部速度、５α・
・・リードオンリーメモリ、５１・・・アナログスイッ
チ、５２・・・演算増巾器、５６・・・アナログスイッ
チ、５４・・・演算増巾器、５５・・・演算増巾器、５
６・・・積分用キャパシタ。FIG. 1 is an overall block diagram of the speed control system, FIG. 2 is a partial diagram of an acceleration converter and smoother circuit, and FIG. 3 is an operational diagram of the smoother circuit. 1... Remaining cylinder counter, 2... Speed converter. 6... Acceleration converter, 4... Smoother circuit, 5...
- Speed command amplifier, 6...Error amplifier, 7...Power amplifier, 8...VCM (voice coil motor). 9... Speed detector, 10... Speed feedback circuit. 11... Speed feedback signal, 12... Moving cylinder amount (digital amount), 13... Remaining cylinder amount (digital amount), 14... Planned acceleration signal, 15...
- Smoother signal, 16... Stepped speed command signal, 17
... Speed command synthesizer, 18 ... Speed command signal, 19
... Cylinder pulse, 20 ... Moving part speed, 5α・
... Read-only memory, 51... Analog switch, 52... Arithmetic amplifier, 56... Analog switch, 54... Arithmetic amplifier, 55... Arithmetic amplifier, 5
6... Integral capacitor.
Claims (1)
サーボヘッドを目標シリンダにアクセスしリード・ライ
トを行なわせる磁気ディスク装置において、速度制御過
程の加速度を前もって記録したメモリーないしハードウ
ェアー回路を含む速度命令スムーザ回路を設けたことを
特徴とする磁気ディスク装置。A speed command smoother circuit that includes a memory or a hardware circuit in which the acceleration of the speed control process is recorded in advance in a magnetic disk device that allows a read/write head and a servo head to access a target cylinder and perform read/write operations through speed control and position control. A magnetic disk device characterized by being provided with.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57058096A JPS58177571A (en) | 1982-04-09 | 1982-04-09 | magnetic disk device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57058096A JPS58177571A (en) | 1982-04-09 | 1982-04-09 | magnetic disk device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58177571A true JPS58177571A (en) | 1983-10-18 |
| JPH0243270B2 JPH0243270B2 (en) | 1990-09-27 |
Family
ID=13074417
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57058096A Granted JPS58177571A (en) | 1982-04-09 | 1982-04-09 | magnetic disk device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58177571A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4755892A (en) * | 1984-11-29 | 1988-07-05 | Cii Honeywell Bull | Method of and apparatus for displacing a movable system driven by an electric motor along a given trajectory |
-
1982
- 1982-04-09 JP JP57058096A patent/JPS58177571A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4755892A (en) * | 1984-11-29 | 1988-07-05 | Cii Honeywell Bull | Method of and apparatus for displacing a movable system driven by an electric motor along a given trajectory |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0243270B2 (en) | 1990-09-27 |
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