JPS5817720A - Signal detecting circuit - Google Patents

Abstract

PURPOSE:To use a stable reference voltage with high accuracy as a detection voltage as it is, by selecting one of two different reference voltages with an output level of a differential amplifier. CONSTITUTION:The relation between reference voltages Vr1 and Vr2 given to input terminals 8 and 9 is defined as Vr1, Vr2. When an output terminal of a differential amplifier 4 goes to L, an output terminal 13 of a signal inverting circuit 12 goes to H, a switch 11 is closed, and a voltage of a noninverting input terminal 12 of the amplifier 4 is Vr2. When an input signal VIN is greater than the Vr2, an output 3 of the amplifier 4 keeps L. When the VIN is smaller than the Vr2, the output 3 goes to H and a switch 10 is closed. Then, the voltage at the terminal 2 of the amplifier 4 is Vr1 and the detected voltage of a signal detecting circuit is changed to the Vr1. When the VIN is greater than the Vr1, the output 3 is inverted and restored to the initial L level and the operation is similarly repeated. Thus, a stable reference voltage with high accuracy can be used as a detection voltage of the signal detecting circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal detection circuit suitable for integration that can compare the voltage of an input signal with a detection voltage and detect it with high accuracy.

FIG. 1 shows a conventional signal detection circuit. This circuit has been commonly used in waveform shaping circuits such as 9i Tsuta. 1 is a signal input terminal, that is, a negative phase input terminal of the differential amplifier, 2 is a positive phase input terminal of the differential amplifier, 3 is an output terminal of the differential amplifier,
It's a differential amplifier! .

Six companies each have first and second resistors, and seven companies have a ground terminal. Since positive feedback is applied to the differential amplifier up to t/k, the output 3 is the saturation voltage V, which is the noise level of the differential amplifier.
Alternatively, it becomes a low level saturation voltage V, -. The detection voltage of the signal detection circuit, that is, the voltage of the positive phase input terminal of the differential amplification low, is v+ = -21-vo+ when the output J is vo+, and THr when the output J is V・-.
1+~■”-=5 ears vo-.If the voltage of the input signal V□ is larger than the detection voltage of the signal detection circuit, the output 3 of the signal detection circuit is given as the low level saturation voltage V of the differential amplifier.
・-. Next, when the voltage of the λ power signal V□ becomes smaller than the detection voltage V□- of the signal detection circuit, the output 3 is inverted and becomes the high level saturation voltage V· of the differential amplifier. ′
Therefore, the detection voltage of the signal detection circuit is VTII.Until the voltage of the input signal vxM becomes larger than the detection voltage V□+ of the signal detection circuit, the output 3 of the differential amplifier is not inverted and V@+ It will remain as it is. Next, when the voltage of the input signal V□ becomes larger than the detection voltage V□ of the signal detection circuit, the output 3 of the differential amplifier is inverted to V.-, and the same operation is repeated. Figure 1 shows the output of the signal detection circuit (output of the differential output circuit) when a sine wave input signal is applied.
This shows the waveform. Here, when an AC signal whose maximum amplitude of the input signal is smaller than the detection voltage of the one-signal detection circuit is given, the output 3 of the differential amplifier i is the initial voltage V of the output 3.
It is a foreshadowing that it remains @+ or vo-. As mentioned above, the detection voltage of one conventional signal detection circuit is determined by the saturation voltage of the differential amplifier and the resistance division ratio. However, conventional signal detection circuits have the disadvantage that once the differential amplifier and source voltage are determined, the detection voltage Vt7 on the high level side and the detection voltage V□- on the low level side of the signal detection circuit cannot be set independently. was there.

That is, when the detection voltage on the voltage side of the signal detection circuit is set, the resistance division ratio (first and second resistance values) is determined from the high-level saturation voltage value of the differential amplifier. Therefore, the detection voltage on the low level side is determined by the previously determined resistance division ratio and the low level saturation voltage value of the differential amplifier. Furthermore, when integrating conventional circuits, there have been the following drawbacks. In order to achieve high accuracy in the detection voltage of the signal detection circuit, we needed a resistor with high specific accuracy and a differential amplifier that could obtain the exact saturation voltage as designed. Furthermore, resistance.

Differential amplifiers were required to have characteristics with very little change over time. There are also problems in terms of compatibility between power consumption and reduction of occupied area9. That is, in order to reduce the current flowing through the resistor, a high resistance is required, but a large area is required to integrate the high resistance.

The present invention eliminates these drawbacks with high precision.

The signal detection circuit is constructed using a stable reference voltage source, and will be described in detail below with reference to the drawings.

FIG. 3 shows an embodiment of the present invention, where l is a signal input terminal, that is, a negative phase input terminal of a differential amplifier, λ is a positive phase input terminal of the differential amplifier, 3 is an output terminal of the differential amplifier, and 10. differential amplifier; t is an input terminal for the first reference voltage Vrl (high level side reference voltage); t is an input terminal for the second reference voltage Vrs (low level side reference voltage); 10. // are the first and first switches, 12 is a signal inversion circuit, 13
is the output terminal of the signal inversion circuit. Here vr, >
v. Next, the operation t! of the signal detection circuit according to the embodiment of the present invention! l! I will clarify. Now assume that the output terminal 3 of the differential amplifier≠ is at a low level. The first and second switches 10°// are turned on when the control terminals 3 and 13 are at the no level;
If it is turned off when the output terminal J is at a low level, the voltage at the positive-phase input terminal λ of the differential amplifier is equal to the reference voltage v1. becomes. That is, the detection voltage of the signal detection circuit in this case is v4.

When the amplitude voltage of the input signal VXII is greater than the detection voltage vr of the signal detection circuit, the output 3 of the differential amplifier remains at a low level. Next, input signal V. When the amplitude voltage of , becomes smaller than the detection voltage vr, the output 3 of the differential amplifier is inverted and becomes a high level, and the voltage at the positive-phase input terminal of the differential amplifier becomes equal to the first reference voltage vr0. , the detection voltages Fi and vf1 of the signal detection circuit change. Here, the voltage 3 of the differential amplifier remains at a high level until the amplitude voltage of the input signal vx1 becomes larger than the detection voltage v9. Next, when the amplitude voltage of the input signal becomes larger than vro, the output 3 of the differential amplifier is inverted and returns to the initial low level state, and the same operation is repeated thereafter. Here, when an AC signal whose maximum amplitude voltage of the input signal is smaller than the detection voltage of the differential amplifier is applied, the output 3 of the differential amplifier remains at the initial high level output - or rather, the low level output.

Therefore, since it operates as described above, a highly accurate and stable reference voltage can be used as it is as a detection voltage. Here, a highly accurate and stable reference voltage is fully achievable with current integrated circuit technology, and differential amplifiers, switches, and signal inversion circuits can be easily integrated, so the signal detection circuit of the present invention is integrated. It can be said that this circuit is suitable for Furthermore, since the present invention does not use a resistive element unlike the conventional circuit shown in FIG. 1, it is advantageous in reducing power consumption.

FIG. 1 shows another embodiment of the present invention, and the same parts as in FIG. 3 are designated by the same reference numerals. l group is a buffer circuit, lj and ll are the reference voltages of the third and third groups, respectively, 17 is the output of the buffer circuit, and λ' is the terminal from which the positive phase input terminal of the differential amplifier is taken as an output. The operation of the circuit in FIG. 3 except for circuit t- is exactly the same as the circuit operation in FIG. 3 described above, and the details will be omitted. The buffer circuit /F is driven by the third reference voltage vr and the third reference voltage vr4, and operates so that the output amplitude voltage of the buffer circuit is v4 on the high level side and vr4 on the fourth level side. However, V, 8
＞V, . In other words, such a buffer circuit can be easily realized with a 0M08 circuit. Therefore, since the signal detection circuit is configured in this way, by using the highly accurate and stable third and first reference voltages, a waveform-shaped output with a constant amplitude is output from the output 17 of the buffer circuit. can get. A waveform-shaped output with a constant amplitude is also obtained from 2'.

There is an advantage that the voltage can be used as it is as the detection voltage of the signal detection circuit. Further, by using the circuit of the present invention and configuring it as shown in Fig. 3, a highly accurate and stable waveform shaping circuit can be obtained.

Furthermore, since there is no resistance component unlike conventional circuits, there is an advantage that a signal detection circuit with low power consumption can be integrated. The nine-waveform shaping circuit using the present invention can be applied to limiter and detector circuits of PB (button button) receivers, and has high performance P
B receiver can be realized, and LS of PB receiver can be realized.
0, which is an effective circuit for I

[Brief explanation of the drawing]

Figure 1 shows the conventional signal detection circuit, Figure 2 shows the output waveform of the conventional signal detection circuit when a sine wave input signal is given, and Figure 3 shows the output waveform of the conventional signal detection circuit when a sine wave input signal is given.
The figure shows a signal detection circuit according to the present invention, and the qth diagram shows a signal detection circuit according to another embodiment of the present invention. l...signal input terminal, 2...positive phase input terminal of the differential amplifier, 2'...terminal from which the positive phase input terminal of the differential amplifier is taken out as an output, 3...output of the differential amplifier terminal, V
...Differential amplifier, j...First resistor, 6...Second
resistance, 7... ground terminal, r... first reference voltage,
Second reference voltage, 10...first switch, ll
...Second switch, signal inversion circuit for l, 13...
・Output terminal of signal inversion circuit, lg buffer circuit, lj
...Third reference voltage, /J...No. 1 reference voltage, 1
7...Buffer circuit output. Designated Agent Quo I Senya 2 Diagram

Claims (1)

[Claims] It has a differential amplifier in which a signal input is added to the negative phase input terminal of the differential amplifier, and selects and supplies one of two different reference voltages to the positive phase input terminal of the differential tank. a switch for selecting a high-level reference voltage from the two different reference voltages when the output of the differential amplifier is at a high level; A signal detection circuit comprising a circuit for controlling a switch tube so as to select a reference voltage on the four-level side from among different reference voltages.