JPS58175355A - Facsimile device - Google Patents

Abstract

PURPOSE:To increase the secondary scanning speed and to shorten the scanning time, by inserting a charge transfer element between an image pickup element and an amplifier, and setting the transfer speed from the image pickup element to the charge transfer element higher than the transfer speed from the transfer element to the amplifier. CONSTITUTION:The picture information from an original is stored in a CCD image sensor 3 which functions as a solid state image pickup element. Then the delivered picture information is transferred to a picture signal amplifier 4 via a CCD analog processor 6 which functions as a charge transfer element. The transfer clock synchronizing with the secondary scan synchronizing pulse given from a clock control circuit 7 is supplied to the sensor 3 and the processor 6 respectively. The period of the transfer clock is divided into two parts, and the transfer speed of the electric charge from the sensor 3 to the processor 6 is set higher than the transfer speed from the processor 6 to the amplifier 4. Thus the overall secondary scanning speed is increased to shorten the scanning time. Then the outut picture information given from the amplifier 4 is compared with the reference voltage by a comparator 5.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a facsimile apparatus in which a shift pulse of a solid-state image sensor is synchronized with external timing.

[Technical background of the invention]

In general, facsimile machines are constructed using a solid-state imaging device such as a CCD image sensor in the imaging section, and the solid-state imaging device of the COD image sensor must have a constant effective storage time. It also has usage constraints and characteristics such as the shift start pulse that separates this effective accumulation time starts reading out the image information accumulated one section before.

[Problems with background technology]

Incidentally, in a facsimile machine using such a solid-state image sensor, it is necessary to synchronize the storage start timing of the solid-state image sensor with the sub-scanning, and there are two conventional methods for achieving this synchronization. The first method is a method in which a synchronizing pulse for sub-scanning is formed in synchronization with a shift start pulse of a solid-state image sensor. According to this method, the sub-scanning is controlled according to the effective storage time of the solid-state image sensor, so the timing of starting accumulation of the solid-state image sensor is synchronized with the sub-scanning, but due to changes in the sub-scanning speed due to lateral causes. The disadvantage is that it cannot be supported. The method @2 is a method in which the shift start pulse of the solid-state image sensor is synchronized with the sub-scanning four-side pulse generated in response to the pongee scanning. According to this method, even if the sub-scan speed changes, it is possible to maintain synchronization with the shift pulse, but the sub-scan scan time (child 7F: interval between eclipse pulses) becomes longer. If these relationships with drawbacks are explained using drawings, they become as shown in Figure 1 to the third factor. That is, the image information detection section in a conventional facsimile machine is as shown in FIG. The image signal is amplified by the image signal amplifier 4, and the good signal is compared with a predetermined reference voltage by the comparator S, and converted into a binary signal representing black and white. ing. FIG. 2 shows a timing chart when using the method of glycoside 1 in the circuit shown in FIG. 1, and FIG. (b) shows the nine sub-scanning synchronizing pulses synchronized with this shift start pulse, and FIG. 2(e) shows the accumulation time of the CCD image sensor 3. FIG. As is clear from FIG. 2, the scanning time of the sub-scanning in the first method is spread out over the storage time of the CCD image sensor 3.

FIG. 3 shows the application of the method @2 to the nine circuits shown in FIG. 1. In Fig. 3, Fig. 3 (1) is the sub-red scan synchronization pulse, Fig. 3 (b) is the shift start pulse of the CCD image sensor 3, and Fig. 3 (e) is the effective accumulation time of the CCD image sensor 3. Figure 3 (Φ is the image signal reading time from the COD image sensor.

As is clear from FIG. 3, according to this method, it is necessary to provide separate storage time for the CCD image sensor 3 and readout time from the CCD image sensor 3. In this case, the scanning time at the maximum sub-scanning speed is CCU image sensor 3I:D is the sum of storage time and readout time. By the way, as mentioned earlier, the storage time of the CCD image sensor 3 is fixed, and the processing time of the image signal amplifier 4 is also fixed, so the amount of time for the image signal from the CCD image sensor 3 is 9 hours 4.
cannot be shortened to However, the second method has the disadvantage that the maximum sub-scanning speed cannot be increased as compared to the first method.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to enable a facsimile machine using the second method to have a sub-scanning speed as high as that of a facsimile machine using the first method.

[Summary of the invention]

According to this invention, there is a limit to the processing speed of the image sensor, but focusing on the fact that the solid-state image sensor has a transfer capacity that exceeds this processing speed, the solid-state tank weight is -+1+
++/'l IN v"t wfuichiriki1ii7f100
In addition to inserting a charge transfer element, the maximum sub-scanning speed is increased by increasing the transfer speed of image information from the solid-state image sensor to the charge transfer element and from the charge transfer element to the image signal amplifier. I have to.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 4 shows one embodiment of the present invention, and the image signal processing portion is shown corresponding to the conventional circuit shown in FIG. In FIG. 4, parts that perform the same functions as those of the conventional circuit shown in FIG. 1 are given the same reference numerals for convenience of explanation.

In this embodiment, CO is generated between a CCD image sensor 3 that accumulates image information from a document (not shown) and an image signal amplifier
A D analog processor 6 is inserted, and a clock control circuit γ is provided for supplying a transfer signal synchronized with the sub-scanning synchronizing pulse to the COD' image sensor 3 and the COD analog processor 6. Here, C
The CD analogue processor 6 is a type of analogue processor and has analog shift stages for one line.

The clock control circuit 7 generates a high-speed transfer lock only when transferring one piece of information from the CCD image sensor 3 to the COD analog processor 6 in synchronization with the scan synchronization pulse. can be easily configured using a counter or the like. In this example, C
OD image 1 sensor 3 to CCD analog pro 7t6
When transferring image information to ll1ItI! , the frequency is set to 5fK, which is five times the normal wave number f. Now, the operation of the embodiment shown in Fig. @4 will be explained using the timing chart shown in Fig. @5. ! Figure 5 (- indicates an example of a sub-scanning synchronizing pulse; the blackout control circuit 7 controls the CCD image sensor 3 in synchronization with this sub-scanning synchronizing pulse.
At the same time, a COD shift start pulse as shown in FIG. 5(b) is supplied, and in synchronization with this COD shift start pulse, a nine-shift lock is supplied to the CCD image sensor 3 and the COD analog processor 6. Figure 5 (e
) indicates this transfer switching, in which a normal clock with a frequency f is generated in a high level section, and a high speed clock with a wave number of 5f is generated in a -1 level section. CCD image Ryunsa 3Fi, trench-j'? Image information is accumulated from a document (not shown) using a normal clock of frequency f generated by the lock control circuit 7. This time is shown by the effective storage time shown in Figure 5 (T1 at the top).Next, the clock signal generated by the clock control circuit 7 is switched to a frequency of 5f, and this high-speed clock is used to control the CCD.
Image signals are transferred from the image sensor 3 to the CCD analog processor 6. This transfer time is shown in Figure 5(d).
and time T, in relation to FIG. 5(•). CCD
When the transfer of the image information from the image sensor 3 to the CCD analogue processor 6 is completed, the clock signal generated by the clock control circuit 7 is returned to the frequency f, and the image information stored in the CCDCD analogue processor is returned to the frequency f by the click of this frequency f. is transferred to the image signal amplifier 4. This transfer time (reading time) is indicated by time T in Figure 5 (-).

The scanning time with such a configuration is shown in Figure gg2.
Comparing the scanning time with the method of
-)7. Becomes L-4. That is, if the scanning time according to the conventional first method is 1, the scanning time to which this invention is applied is 5, and the scanning time according to the first method can be shortened to almost 100%. Note that if the frequency ratio of the normal clock and the high-speed clock during transfer lock is set to 1:20, the scanning time can be made close to that of the @l method. In the above embodiment, a CCDX element was used as the solid-state image sensor and the charge transfer element, but the configuration can be made in the same manner as 11ff even if a BBD element is used.

〔Effect of the invention〕

As explained above, according to the present invention, in a facsimile machine in which the shift start pulse of the solid-state image sensor is synchronized with the sub-scan synchronizing pulse, the scanning time can be significantly shortened. It is possible to speed up the installation.

4. 1W "Simplified 07 Theory" ■@1 Figure is the 4th diagram demonstrating the conventional example. Figures 2 and 3 are timing charts explaining the operation, and Figure 4 is one implementation of this invention. A circuit diagram explaining an example, and Figure @5 are timing charts explaining the operation.

DESCRIPTION OF SYMBOLS 1... Original document, 2... Lens, 3... CCD image sensor, 4- III signal amplifier, 5... Comparator, 6- CCDCD analog pulser, 7- Clock control circuit.

Claims (2)

[Claims] (1) Using a solid-state camera gII card for the image signal input section,
In a facsimile @den in which the shift start pulse of the armpit solid-state imaging device is synchronized with the sub-scanning synchronization pulse, the spindle solid-state imaging #I device and the IT (! A charge transfer element is inserted between the charge transfer elements, and the transfer speed from the front solid-state sensor g1 to the charge transfer element is set to 1ji1!
! A facsimile digging device characterized by a transfer speed higher than that of a signal amplifier. (2) The seven-axis electric power device according to claim (1), wherein the solid-state image sensor is a CCD image sensor, and the charge transfer device is a COD analog printer.