JPS58174A - Monolithic hybrid thyristor - Google Patents

Abstract

PURPOSE:To miniaturize a hybrid thyristor for reduction in size and weight of an application circuit device using the miniaturized version by a method wherein a main thyristor and an auxiliary thyristor are formed in a single semiconductor substrate. CONSTITUTION:A P type isolating region 31 is diffusedly formed in the central portion on a side of an N type Si substrate 30. The whole of said surface of the substrate 30 is covered with a diffusedly formed P type layer 31 and the other side is covered with a diffusedly formed P type layer 33 wherein an N type layer 34 is formed, for the building of a PNPN four layer structure. Next, a groove is provided reaching the region 31 from the central portion of the layer 33. The groove is then coated with a glass passivation film 39. The groove and the region 31 divide the substrate 30 into two sections each of which is again provided with grooves 41 reaching the substrate 30 from the both sides to be respectively coated with glass films 38. One of the two sections is used as the primary thyristor and the other as the auxiliary thyristor.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention was constructed by externally connecting two shaped thyristors to one semiconductor substrate. However, this requires a large mounting volume, so the two thyristors mentioned above are formed in the form of individual chips, and then
By incorporating these into a single cage to create a composite system, the system can be made more compact.

Figure 1 is a cross-sectional view showing the configuration of this conventional composite thyristor, in which (1) is the main thyristor, (2) is the auxiliary thyristor, and the main thyristor (1) is a p-type emitter (p, ,
) layer + lIl, n-type base (nB□) layer ai, p-type pace space Q) layer ◇ barrel and n cedar emitter (n)
It consists of a layer o curve, p, 1 layer (11) has 1 1i#1mJal, n Imj14) has a cathode 0'
l r 9311 layer (a gate electrode 1 σ force is formed in the first layer, and an anode terminal A, a cathode terminal Kl, and a gate terminal G1 are drawn out, respectively.a8) It is a well-known glass passivation film. The auxiliary thyristor (2) has exactly the same structure, consisting of p1□1 layer'lJ r n B2 layer (a), p, 2 layer @ and nmz J-Trout, p
, the second layer (b) has an anode @l nN2 layer ■ has a cathode) +
A gate electrode (B) is formed in the pBz layer nK, and 2.
Gate electrode G2 is drawn out. @ is a glass passivation film. The main thyristor (1) and the auxiliary thyristor (2) are housed in one package as shown by the dashed line in the figure.

However, in recent years, strobe devices have become smaller and lighter.
There is a demand for lower prices, and there is a particular demand for small composite thyristors for use in camera-embedded strobe devices that emit relatively little light.

This proposal (7) was made in view of the above points, and aims to provide a compact composite thyristor by forming two thyristors in one semiconductor substrate.

FIG. 2 is a sectional view showing an embodiment of the present invention, in which the same or corresponding parts as in the conventional example are designated by the same reference numerals.

The composite thyristor (3) of this embodiment has a main thyristor and an auxiliary thyristor formed on a single semiconductor substrate, with an anode (7) in common, and the main thyristor has a common anode (7).
Layer (preference)

p layer 03) and n11 layer (consisting of 4-layer structure of 141, nm 1 layer BB! cathode formed on the surface (from 1 to 1 is the cathode terminal, T
'+fa++3) A gate terminal is drawn out from the gate electrode 0η formed on the surface. Auxiliary thyristor is pl
□Layer Qυ, n, 2nd layer (a).

pB2MH! It consists of a four-layer structure of 3 and nm 2 layers (c), from the cathode (e) formed on the surface of the n, 2 layer (c), 2 is formed on the surface of the p, 2 layer (c) to the cathode terminal. A gate terminal G2 is drawn out from the gate electrode. The exposed edge of each pn junction is passivated by a glass film (1) and -, and between the n ss layer (1) and the nm z layer 4 is a p-type separation diffusion layer (3υ and the glass film This monolithic composite thyristor (3) is also housed in a package as shown by the dashed line in the figure, and connected to each terminal A e K1 #!
eGl and G2 are drawn out.

Next, the manufacturing method of this example will be outlined. Figure 1113 (
A) to (E) are cross-sectional views showing the state at the main stages of the manufacturing process. First, as shown in FIG. is selectively diffused to form a p-type isolation diffusion layer 6.

Next, as shown in FIG. 113 (b), by a well-known diffusion method, a p-type layer (31a) is formed on the entire first main surface, a p-type layer (31a) is formed on the entire second main surface, Further, an n-type layer is formed on a part of the surface of the p-type layer (toward) to form a p-n-p-n four-layer structure. Next, as shown in Figure 3 (C), the n-type layer (
A mesa groove (b) extending from the surface to the n-type layer (2), the p-type layer (2) below it, the n-type layer (2) below it, and the p-type isolation diffusion layer (b) approximately in the center of the n-type layer (b). A) forms an n-type layer ■.

The p-type layer (to) and the n-type layer (to) are each divided into two parts. Next, as shown in Figure 3, p-type layers (2) on both main surfaces and n-type layers from the corresponding surface parts of the rock are placed at positions a required distance away from the mesa groove (turn) to the left and right, respectively. A mesa groove (41) is formed through each pn junction to such an extent that a portion of the (forming layer) remains. Then, as shown in FIG. 3 (E), glass passivation films (1) and (2) are applied to mesa 1ll- and (41), respectively, and the mesa groove (41) is divided by dicing at the X-X end of the mesa groove (41). , the p-type layer (31a) is divided into two 2M0 layers (II) and the p,2 layer (2), and the n-type layer (2) is divided into an n m I layer a4 and an nm two layer (a), The p-type layer is p
, divided into 1 layer α field and I'12 layer @, and n-type layer -
is divided into an n□ layer and an nmz layer, which constitute a main thyristor (1) and an auxiliary thyristor (2), respectively. By attaching each electrode and terminal to this and performing packaging, the composite molythic thyristor of this embodiment shown in FIG. 2 is obtained.

In the embodiments described above, the p-gate thyristors are configured with a common anode, but by reversing the semiconductor conduction type of each part, it is also possible to configure the n-gate thyristor with a common cathode. In addition, Mesa Unopatsipation includes:
Nifes other than glass.

Silicon oxide, silicon nitride, etc. can also be used.
Furthermore, by packaging not only the composite thyristor but also peripheral circuit components together, the miniaturization of the applied device will be facilitated.

Of course, this composite thyristor can be used not only for strobe devices but also for a wide range of other uses.

As explained above, in the present invention, since the main thyristor and the auxiliary thyristor are formed in one semiconductor substrate, the composite thyristor can be downsized, and the applied circuit device using the same can be made smaller and lighter.

It is possible to lower the price and expect improved reliability.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the structure of a conventional composite thyristor, and FIG. 2 is a sectional view showing the structure of an embodiment of the present invention. 3
Figures (A) to (E) are cross-sectional views showing the situation at the cage stage of the manufacturing process of this example. In the figure, ('') is the pm layer (first conduction type emitter layer) of the first thyristor, 01 is the n layer (first part of the second conduction type paste layer) of the first thyristor, and the Q field is the first conduction type emitter layer. Cyrisk PM layer (first part of first conductivity type base layer)
, 04 is the n1 layer of the first thyristor (the part 1 of the second conductivity type Niotsu layer), (2) is the 91 layer of the irises 2 thyristor (
(1st conduction type emitter), (2) is n1 of the second thyristor
layer (the second part of the second conductivity type base layer), the ring is the 91st layer of the second thyristor (the 112th part of the first conductivity type base layer)
, (2) is the n1 layer of the second thyristor (part 2 of the second conductive emitter layer), (b) is the separation area, (31a) is the area before separation of both thyristors, (to) and (to) are respectively p1 layer, pn1 layer, pm layer and n1 layer, the fold is a mesa groove, (
(to) is a glass passivation film. In addition, the same reference numerals in the figures indicate the same or equivalent parts. 0 Agent Kudzu needle wound - (1 other person) 11 Figure 2 ゛31'21

Claims (3)

[Claims] (1) It has a four-layer semiconductor structure in which a first conductivity type emitter layer, a second conductivity type base layer, a first conductivity type paste layer, and a second conductivity type emitter layer are stacked in sequence, and the first conductivity type A separation region of the first conductivity type that protrudes into the second conductivity type base layer from a part of the emitter layer, and a portion of the surface of the second conductivity type emitter layer corresponding to the separation region that extends into the second conductivity type emitter layer. a mesa groove is formed passing through the layer, the first conductivity type paste layer and the second conductivity type base layer and reaching the isolation region; A first thyristor comprising portions of each set 1 of the second conductivity type base layer, the first conduction type space layer and the second conduction type emitter layer, which are electrically separated; and a second thyristor comprising portions of each set 2. A monolithic composite thyristor consisting of a thyristor and a thyristor. (2) A monolithic composite thyristor according to claim 1, paragraph 1, characterized in that the inner surface of the mesa groove is coated with 75 layers of tsusivation film. (3) A monolithic composite silice according to claim 2, characterized in that a glass film is used as the passivation film.