JPS58172015A - Generating circuit of saw-tooth wave - Google Patents

Abstract

PURPOSE:To reduce variances in oscillation frequency and amplitude by putting bias circuits of transistors (TR) in one and making a Darlington connection among them for reducing variation in bias voltage with a base current. CONSTITUTION:Three couples of TRs Q53 and Q54, Q58 and Q59, and Q63 and Q64 are connected on Darlington basis and their emitters are connected in common; and a bias voltage originating from the divided voltage obtained from resistances R66-R68 is impressed to the bases of the Q59 and Q64. When the power source is turned on, the TRs Q56 and Q57 turn on to charge a capacitor C02 through a resistance R53. When the potential of the C02 rises, the Q53 and Q54 turn on and a voltage drop across an R55 causes the Q55, Q66, and Q61 to turn on and the Q56 and Q58 to turn off to stop charging the C02, deciding on the upper limit of an oscillation voltage. Then, the discharging of the C02 starts through an R02 and when the potential of the C02 falls, the Q54, Q55, Q60, and Q61 turn off to stop the discharging of the C02, deciding on the lowest point of the oscillation voltage. Then, the Q56 turns on again to charge the C02, and above-mentioned operation is repeated.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sawtooth wave generation circuit, which has the following advantages: 1) Small temperature coefficient against temperature drift of oscillation frequency when integrated circuit 2) Small variation in coefficient with temperature In addition, the present invention provides a sawtooth wave generation circuit which is extremely good against variations in oscillation level and koga frequency ridges due to manufacturing reasons.

Various books have been developed for sawtooth wave generation circuits used in vertical deflection circuits for TVs that oscillate at a frequency of 50Hz or 5QHz, PLL circuits at low frequencies, etc., but variations in free-running oscillation There wasn't much that I was satisfied with. For example, an example of this type of oscillation circuit that is currently in practical use is shown in Figure 1. In this oscillation circuit, a capacitor and a resistor are used as usual to determine the oscillation time constant. (This uses the charging and discharging of a capacitor, but in order to set the limit level for charging and discharging, the base of Qss is Pressure is applied to the terminal of charging/discharging capacitor Co1, and the other two transistors Q
14 * Ql? Reference biases that determine the upper and lower limits of the oscillation waveform are independently applied to the bases of the oscillation waveforms. Its value is 2/3 Vcc at Vu point.

The Vsl point is selected to be 1/3 Vcc (Vcc is the power supply voltage).

Next, the operation of the oscillation circuit shown in FIG. 1 will be explained based on the drawings.

First, when the ml source voltage Vcc is applied, a predetermined bias voltage is immediately applied to the base of the transistor Q14*Qty by resistance division, but the capacitor C
・A voltage drop is generated across the ROI due to a photocurrent based on the time constant of the resistors Rol and COt, and a voltage obtained by subtracting this from Vcc is applied to both ends of the resistor 1. Therefore, the capacitor Cot
The potential across both ends gradually increases from 0 to C.! It increases according to the time constant of ×Ro1. When the base voltage of transistor Q13 approaches the base voltage Vas of Ql4, Ql begins to conduct, causing a voltage drop on resistor RISK. Due to this voltage, current begins to flow through the transistor Qss, and the voltage drop across the resistor ant increases. As a result, when the transistors Qso + Qts start conducting at the same time, the transistor Qll connects with the pace bias resistance of Ql4, so the first place in the V smell is unreliable, and the transistor QI4 is cut off. . Therefore, transistor Q
There is momentum in tx <1! The current flows through the transistor Qss
+ Qss becomes completely conductive. Thus capacitor C
Is the charge seen in o1 the resistor RB? and transistor Q,.

discharged through. The voltage Vs2 of COI decreases with time based on the time constant of capacitor Cot and R1γ,
As the voltage approaches Vsl, current gradually stops flowing to Ql2. Therefore, the transistor Qls
s Ql. , Ql3 simultaneously become close to the cutoff.

When this happens, the transistor Qtt starts to conduct, causing the transistor Qss + Qs@ to conduct, and the current flowing into the transistor Qll, albeit decreasing, is lost, so that the current cut-off of the transistor Qtm + Qll suddenly occurs. Transistor Q1・tQtm
When Qty becomes cutoff, the pace potential of transistor Q14 rises rapidly and returns to its original state, so transistor Qty
is also cut off, and at the same time, capacitor Cow starts charging again through resistor R.1. This caused him to exhibit the aforementioned behavior.

The rope oscillation is repeated.

However, in the first i&times 1, the base bias circuits of transistor Q14 *Q* and Qxs that constitute the oscillation circuit are independent, so even on the same chip, each transistor, resistor, etc. Due to the effects of minute variations in the elements, the bias point is not constant and the variations are large, resulting in variations in the oscillation frequency, which necessitates selection during manufacturing or adjustment using external constants. On the other hand, due to variations in the base current of each trunk xp due to variations in hFK of each transistor element, the portion of the voltage drop of the bias resistor that is based on the base current varies, causing variations in the excavation frequency and its temperature variation coefficient or wrinkle amplitude. It has a big drawback. Furthermore, if the bias resistance is made small to ignore the base current and a sufficient circuit current is allowed to flow, there will be two biases and the circuit current will flow in vain.

SUMMARY OF THE INVENTION An object of the present invention is to provide a sawtooth 9-wave generation circuit that has small variations in the number of oscillation waves and its amplitude, and also has a small temperature coefficient.

The circuit according to the present invention combines the bias circuits for obtaining the bias voltage of each transistor into one, and further reduces the voltage drop of the bias resistor due to changes in the base current. In order to significantly reduce the current, the transistors are connected in Darlington connection, and at the same time, the deterioration of temperature characteristics due to Darlington connection is also taken care of, and in principle it is an oscillation circuit that does not have a thermal coefficient at the excavated frequency. was able to form.

FIG. 2 summarizes the biases associated with the present invention in one place, and the temperature compensation of the current is omitted to simplify the explanation. Next, FIG. 2 will be explained. Three Darlington-connected transistor pairs (Qis-Qu) -
The emitters of (Qss, Qse) - (Ql1-Q84) are commonly connected, and the transistors QSI-Q@
4 applies a voltage of W from the bias circuit via a resistor @. The bias circuit receives the voltage across the Zener diode DW at the pace of the transistor Q.6, and divides the voltage between the resistors R@a, l(, , I(, , , ) to obtain the bias voltage. Transistor Q@
, in addition to Q-'s pace. On the connection of each of the transistors in the darlington group 93, for example, the emitter of the transistor Qss is connected to the pace of the transistor Q@4 through the resistor 1'tsa, and the transistor Q@4
The emitters of Qss * Qss of the other set are commonly connected. Other transistor pairs (Q-9Q
Similarly, resistance R1B is applied to (Qu, Q@4)
! , R64 are connected.

Next, the operation will be explained. When a power supply voltage is applied to the Vcc terminal, capacitor C- is charged through resistor Ru. Transistor Qs. connected to resistor R13.

In the QrI transistor, when the power is turned on, the transistors Qss and Q are activated, so current begins to flow as one unit. The potential across the capacitor COt is R,
It gradually rises from O with a time constant determined by ,XC, , so
Initially, it is low and the transistor Qist Qu is in an off state. Therefore, transistor Q@s is also off. Therefore, since the transistor Q.1 is also off, all of the collector current a of the transistor Qiy flows into the pace of the transistor Qss and suddenly attempts to charge the capacitor Cot.

Next, as the charging of the capacitor Cow progresses, the potential at both ends rises, and the common voltage determined by the transistor Qgs increases the pace potential of the transistor Qss to the extent that it exceeds the potential determined by the transistor Q@a with respect to the potential of the ivy. When this happens, transistor QI4 rapidly begins to conduct, and conversely, transistor Qss becomes cut-off. In this case, the potential of the resistor) tss drops due to the collector current of the transistor QI4, and as a result, the transistor Qss
conducts. Therefore, the voltage drop across the resistor R,- increases,
When the transistors Qmo-Qst fr are enabled to be driven, they start conducting. Then, the current flowing through the transistor Qis + Qss is absorbed by the transistor Q・1°QH, and becomes Qs−tQi
− quickly reaches the cutoff. At the same time, capacitor C@
l stops charging. The voltage across the CD at this moment determines the upper limit level of the oscillation voltage. When the capacitor C (11) stops charging, the Marugame load stored in Ca11 starts discharging through the resistor oat.As the discharge occurs, the potential across the capacitor C11 decreases, but the potential at the common emitter becomes the same as the transistor Qa. Transistor Q14 continues to conduct until the emitter potential determined by
During this period, transistor Qi is cut off, and when the emitter potential determined by transistor Q3 is reached, transistor QI4 is cut off. Therefore, the transistor Que Q@6 eQst becomes cut-off again.

At this point, the capacitor Cam stops discharging and the lowest point of the oscillation voltage is determined. When transistor Qi4 becomes cut-off and transistor Qu starts conducting, s Qs
Since the emitter potential determined by s is high, the transistor Qa
The capacitor Cow is cut off, and the capacitor Cow starts charging again, and the excavation is repeated.

Figure 3 shows a circuit to which the present invention is actually applied, in which the resistors R@, , R1,1 in Figure 2 are transistors. 6 te.

It was replaced by Q. Hatake, compensated for the temperature change in the voltage between the pace and emitter of transistors Q□ and Q67, and made the oscillation Onryo Yasuya 1fk basically complete, and other circuit trees. All symbols are shown in common with FIG. 2.

The oscillation circuit of the present invention basically outputs the voltage across the capacitors Co5 (FIG. 1) and C@s (FIG. 2), which specify the oscillation conditions, through the amplifier circuit.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an example of a conventional sawtooth wave generation circuit, Fig. 2 is a circuit diagram showing a basic circuit of the present invention, and Fig. 3 is a circuit diagram showing an example of a specific configuration of the present invention. It is. Q: Transistor, D: Diode, n: Resistor, C: Capacitor.

Claims (1)

[Claims] 1st. A charge/discharge circuit supplies an output voltage to the second and third transistor sections, a terminal corresponding to the base of the first transistor section, and a charge/discharge circuit supplies an output voltage to the terminal corresponding to the base of the second and third transistors, respectively. a bias source for generating first and second bias voltages;
A second transistor is connected to a connection point where the emitter-equivalent terminals of the second and third transistors are connected with direct current, and detects the current flowing through the Marugame source and the second transistor section to control the charging current of the charging/discharging circuit. and second circuit means that detects a current flowing through the first transistor section to control the operation of the first circuit means and also controls a current flowing through the second transistor. A ζ-giri wave generation circuit characterized by: