JPS58169308A - Format generating circuit - Google Patents

Abstract

PURPOSE:To obtain a format generating circuit by a simple circuit, by controlling the driving of a multiplexer, etc. by a read-out output of a storage device. CONSTITUTION:For instance, a counter CT1 is preset so as to designate an address (n) of a storage device ROM. An output B of the storage device ROM controls a multiplexer MPX, selects a data DATA, outputs C, D control information passing through FCC and CRC circuits, and an output E controls a modulating circuit MOD. In this state, when for instance, 16 is outputted from the output, an address (n)+1 is designated, the operation is shifted, for instance, to write control of a section mark part of a stripe, and thereafter, when it is executed repeatedly in the same way, a format can be generated. In this way, a format generating circuit can be obtained by a simple circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION (11) Technical Field of the Invention The present invention relates to a data stripe format creation circuit that has a simple configuration and can more easily deal with format envy.

(!1 Technical Background The control system used to store data stripes as shown in Figure 1 on magnetic tapes, etc., was complex. A data stripe consists of, for example, 16 bytes.
- start mark, 2-byte start mark, 5-byte stripe identification code (Im), 1i-byte data, 2-byte section mark, 16-byte data, 2-byte section mark, data and transition mark. 11H repeat, 14-byte IEOO code, 2-byte section mark, 16-byte expletive CO code, 2-byte section 7 mark, and everything from the 3-byte stripe identification code to this point is called an order dament.

Therefore, what follows is the seventh segment. In this way, a byte of a collection of bits is taken as a unit, and a stripe is removed every predetermined number of bytes.

(3) Conventional technology and 1 opening point Conventional format creation Ell! The second gus example
As shown in the figure, the output of the pulse oscillator ogo is applied to the bit counter output, the bit counter output for each s bit and the output of the oscillator oac are ANDed, and the output is applied to the byte counter BYO. , an action counter sea that counts multiple bytes, an action counter sea that counts multiple sexes, and detuders D101 to D104 . to which each counter output is applied. Multiplexer MP to which each dehooder output is applied! , [11
100°1 step 010, composed of 'Okikoma 1st Road Mo1l.

! Duplexer MPXKG word data DM! Mu.

ID compensation signal DII, II) & I, XDL, "O" signal and Tomi a o * Ol' gil! The output is printed. The outputs obtained by decoding each counter output are multiplex t1 path, xcogi4 path, OIO cell path, modulation 8jl1M
Make OD operate as specified 0 For example, define a binder to store the ID, count the number of bytes, which path to pass, and stop when the number of commands is reached. - The period of the number of bytes to be 5 calF) The circuit does not pass, etc. III! I
It is operated according to a clock signal corresponding to bits so as to draw a format stripe as shown in E. This circuit was complex, and once the circuit configuration was determined, if the format was changed, it was necessary to make major changes to the circuitry.

(4) Object of the Invention An object of the present invention is to provide a data stripe format creation circuit that has a simple configuration and can easily cope with format changes.

(5) Structure of the invention Structure of the invention Predetermined data is stored in bit units b
for! A four that makes the multiplayer, modulation, etc. riot with bit-compatible tag signals! In the cut path, write operation control information and the same write operation are repeated! m number, a counter for specifying successive addresses of the memory device, and a counter for controlling the number of repeated operations, and controls the riots of the multiplier etc. by the readout output of the storage device. It is.

(6) Embodiment of the Invention In the embodiment K of the present invention shown in FIG. 5, the portion above the one-dot chain line is a portion constructed by the present invention, and is a W storage device 110M exclusively for outsourcing.

Counter O'rl for specifying the address of the storage device
, a counter Cte2 for controlling the number of repetitions of the write operation, and a counter command circuit pm, and the portion below the one-dot chain line is the same as that in FIG. 41st I is storage device 1
In the diagram showing the memory contents of 0M, the symbols MU to EXPLORE mean the signals applied to each circuit, MU determines the number of repetitions, and B indicates ! Multiplexer control %C is xoa1i 3-way control, 1-line control O @ road control,! stores each tie-breaking information for modulation rotation control, and the information at address n is dramatically different from the information at address n+1. Assume that the counter (121) is now commanded to specify the address n of the storage device ROM.The output B of the storage device 10M controls the multiplexer MPx, and the data pm!mt-select?L, output c , n+'zxao
, oitoam.

The information that is passed through, the output signal, controls the modulation circuit MOD. Then, for example, when 14 is output from the output, the counter Cte2 is incremented by 7, so when the number of bytes written in the data stripe is counted and 14 is counted, the counter Cte2 is incremented by 7.
advances to address n+1. Therefore, for example, control for writing the seven-margin portion of the stripe is performed. If the process is repeated in the same manner, the format shown in FIG. 1 can be created.

It is possible to change the format in various ways rather than changing the value of 1ijl ps and the contents of the storage device 10M. Can be done.

(7) Effects of the Invention In this manner, according to the present invention, a formatting circuit can be obtained using a simple circuit that does not require a complicated circuit such as connecting kakunta circuits with logical multiplication circuits. Changing the format can be easily handled by rewriting the storage device.

[Brief explanation of the drawing]

[IWJ is a diagram showing an example of a format on a data stripe, FIG. 2 is a diagram showing an example of a conventional format creation circuit, and FIG. 5 is a circuit configuration of an embodiment of the present invention.
5 is a diagram illustrating the contents of the storage device in FIG. 5. FIG. 10M-Italian storage device Cte 1.0! ! -'Counter M P No. 626 faO No. 2, Title of the invention Format creation circuit 3, Relationship with the amended person case Patent issue-8 1M”IζKamiyo Jl1 10 Kamiodanaka, Nakahara-ku, Saki-shi, prefecture 711
1δ Address Name (Name) δ22 Fujitsu Ltd. representative! ! I Sake Yamamoto Takuma 4, Agent

Claims (1)

[Claims] In a 7-order format creation circuit that stores predetermined data on a medium in predetermined units, a storage device that stores write operation control information and an i number for repeating the same write operation and a successive address of the storage device are specified. It is composed of a counter that controls the number of repetitions, and a counter that controls the number of repetitions.
111 format creation-path.