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JPS58161333U - Single pulse generator circuit - Google Patents

Single pulse generator circuit

Info

Publication number
JPS58161333U
JPS58161333U JP5813182U JP5813182U JPS58161333U JP S58161333 U JPS58161333 U JP S58161333U JP 5813182 U JP5813182 U JP 5813182U JP 5813182 U JP5813182 U JP 5813182U JP S58161333 U JPS58161333 U JP S58161333U
Authority
JP
Japan
Prior art keywords
single pulse
circuit
input terminal
pulse generator
generator circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5813182U
Other languages
Japanese (ja)
Other versions
JPH0332113Y2 (en
Inventor
松井 捷明
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP5813182U priority Critical patent/JPS58161333U/en
Publication of JPS58161333U publication Critical patent/JPS58161333U/en
Application granted granted Critical
Publication of JPH0332113Y2 publication Critical patent/JPH0332113Y2/ja
Granted legal-status Critical Current

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  • Manipulation Of Pulses (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の微分による単一パルス発生回路の回路図
、第2図a ” eは第1図の動作波形図、第3図は本
考案の実施例の回路図、第4図a ” fは第3図の動
作波形図である。図において、10・・・・・・入力端
子、11・・・・・・出力端子、IC□。 IC2・・・・・・演算増幅器、C1,C2・・・・・
・コンデンサ、CR□・・・・・・ダイオー−ド、R4
−R5・・・・・・抵抗である。
Fig. 1 is a circuit diagram of a conventional single pulse generation circuit using differentiation, Fig. 2 a `` e is an operating waveform diagram of Fig. 1, Fig. 3 is a circuit diagram of an embodiment of the present invention, and Fig. 4 a '' f is an operating waveform diagram of FIG. 3; In the figure, 10...input terminal, 11...output terminal, IC□. IC2...... operational amplifier, C1, C2...
・Capacitor, CR□・・・Diode, R4
-R5...Resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 出力パルス幅を決める微分回路を一方の入力端に設は他
方の入力端に動作点を決めるバイアス電圧が供給される
差動増幅器から単一パルス発生回路において、前記他方
の入力端と電源端子との間に前記微分回路の時定数より
大きい時定数をもたせたコンデンサを挿入することによ
り、電源変動による誤動作をなくしたことを特徴とする
単一パルス発生回路。
A differential amplifier that determines the output pulse width is installed at one input terminal, and a bias voltage that determines the operating point is supplied to the other input terminal.In a single pulse generation circuit, the other input terminal and the power supply terminal are connected. 1. A single pulse generating circuit characterized in that a capacitor having a time constant larger than the time constant of the differentiating circuit is inserted between the differential circuit and the differential circuit, thereby eliminating malfunctions caused by power supply fluctuations.
JP5813182U 1982-04-21 1982-04-21 Single pulse generator circuit Granted JPS58161333U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5813182U JPS58161333U (en) 1982-04-21 1982-04-21 Single pulse generator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5813182U JPS58161333U (en) 1982-04-21 1982-04-21 Single pulse generator circuit

Publications (2)

Publication Number Publication Date
JPS58161333U true JPS58161333U (en) 1983-10-27
JPH0332113Y2 JPH0332113Y2 (en) 1991-07-08

Family

ID=30068536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5813182U Granted JPS58161333U (en) 1982-04-21 1982-04-21 Single pulse generator circuit

Country Status (1)

Country Link
JP (1) JPS58161333U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005348124A (en) * 2004-06-03 2005-12-15 Kawasaki Microelectronics Kk Digital signal input circuit
JP2006080594A (en) * 2004-09-07 2006-03-23 Matsushita Electric Ind Co Ltd Timer circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4714050U (en) * 1971-03-17 1972-10-19
JPS54121653A (en) * 1978-03-15 1979-09-20 Hitachi Ltd Trigger pulse formation circuit
JPS5541045A (en) * 1978-09-18 1980-03-22 Trio Kenwood Corp Monostable multivibrator

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4714050U (en) * 1971-03-17 1972-10-19
JPS54121653A (en) * 1978-03-15 1979-09-20 Hitachi Ltd Trigger pulse formation circuit
JPS5541045A (en) * 1978-09-18 1980-03-22 Trio Kenwood Corp Monostable multivibrator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005348124A (en) * 2004-06-03 2005-12-15 Kawasaki Microelectronics Kk Digital signal input circuit
JP2006080594A (en) * 2004-09-07 2006-03-23 Matsushita Electric Ind Co Ltd Timer circuit

Also Published As

Publication number Publication date
JPH0332113Y2 (en) 1991-07-08

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