JPS58136840U - Turn signal input processing circuit - Google Patents
Turn signal input processing circuitInfo
- Publication number
- JPS58136840U JPS58136840U JP3385782U JP3385782U JPS58136840U JP S58136840 U JPS58136840 U JP S58136840U JP 3385782 U JP3385782 U JP 3385782U JP 3385782 U JP3385782 U JP 3385782U JP S58136840 U JPS58136840 U JP S58136840U
- Authority
- JP
- Japan
- Prior art keywords
- input
- circuit
- turn signal
- processing circuit
- signal input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 7
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のウィンカ−人力処理回路の回路図、第2
図は第1図のウィンカ−人力処理回路をウィンカ−スイ
ッチに接続した回路図、第3図aないし第3図1は第2
図の回路の動作を説明するためのタイムチャート、第4
図は第第1図のウィンカ−人力処理回路をポジションス
イッチに接続した回路図、第5図aないし第5図には第
4図の回路の動作を説明するためのタイムチャート、第
6図はこの考案のウィンカ−人力処理回路の一実施例を
示す回路図、第7図は第6図のウィンカ−人力処理回路
をウィンカ−スイッチに接続した回路図、第8図aない
し第8図1は第7図の回路の動作を説明するためのタイ
ムチャート、第9図は第6図のウィンカ−人力処理回路
をポジションスイッチに接続した回路図、第10図aな
いし第10図1は第9図の回路の動作を説明するための
勢タイムチャート、第11図はこの考案のウィ
ンカ−人力処理回路の第2の実施例を示す回路図である
。
2・・・入力オフ検出回路、2a・・・積分回路、3・
・・記憶回路、4・・・入力H検出回路、5・・・出力
オン検出回路、5a・・・ディレィ回路、11・・・イ
ンバータ、12・・・ノアゲート、13,14.21・
・・D−形フリップ・フロップ回路、15,16.20
・・・アンドゲート、17・・・オアゲート、18.1
9・・・R−Sフリップ・フロップ回路、22・・・レ
フト入力、23・・・ライト入力、24・・・コモン入
力、28・・・ウィンカ−リレー、29・・・ウィンカ
−人力スイッチ、30・・・ポジションスイッチ、31
.32・・・ウィンカ−ランプ、33・・・十■電源端
子、34・・・クロック信号。Figure 1 is a circuit diagram of a conventional blinker-manual processing circuit;
The figure is a circuit diagram in which the turn signal human power processing circuit shown in Fig. 1 is connected to the turn signal switch, and Figs.
Time chart for explaining the operation of the circuit shown in the figure, No. 4
The figure is a circuit diagram in which the blinker-manual processing circuit in Figure 1 is connected to a position switch, Figures 5a to 5 are time charts for explaining the operation of the circuit in Figure 4, and Figure 6 is A circuit diagram showing one embodiment of the turn signal human power processing circuit of this invention, FIG. 7 is a circuit diagram in which the turn signal human power processing circuit of FIG. 6 is connected to a turn signal switch, and FIGS. 8a to 8 1 are A time chart for explaining the operation of the circuit shown in Fig. 7, Fig. 9 is a circuit diagram in which the blinker-human power processing circuit shown in Fig. 6 is connected to a position switch, and Figs. FIG. 11 is a circuit diagram showing a second embodiment of the blinker manual processing circuit of this invention. 2... Input off detection circuit, 2a... Integrating circuit, 3.
...Storage circuit, 4...Input H detection circuit, 5...Output ON detection circuit, 5a...Delay circuit, 11...Inverter, 12...Nor gate, 13,14.21.
・・D-type flip-flop circuit, 15, 16.20
...and gate, 17...or gate, 18.1
9... R-S flip-flop circuit, 22... Left input, 23... Right input, 24... Common input, 28... Turn signal relay, 29... Turn signal human power switch, 30...Position switch, 31
.. 32... blinker lamp, 33... power supply terminal, 34... clock signal.
Claims (1)
ト入力およびライト入力の状態を記憶してレフト入力ま
たはライト入力の一方のみが入力されたときにレフト出
力またはライト出力の一方のみを出力する記憶回路と、
上記レフト入力およびライト入力がともにオフであるこ
とを検出すると上記記憶回路の内容をリセットする入力
オフ検出回路と、上記レフト入力およびライト入力がと
もに入力されることを検出すると上記記憶回路の記憶状
態をリセットする第1の検出回路と、上記記憶回路から
レフト出力およびライト出力がともに出力されているこ
とを検出すると上記記憶回路の記憶状態をリセットする
第2の検出回路とよりなるウィンカ−人力処理回路。a memory circuit that stores the states of a left input and a right input of a turn signal of a vehicle such as an automobile or a motorcycle, and outputs only one of the left output and the right output when only one of the left input and the right input is input;
an input off detection circuit that resets the contents of the memory circuit when it detects that the left input and the right input are both off; and a memory state of the memory circuit when it detects that both the left input and the right input are input. and a second detection circuit that resets the memory state of the memory circuit when it detects that both the left output and the right output are output from the memory circuit. circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3385782U JPS58136840U (en) | 1982-03-12 | 1982-03-12 | Turn signal input processing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3385782U JPS58136840U (en) | 1982-03-12 | 1982-03-12 | Turn signal input processing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58136840U true JPS58136840U (en) | 1983-09-14 |
JPS6346266Y2 JPS6346266Y2 (en) | 1988-12-01 |
Family
ID=30045382
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3385782U Granted JPS58136840U (en) | 1982-03-12 | 1982-03-12 | Turn signal input processing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58136840U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011173514A (en) * | 2010-02-24 | 2011-09-08 | Nippon Soken Inc | Operation control system |
-
1982
- 1982-03-12 JP JP3385782U patent/JPS58136840U/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011173514A (en) * | 2010-02-24 | 2011-09-08 | Nippon Soken Inc | Operation control system |
Also Published As
Publication number | Publication date |
---|---|
JPS6346266Y2 (en) | 1988-12-01 |
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