JPS5810895B2 - data acquisition circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention allows multiple transmitters to be sequentially or selectively called to a single receiver, while minimizing the number of power transmission cables between the transmitter and the receiver. The present invention relates to a data acquisition circuit that allows the measurement device to be used much more economically than conventional ones.

Conventionally, in order to sequentially or selectively call multiple transmitters for reception, a cable is drawn in from each transmitter as shown in Fig. 3, and a receiving meter is installed on each cable, or as shown in Fig. 4. It was common to install a switch in the middle, and switch between one transmitter and one receiver.

The former method requires a large number of cables between the transmitter and the receiver, and requires as many receivers as there are transmitters, making the metering device very expensive.

In the latter method, only one receiver is required, and although it is quite streamlined in this respect, it is necessary to install as many cables as there are transmitters between each transmitter switcher, and In addition to the cable for one transmitter, a cable for giving switching commands to the switch is required between the meter and the switch.

However, the number of such transmitters is generally (N+1), where N is the number of transmitters connected to the switching device, and considering this point, it cannot be said that the cost of the metering device has become low yet.

The present invention improves this point by connecting the transmitters with a signal path line, connecting their terminals to a receiver, and providing a selection circuit in pair with the transmitter. They are connected to each other by a selection path line, and the terminal is connected to a transmitter selection circuit paired with a receiver, so that an address signal indicating a specific transmitter from the transmitter selection circuit can be transmitted. When transmitted to a group of oscillators through the selection path line, the selection circuit paired with each individual oscillator
This address signal generates its own circuit power, and the selection circuit corresponding to the address connects the oscillator to the signal path line in response, and the signal of the called oscillator is received through the signal path line. reaches the meter and shows its reading.

As described above, according to the present invention, one receiver and a large number of transmitters can be connected to a signal path line (in normal cases, 2 cores can be used) and a selection path line (in normal cases, 2 cores can be used). It can be connected using a pass line method that connects in a so-called "Imozuru" style, and the number of instrumentation bones can be kept to a minimum.

The present invention will be explained below based on embodiment figures.

FIG. 1 shows an example of the configuration of this system, and reference numeral 1 in the figure indicates a receiver.

In this receiver, one of the transmitters 2, 3, and 4 is 5
, 6 and 7, when connected to the signal path line 8, an instruction for that transmitter can be obtained.

Note that 9 is a power supply circuit, which is connected in series to the oscillator as shown in the figure, since the output of the oscillator is assumed to be 4 to 20 mA for industrial use in this embodiment.

10 is a multiple push button switch for selecting a transmitter; when a button corresponding to the transmitter to be selected is selected, the signal from that push button is guided to the address conversion circuit 11, where a second
An address signal as shown in the time chart in the figure is transmitted.

This signal is powered up by an amplification circuit 12 and guided through a selection signal path line 13 to selection circuits 5, 6, and 7 paired with the oscillators 2, 3, and 4, respectively.

Since these selection circuits 5, 6.7 have the same structure, only the selection circuit 5 will be explained.

First, the selection signal shown in the time chart of FIG. 2 is extracted from the selection signal path line 13, and a direct current for the power supply is created by the action of the rectifying diode and the smoothing capacitor 15.

This direct current is further supplied as a constant voltage to other circuits in the selection circuit through a constant voltage circuit 16.

On the other hand, the selection signal is shaped by a waveform rectifier circuit 17 and sent to a mark detection circuit 18, and the detected mark signal is sent to a control signal generation circuit 19.

This circuit 19 is a circuit 2 that determines whether or not the address of the selection signal counted by the counter circuit 20 matches its own address set in the address setting circuit 31.
A comparison command for comparing at 2, a latch command for latching whether the result of this comparison matches the own address with a latch circuit at 23, and after this operation is completed, clearing the counter circuit 20. A reset signal is generated to prepare for counting the address signal section connected to the mark.

In this way, when the mark detection circuit 18 first detects a mark, the counter contents are still 0 in the first cycle of the selection signal, so even if a comparison command and a latch command are issued, the latch contents do not match, and the next counter A reset only resets the counter circuit.

Next, the address signal portion following the head mark of one period of the selection signal is counted by the counter circuit 20, and then the head mark of the second period is detected, but the output of the counter circuit 20 at this time is the call signal for transmitter 2.

When a match determination command is issued from the control signal generation circuit 19, a determination circuit 22 determines the signal from the address setting circuit 21.

The matched signal latches the latch circuit 23 as a latch command.

When the latch circuit 23 is in a matching state, its output is amplified by the amplifier 24 and drives the relay 25.

When the contact 26 of the relay 25 is closed, the output line of the transmitter 2 is connected to the signal path line 8, and the receiver 1 can read the instruction from the transmitter 2.

Although the above embodiments have been described as signal path lines and selection path lines, if it is more advantageous to use branch wiring instead of path lines, there is no particular problem in connecting them in that way.

Further, if necessary, path line wiring and branch wiring may be combined.

[Brief explanation of the drawing]

FIG. 1 is a wiring diagram of a data acquisition circuit according to the present invention, FIG. 2 is a time chart of address signals, and FIGS. 3 and 4 are wiring diagrams showing conventional data concentration circuits. In the figure, 1... Receiver, 2, 3, 4...
Transmitter, 5.6, 7... Selection circuit, 8...
...Signal path line, 9...Power supply circuit, 10.
... Selection push button switch, 11 ... Address converter, 12 ... Multiplier, 13 ...
Select signal path line.

Claims (1)

[Claims] 1 Connect a plurality of transmitters in parallel to the transmission line to the receiver, and apply the rectified DC voltage of the address signal paired with these transmitters and selected by the selection switch to the selection circuit. Like the constant voltage circuit, it has a waveform shaping circuit that shapes the address signal into a rectangular wave, and a mark detection circuit that captures mark pulses from this waveform shaping circuit, as well as the address of the selection signal counted by the counter circuit and address setting. A comparison command for comparison in a circuit to determine whether or not the own address set in the circuit matches, and a latch circuit to latch whether or not the result of this comparison matches the own address. Each signal selection circuit is equipped with a control signal generation circuit that generates a launch command and, after the completion of this operation, a reset signal for clearing the counter circuit and preparing to count the address signal section connected to the mark circuit. Each oscillator switch is connected in parallel to the transmission line of the address conversion circuit, so that each signal selection circuit is activated by the address signal from the address conversion circuit, and each oscillator is A data collection circuit that can be transmitted by operating a signal selection circuit.