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JPS5794829A - Key input circuit - Google Patents

Key input circuit

Info

Publication number
JPS5794829A
JPS5794829A JP55169474A JP16947480A JPS5794829A JP S5794829 A JPS5794829 A JP S5794829A JP 55169474 A JP55169474 A JP 55169474A JP 16947480 A JP16947480 A JP 16947480A JP S5794829 A JPS5794829 A JP S5794829A
Authority
JP
Japan
Prior art keywords
counter
circuit
switches
counting
scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55169474A
Other languages
Japanese (ja)
Inventor
Kyohei Hashizume
Seiichi Kurihara
Fumiaki Seto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55169474A priority Critical patent/JPS5794829A/en
Publication of JPS5794829A publication Critical patent/JPS5794829A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
    • H03M11/20—Dynamic coding, i.e. by key scanning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE:To simplify the constitution of circuit and to prevent the malfunction of a switch to chattering during the input of keys, by scanning an operaion switch by a scanning counter and deciding the operation switch. CONSTITUTION:A scanning counter 1 repeats the prescribed counting in accordance with a clock signal CL1 and while a logic 1 is applied to a parallel-enable- terminal. The count information is fed to a multiplexer MX2 and a register 5. The counter 1 stops its counting when an NOT circuit 12 is set at logic 0. For the multiplexer MX2, the inputs given from switches SW0-SW15 are scanned based on the information given from the counter 1. Then the switches which are turned on are detected among the switches SW0-SW15, the counting of the counter 1 is discontinued by the output of the MX2 via an OR circuit 8 and an NOT circuit 12.
JP55169474A 1980-12-03 1980-12-03 Key input circuit Pending JPS5794829A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55169474A JPS5794829A (en) 1980-12-03 1980-12-03 Key input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55169474A JPS5794829A (en) 1980-12-03 1980-12-03 Key input circuit

Publications (1)

Publication Number Publication Date
JPS5794829A true JPS5794829A (en) 1982-06-12

Family

ID=15887221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55169474A Pending JPS5794829A (en) 1980-12-03 1980-12-03 Key input circuit

Country Status (1)

Country Link
JP (1) JPS5794829A (en)

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