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JPS579149A - Communication control system - Google Patents

Communication control system

Info

Publication number
JPS579149A
JPS579149A JP8239880A JP8239880A JPS579149A JP S579149 A JPS579149 A JP S579149A JP 8239880 A JP8239880 A JP 8239880A JP 8239880 A JP8239880 A JP 8239880A JP S579149 A JPS579149 A JP S579149A
Authority
JP
Japan
Prior art keywords
incoming
signal
instruction
issues
central processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8239880A
Other languages
Japanese (ja)
Other versions
JPS6236421B2 (en
Inventor
Hiroo Mizuguchi
Yukinori Inoue
Yasuhiro Nakahara
Toshiyuki Odanaka
Kanji Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8239880A priority Critical patent/JPS579149A/en
Publication of JPS579149A publication Critical patent/JPS579149A/en
Publication of JPS6236421B2 publication Critical patent/JPS6236421B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To enable the processing without having an instruction to a central processing unit for every case, by trasmitting an incoming reject signal or controlled not ready signal by a communication controller by itself. CONSTITUTION:If a central processing device 4 issues an incoming reject instruction 7 due to disable incoming, a communication controller 3 sets it within the channel control word and enters the incoming signal receiving state. When an incoming signal is received, the device 3 transmits an incoming rejection signal once with the firmware to the line. Thus, the incoming signal can be received without interruption to the central processor 4. This operation is repeated until the central processor 4 issues the operation stop instruction. When the central processing unit 4 transits to incoming enable state, the unit 4 issues an operation stop instruction 9 to the instruction 7 during execution.
JP8239880A 1980-06-18 1980-06-18 Communication control system Granted JPS579149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8239880A JPS579149A (en) 1980-06-18 1980-06-18 Communication control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8239880A JPS579149A (en) 1980-06-18 1980-06-18 Communication control system

Publications (2)

Publication Number Publication Date
JPS579149A true JPS579149A (en) 1982-01-18
JPS6236421B2 JPS6236421B2 (en) 1987-08-06

Family

ID=13773479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8239880A Granted JPS579149A (en) 1980-06-18 1980-06-18 Communication control system

Country Status (1)

Country Link
JP (1) JPS579149A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60233963A (en) * 1984-05-04 1985-11-20 Fujitsu Ltd Response control system of line
JPH04130557A (en) * 1990-09-20 1992-05-01 Matsushita Electric Ind Co Ltd Terminal equipment for displaying incoming telegraphic message

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60233963A (en) * 1984-05-04 1985-11-20 Fujitsu Ltd Response control system of line
JPH04130557A (en) * 1990-09-20 1992-05-01 Matsushita Electric Ind Co Ltd Terminal equipment for displaying incoming telegraphic message

Also Published As

Publication number Publication date
JPS6236421B2 (en) 1987-08-06

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