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JPS5783946A - Input and output monitoring system - Google Patents

Input and output monitoring system

Info

Publication number
JPS5783946A
JPS5783946A JP55159842A JP15984280A JPS5783946A JP S5783946 A JPS5783946 A JP S5783946A JP 55159842 A JP55159842 A JP 55159842A JP 15984280 A JP15984280 A JP 15984280A JP S5783946 A JPS5783946 A JP S5783946A
Authority
JP
Japan
Prior art keywords
input
output
circuit
mark
scramble signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55159842A
Other languages
Japanese (ja)
Inventor
Yuzo Fujii
Toshio Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55159842A priority Critical patent/JPS5783946A/en
Publication of JPS5783946A publication Critical patent/JPS5783946A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To increase an input and output monitoring range by including the number of marks which are found added to an input signal in advance during a comparison between the numbers of input and output marks. CONSTITUTION:An input A is supplied to a circuit 1 to be monitored and a mark-number comparing circuit 3, a scramble signal C is supplied to a scrambling circuit 2 and the mark-number comparing circuit 3, and the output B of the circuit 1 to be monitored is supplied to the scrambling circuit 2. The input A is passed through the circuit 1 to obtain an output B, which is exclusively ORed with the scramble signal C by the scrambling circuit 2 to obtain an output D. For this purpose, the input A, output D and scramble signal C are exclusively ORed by the mark-number counting circuit 3, so the scramble signal C is exclusively ORed twice. Consequently, the influence of the marks of the scramble signal C is eliminated and an output E is the result of an input-output mark- number comparison between the input A and output D, so that when a monitoring section is normal, a section A-B is expanded to a section A-D.
JP55159842A 1980-11-13 1980-11-13 Input and output monitoring system Pending JPS5783946A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55159842A JPS5783946A (en) 1980-11-13 1980-11-13 Input and output monitoring system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55159842A JPS5783946A (en) 1980-11-13 1980-11-13 Input and output monitoring system

Publications (1)

Publication Number Publication Date
JPS5783946A true JPS5783946A (en) 1982-05-26

Family

ID=15702421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55159842A Pending JPS5783946A (en) 1980-11-13 1980-11-13 Input and output monitoring system

Country Status (1)

Country Link
JP (1) JPS5783946A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0147658A2 (en) * 1983-12-17 1985-07-10 ANT Nachrichtentechnik GmbH Arrangement for improving parity counting

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0147658A2 (en) * 1983-12-17 1985-07-10 ANT Nachrichtentechnik GmbH Arrangement for improving parity counting

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