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JPS5782284A - Memory device - Google Patents

Memory device

Info

Publication number
JPS5782284A
JPS5782284A JP55155950A JP15595080A JPS5782284A JP S5782284 A JPS5782284 A JP S5782284A JP 55155950 A JP55155950 A JP 55155950A JP 15595080 A JP15595080 A JP 15595080A JP S5782284 A JPS5782284 A JP S5782284A
Authority
JP
Japan
Prior art keywords
phiy
line
column
control signal
leading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55155950A
Other languages
Japanese (ja)
Inventor
Takashi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55155950A priority Critical patent/JPS5782284A/en
Publication of JPS5782284A publication Critical patent/JPS5782284A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To increase a transmission speed of a data transmission/reception, by separating a bootstrap capacitance of a booster circuit from a common column line at the time of leading edge of a column control signal selecting the data line connected to a memory cell. CONSTITUTION:Input and output terminals of memory cells in matrix arrangement are connected to data lines, and a pulse generating circuit phix-GENE forming a switch control signal phiY selecting the data line is provided to a common column line. A booster circuit phiY-BOOS is provided, in which one electrode is connected to the output line of this circuit and a pulse signal phimad delayed with the leading time from the control signal phiY is applied to another electrode at a bootstrap capacitance. Cut MISFETT15, T11 to the gate of which a power supply voltage Vcc is applied are provided between the gate of column address switches MISFETQ1-1, Q1-2 and a column decoder C-DCR. Thus, since the bootstrap capacitance can be separated at the leading of the signal phiY, the tansmission speed of the data transmission/reception is increased.
JP55155950A 1980-11-07 1980-11-07 Memory device Pending JPS5782284A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55155950A JPS5782284A (en) 1980-11-07 1980-11-07 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55155950A JPS5782284A (en) 1980-11-07 1980-11-07 Memory device

Publications (1)

Publication Number Publication Date
JPS5782284A true JPS5782284A (en) 1982-05-22

Family

ID=15617067

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55155950A Pending JPS5782284A (en) 1980-11-07 1980-11-07 Memory device

Country Status (1)

Country Link
JP (1) JPS5782284A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5924495A (en) * 1982-08-02 1984-02-08 Hitachi Ltd putostrap circuit
JPS62140294A (en) * 1985-12-13 1987-06-23 Toshiba Corp Driving system for word line and dummy word line of semiconductor memory

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461429A (en) * 1977-10-26 1979-05-17 Hitachi Ltd Dynamic mis memory circuit
JPS54158828A (en) * 1978-06-06 1979-12-15 Toshiba Corp Dynamic type semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5461429A (en) * 1977-10-26 1979-05-17 Hitachi Ltd Dynamic mis memory circuit
JPS54158828A (en) * 1978-06-06 1979-12-15 Toshiba Corp Dynamic type semiconductor memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5924495A (en) * 1982-08-02 1984-02-08 Hitachi Ltd putostrap circuit
JPS62140294A (en) * 1985-12-13 1987-06-23 Toshiba Corp Driving system for word line and dummy word line of semiconductor memory

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